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PORT_SUPPORTS_RT for Cortex-A5 and Cortex-A9 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11255 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
edolomb 2018-01-10 17:00:26 +00:00
parent ad34d8b512
commit 77196a43a8
1 changed files with 24 additions and 1 deletions
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25
os/common/ports/ARM/chcore.h
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@ -39,7 +39,7 @@
/**
* @brief This port supports a realtime counter.
*/
#define PORT_SUPPORTS_RT FALSE
#define PORT_SUPPORTS_RT TRUE
/**
* @brief Natural alignment constant.
@ -534,6 +534,29 @@ static inline void port_enable(void) {
#endif
}
/**
* @brief Returns the current value of the realtime counter.
*
* @return The realtime counter value.
*/
static inline rtcnt_t port_rt_get_counter_value(void) {
#if ((ARM_CORE == ARM_CORE_CORTEX_A5) || (ARM_CORE == ARM_CORE_CORTEX_A9) || defined(__DOXYGEN__))
rtcnt_t cyc;
__asm volatile("mrc p15, 0, %[p0], c9, c13, 0" : [p0] "=r" (cyc) :);
return cyc;
#else
/*
* TODO develop same function for ARM_CORE_CORTEX_A8
*/
return 0;
#endif
}
/**
* @brief Enters an architecture-dependent IRQ-waiting mode.
* @details The function is meant to return when an interrupt becomes pending.