mirror of https://github.com/rusefi/ChibiOS.git
G0B1 demo compiles now.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14794 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio
parent
1cc19e1772
commit
80fd894033
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@ -0,0 +1,175 @@
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/*
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ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file TIMv1/stm32_tim3_4.inc
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* @brief Shared TIM3, TIM4 handler.
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*
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* @addtogroup STM32_TIM3_TIM4_HANDLER
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* @{
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*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Registry checks for robustness.*/
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#if !defined(STM32_HAS_TIM3)
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#error "STM32_HAS_TIM3 not defined in registry"
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#endif
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#if !defined(STM32_HAS_TIM4)
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#error "STM32_HAS_TIM4 not defined in registry"
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#endif
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/* HW compatibility check.*/
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#if !STM32_HAS_TIM3
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#error "TIM3 not present"
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#endif
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#if !STM32_HAS_TIM4
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#error "TIM4 not present"
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#endif
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/* Driver checks for robustness, undefined USE macros are defaulted to
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FALSE. This makes this module independent from drivers implementation.*/
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#if !defined(STM32_GPT_USE_TIM3)
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#define STM32_GPT_USE_TIM3 FALSE
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#endif
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#if !defined(STM32_ICU_USE_TIM3)
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#define STM32_ICU_USE_TIM3 FALSE
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#endif
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#if !defined(STM32_PWM_USE_TIM3)
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#define STM32_PWM_USE_TIM3 FALSE
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#endif
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#if !defined(STM32_ST_USE_TIM3)
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#define STM32_ST_USE_TIM3 FALSE
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#endif
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#if !defined(STM32_GPT_USE_TIM4)
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#define STM32_GPT_USE_TIM4 FALSE
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#endif
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#if !defined(STM32_ICU_USE_TIM4)
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#define STM32_ICU_USE_TIM4 FALSE
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#endif
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#if !defined(STM32_PWM_USE_TIM4)
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#define STM32_PWM_USE_TIM4 FALSE
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#endif
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#if !defined(STM32_ST_USE_TIM4)
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#define STM32_ST_USE_TIM4 FALSE
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#endif
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#if STM32_HAS_TIM3 || STM32_HAS_TIM4
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/* Priority settings checks.*/
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#if !defined(STM32_IRQ_TIM3_4_PRIORITY)
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#error "STM32_IRQ_TIM3_4_PRIORITY not defined in mcuconf.h"
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#endif
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#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_TIM3_4_PRIORITY)
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#error "Invalid IRQ priority assigned to STM32_IRQ_TIM3_4_PRIORITY"
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#endif
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#endif /* STM32_HAS_TIM3 || STM32_HAS_TIM4 */
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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static inline void tim3_tim4_irq_init(void) {
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#if defined(STM32_TIM3_IS_USED) || defined(STM32_TIM4_IS_USED)
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nvicEnableVector(STM32_TIM3_TIM4_NUMBER,
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STM32_IRQ_TIM3_TIM4_PRIORITY);
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#endif
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}
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static inline void tim3_tim4_irq_deinit(void) {
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#if defined(STM32_TIM3_IS_USED) || defined(STM32_TIM4_IS_USED)
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nvicDisableVector(STM32_TIM3_TIM4_NUMBER);
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#endif
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if defined(STM32_TIM3_IS_USED) || defined(STM32_TIM4_IS_USED) || \
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defined(__DOXYGEN__)
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/**
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* @brief TIM3, TIM4 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(STM32_TIM3_TIM4_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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#if HAL_USE_GPT
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#if STM32_GPT_USE_TIM3
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gpt_lld_serve_interrupt(&GPTD3);
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#endif
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#if STM32_GPT_USE_TIM4
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gpt_lld_serve_interrupt(&GPTD4);
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#endif
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#endif
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#if HAL_USE_ICU
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#if STM32_ICU_USE_TIM3
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icu_lld_serve_interrupt(&ICUD3);
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#endif
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#if STM32_ICU_USE_TIM4
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icu_lld_serve_interrupt(&ICUD4);
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#endif
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#endif
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#if HAL_USE_PWM
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#if STM32_PWM_USE_TIM3
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pwm_lld_serve_interrupt(&PWMD3);
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#endif
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#if STM32_PWM_USE_TIM4
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pwm_lld_serve_interrupt(&PWMD4);
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#endif
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#endif
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#if 1
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#if STM32_ST_USE_TIM3
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st_lld_serve_interrupt();
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#endif
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#if STM32_ST_USE_TIM4
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st_lld_serve_interrupt();
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#endif
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#endif
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/** @} */
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@ -0,0 +1,126 @@
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/*
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ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file USART/stm32_usart2_lp2.inc
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* @brief Shared USART2, LPUART2 handler.
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*
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* @addtogroup STM32_USART2_LP1_HANDLER
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* @{
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*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Registry checks for robustness.*/
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#if !defined(STM32_HAS_USART2)
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#error "STM32_HAS_USART2 not defined in registry"
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#endif
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#if !defined(STM32_HAS_LPUART2)
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#error "STM32_HAS_LPUART2 not defined in registry"
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#endif
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#if STM32_HAS_USART2 || STM32_HAS_LPUART2
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/* Priority settings checks.*/
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#if !defined(STM32_IRQ_USART2_LP2_PRIORITY)
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#error "STM32_IRQ_USART2_LP2_PRIORITY not defined in mcuconf.h"
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#endif
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#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_USART2_LP2_PRIORITY)
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#error "Invalid IRQ priority assigned to STM32_IRQ_USART2_LP2_PRIORITY"
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#endif
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#endif /* STM32_HAS_USART2 || STM32_HAS_LPUART2 */
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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static inline void usart2_lpuart2_irq_init(void) {
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#if defined(STM32_USART32_IS_USED) || defined(STM32_LPUART2_IS_USED)
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nvicEnableVector(STM32_USART2_LP2_NUMBER, STM32_IRQ_USART2_LP2_PRIORITY);
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#endif
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}
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static inline void usart2_lpuart2_irq_deinit(void) {
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#if defined(STM32_USART2_IS_USED) || defined(STM32_LPUART2_IS_USED)
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nvicDisableVector(STM32_USART2_LP2_NUMBER);
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#endif
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if defined(STM32_USART2_IS_USED) || defined(STM32_LPUART2_IS_USED) || \
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defined(__DOXYGEN__)
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/**
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* @brief USART2, LPUART2 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(STM32_USART2_LP2_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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#if HAL_USE_SERIAL
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#if STM32_SERIAL_USE_USART2
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sd_lld_serve_interrupt(&SD2);
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#endif
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#if STM32_SERIAL_USE_LPUART2
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sd_lld_serve_interrupt(&LPSD2);
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#endif
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#endif
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#if HAL_USE_SIO
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#if STM32_SIO_USE_USART2
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sio_lld_serve_interrupt(&SIOD2);
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#endif
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#if STM32_SIO_USE_LPUART2
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sio_lld_serve_interrupt(&LPSIOD2);
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#endif
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#endif
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#if HAL_USE_UART
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#if STM32_UART_USE_USART2
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uart_lld_serve_interrupt(&UARTD2);
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#endif
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#endif
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/** @} */
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@ -0,0 +1,173 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file USART/stm32_usart3_4_5_6_lp1.inc
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* @brief Shared USART3, UART4, UART5, USART6 LPUART1 handler.
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*
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* @addtogroup STM32_USART3_4_5_6_LP1_HANDLER
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* @{
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*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Registry checks for robustness.*/
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#if !defined(STM32_HAS_USART3)
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#error "STM32_HAS_USART3 not defined in registry"
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#endif
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#if !defined(STM32_HAS_UART4)
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#error "STM32_HAS_UART4 not defined in registry"
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#endif
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#if !defined(STM32_HAS_UART5)
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#error "STM32_HAS_UART5 not defined in registry"
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#endif
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#if !defined(STM32_HAS_USART6)
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#error "STM32_HAS_USART6 not defined in registry"
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#endif
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#if !defined(STM32_HAS_LPUART1)
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#error "STM32_HAS_LPUART1 not defined in registry"
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#endif
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#if STM32_HAS_USART3 || STM32_HAS_UART4 || STM32_HAS_UART5 || \
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STM32_HAS_USART6 || STM32_HAS_LPUART1
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/* Priority settings checks.*/
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#if !defined(STM32_IRQ_USART3_4_5_6_LP1_PRIORITY)
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#error "STM32_IRQ_USART3_4_5_6_LP1_PRIORITY not defined in mcuconf.h"
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#endif
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#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_USART3_4_5_6_LP1_PRIORITY)
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#error "Invalid IRQ priority assigned to STM32_IRQ_USART3_4_5_6_LP1_PRIORITY"
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#endif
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#endif /* STM32_HAS_USART3 || STM32_HAS_UART4 || STM32_HAS_UART5 ||
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STM32_HAS_UART6 || STM32_HAS_LPUART1 */
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/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void usart3_usart4_usart5_usart6_lpuart1_irq_init(void) {
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#if defined(STM32_USART3_IS_USED) || defined(STM32_UART4_IS_USED) || \
|
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defined(STM32_UART5_IS_USED ) || defined(STM32_USART6_IS_USED) || \
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defined(STM32_LPUART1_IS_USED)
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nvicEnableVector(STM32_USART3_4_5_6_LP1_NUMBER,
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STM32_IRQ_USART3_4_5_6_LP1_PRIORITY);
|
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#endif
|
||||
}
|
||||
|
||||
static inline void usart3_usart4_usart5_usart6_lpuart1_irq_deinit(void) {
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#if defined(STM32_USART3_IS_USED) || defined(STM32_UART4_IS_USED) || \
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defined(STM32_UART5_IS_USED ) || defined(STM32_USART6_IS_USED) || \
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defined(STM32_LPUART1_IS_USED)
|
||||
nvicDisableVector(STM32_USART3_4_5_6_LP1_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if defined(STM32_USART3_IS_USED) || defined(STM32_UART4_IS_USED) || \
|
||||
defined(STM32_UART5_IS_USED ) || defined(STM32_USART6_IS_USED) || \
|
||||
defined(STM32_LPUART1_IS_USED) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief USART3, UART4, UART5, USART6, LPUART1 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(STM32_USART3_4_5_6_LP1_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
#if HAL_USE_SERIAL
|
||||
#if STM32_SERIAL_USE_USART3
|
||||
sd_lld_serve_interrupt(&SD3);
|
||||
#endif
|
||||
#if STM32_SERIAL_USE_UART4
|
||||
sd_lld_serve_interrupt(&SD4);
|
||||
#endif
|
||||
#if STM32_SERIAL_USE_UART5
|
||||
sd_lld_serve_interrupt(&SD5);
|
||||
#endif
|
||||
#if STM32_SERIAL_USE_USART6
|
||||
sd_lld_serve_interrupt(&SD6);
|
||||
#endif
|
||||
#if STM32_SERIAL_USE_LPUART1
|
||||
sd_lld_serve_interrupt(&LPSD1);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if HAL_USE_SIO
|
||||
#if STM32_SIO_USE_USART3
|
||||
sio_lld_serve_interrupt(&SIOD3);
|
||||
#endif
|
||||
#if STM32_SIO_USE_UART4
|
||||
sio_lld_serve_interrupt(&SIOD4);
|
||||
#endif
|
||||
#if STM32_SIO_USE_UART5
|
||||
sio_lld_serve_interrupt(&SIOD5);
|
||||
#endif
|
||||
#if STM32_SIO_USE_USART6
|
||||
sio_lld_serve_interrupt(&SIOD6);
|
||||
#endif
|
||||
#if STM32_SIO_USE_LPUART1
|
||||
sio_lld_serve_interrupt(&LPSIOD1);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if HAL_USE_UART
|
||||
#if STM32_UART_USE_USART3
|
||||
uart_lld_serve_interrupt(&UARTD3);
|
||||
#endif
|
||||
#if STM32_UART_USE_UART4
|
||||
uart_lld_serve_interrupt(&UARTD4);
|
||||
#endif
|
||||
#if STM32_UART_USE_UART5
|
||||
uart_lld_serve_interrupt(&UARTD5);
|
||||
#endif
|
||||
#if STM32_UART_USE_UART6
|
||||
uart_lld_serve_interrupt(&UARTD6);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @} */
|
||||
|
|
@ -102,12 +102,12 @@
|
|||
#define STM32_DMAMUX1_LPUART2_TX 65
|
||||
#define STM32_DMAMUX1_SPI3_RX 66
|
||||
#define STM32_DMAMUX1_SPI3_TX 67
|
||||
#define STM32_DMAMUX1_TIM3_CH1 68
|
||||
#define STM32_DMAMUX1_TIM3_CH2 69
|
||||
#define STM32_DMAMUX1_TIM3_CH3 70
|
||||
#define STM32_DMAMUX1_TIM3_CH4 71
|
||||
#define STM32_DMAMUX1_TIM3_TRIG 72
|
||||
#define STM32_DMAMUX1_TIM3_UP 73
|
||||
#define STM32_DMAMUX1_TIM4_CH1 68
|
||||
#define STM32_DMAMUX1_TIM4_CH2 69
|
||||
#define STM32_DMAMUX1_TIM4_CH3 70
|
||||
#define STM32_DMAMUX1_TIM4_CH4 71
|
||||
#define STM32_DMAMUX1_TIM4_TRIG 72
|
||||
#define STM32_DMAMUX1_TIM4_UP 73
|
||||
#define STM32_DMAMUX1_USART5_RX 74
|
||||
#define STM32_DMAMUX1_USART5_TX 75
|
||||
#define STM32_DMAMUX1_UART5_RX STM32_DMAMUX1_USART5_RX /* Legacy. */
|
||||
|
|
|
|||
|
|
@ -52,7 +52,11 @@
|
|||
/*===========================================================================*/
|
||||
|
||||
#include "stm32_dma1_ch23.inc"
|
||||
#if STM32_DMA2_NUM_CHANNELS > 0
|
||||
#include "stm32_dma1_ch4567_dma2_ch12345.inc"
|
||||
#else
|
||||
#include "stm32_dma1_ch4567.inc"
|
||||
#endif
|
||||
|
||||
#include "stm32_exti0_1.inc"
|
||||
#include "stm32_exti2_3.inc"
|
||||
|
|
@ -60,12 +64,24 @@
|
|||
#include "stm32_exti19-21.inc"
|
||||
|
||||
#include "stm32_usart1.inc"
|
||||
#if STM32_HAS_LPUART2
|
||||
#include "stm32_usart2_lp2.inc"
|
||||
#else
|
||||
#include "stm32_usart2.inc"
|
||||
#endif
|
||||
#if STM32_HAS_UART5 && STM32_HAS_USART6
|
||||
#include "stm32_usart3_4_5_6_lp1.inc"
|
||||
#else
|
||||
#include "stm32_usart3_4_lp1.inc"
|
||||
#endif
|
||||
|
||||
#include "stm32_tim1.inc"
|
||||
#include "stm32_tim2.inc"
|
||||
#if STM32_HAS_TIM4
|
||||
#include "stm32_tim3_4.inc"
|
||||
#else
|
||||
#include "stm32_tim3.inc"
|
||||
#endif
|
||||
#include "stm32_tim6.inc"
|
||||
#include "stm32_tim7.inc"
|
||||
#include "stm32_tim14.inc"
|
||||
|
|
@ -91,7 +107,11 @@ void irqInit(void) {
|
|||
|
||||
tim1_irq_init();
|
||||
tim2_irq_init();
|
||||
#if STM32_HAS_TIM4
|
||||
tim3_tim4_irq_init();
|
||||
#else
|
||||
tim3_irq_init();
|
||||
#endif
|
||||
tim6_irq_init();
|
||||
tim7_irq_init();
|
||||
tim14_irq_init();
|
||||
|
|
@ -100,8 +120,16 @@ void irqInit(void) {
|
|||
tim17_irq_init();
|
||||
|
||||
usart1_irq_init();
|
||||
#if STM32_HAS_LPUART2
|
||||
usart2_lpuart2_irq_init();
|
||||
#else
|
||||
usart2_irq_init();
|
||||
#endif
|
||||
#if STM32_HAS_UART5 && STM32_HAS_USART6
|
||||
usart3_usart4_usart5_usart6_lpuart1_irq_init();
|
||||
#else
|
||||
usart3_usart4_lpuart1_irq_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -118,7 +146,11 @@ void irqDeinit(void) {
|
|||
|
||||
tim1_irq_deinit();
|
||||
tim2_irq_deinit();
|
||||
#if STM32_HAS_TIM4
|
||||
tim3_tim4_irq_deinit();
|
||||
#else
|
||||
tim3_irq_deinit();
|
||||
#endif
|
||||
tim6_irq_deinit();
|
||||
tim7_irq_deinit();
|
||||
tim14_irq_deinit();
|
||||
|
|
@ -127,8 +159,16 @@ void irqDeinit(void) {
|
|||
tim17_irq_deinit();
|
||||
|
||||
usart1_irq_deinit();
|
||||
#if STM32_HAS_LPUART2
|
||||
usart2_lpuart2_irq_deinit();
|
||||
#else
|
||||
usart2_irq_deinit();
|
||||
#endif
|
||||
#if STM32_HAS_UART5 && STM32_HAS_USART6
|
||||
usart3_usart4_usart5_usart6_lpuart1_irq_deinit();
|
||||
#else
|
||||
usart3_usart4_lpuart1_irq_deinit();
|
||||
#endif
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
|
|
|||
|
|
@ -49,7 +49,10 @@
|
|||
#define STM32_USART2_SUPPRESS_ISR
|
||||
#define STM32_USART3_SUPPRESS_ISR
|
||||
#define STM32_UART4_SUPPRESS_ISR
|
||||
#define STM32_UART5_SUPPRESS_ISR
|
||||
#define STM32_USART6_SUPPRESS_ISR
|
||||
#define STM32_LPUART1_SUPPRESS_ISR
|
||||
#define STM32_LPUART2_SUPPRESS_ISR
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
|
|
@ -68,12 +71,14 @@
|
|||
#define STM32_DMA1_CH1_HANDLER Vector64
|
||||
#define STM32_DMA1_CH23_HANDLER Vector68
|
||||
#define STM32_DMA1_CH4567_HANDLER Vector6C
|
||||
#define STM32_DMA1_CH4567_DMA2_CH12345_HANDLER Vector6C
|
||||
|
||||
#define STM32_DMA1_CH1_NUMBER 9
|
||||
#define STM32_DMA1_CH23_NUMBER 10
|
||||
#define STM32_DMA1_CH2_NUMBER STM32_DMA1_CH23_NUMBER
|
||||
#define STM32_DMA1_CH3_NUMBER STM32_DMA1_CH23_NUMBER
|
||||
#define STM32_DMA1_CH4567_NUMBER 11
|
||||
#define STM32_DMA1_CH4567_DMA2_CH12345_NUMBER 11
|
||||
#define STM32_DMA1_CH4_NUMBER STM32_DMA1_CH4567_NUMBER
|
||||
#define STM32_DMA1_CH5_NUMBER STM32_DMA1_CH4567_NUMBER
|
||||
#define STM32_DMA1_CH6_NUMBER STM32_DMA1_CH4567_NUMBER
|
||||
|
|
@ -107,9 +112,11 @@
|
|||
*/
|
||||
#define STM32_I2C1_GLOBAL_HANDLER Vector9C
|
||||
#define STM32_I2C2_GLOBAL_HANDLER VectorA0
|
||||
#define STM32_I2C2_I2C3_GLOBAL_HANDLER VectorA0
|
||||
|
||||
#define STM32_I2C1_GLOBAL_NUMBER 23
|
||||
#define STM32_I2C2_GLOBAL_NUMBER 24
|
||||
#define STM32_I2C2_I2C3_GLOBAL_NUMBER 24
|
||||
|
||||
/*
|
||||
* TIM units.
|
||||
|
|
@ -141,11 +148,15 @@
|
|||
*/
|
||||
#define STM32_USART1_HANDLER VectorAC
|
||||
#define STM32_USART2_HANDLER VectorB0
|
||||
#define STM32_USART2_LP2_HANDLER VectorB0
|
||||
#define STM32_USART3_4_LP1_HANDLER VectorB4
|
||||
#define STM32_USART3_4_5_6_LP1_HANDLER VectorB4
|
||||
|
||||
#define STM32_USART1_NUMBER 27
|
||||
#define STM32_USART2_NUMBER 28
|
||||
#define STM32_USART2_LP2_NUMBER 28
|
||||
#define STM32_USART3_4_LP1_NUMBER 29
|
||||
#define STM32_USART3_4_5_6_LP1_NUMBER 29
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
|
|
|
|||
Loading…
Reference in New Issue