mirror of https://github.com/rusefi/ChibiOS.git
I2C. Reorganized locks.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3711 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -666,7 +666,9 @@ msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp,
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dmaStreamSetTransactionSize(i2cp->dmarx, rxbytes);
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dmaStreamSetMode(i2cp->dmarx, ((i2cp->dmamode) | STM32_DMA_CR_DIR_P2M));
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i2c_lld_wait_bus_free(i2cp);
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/* Wait until BUSY flag is reset. */
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while(i2cp->i2c->SR2 & I2C_SR2_BUSY)
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;
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/* wait stop bit from previous transaction*/
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while(i2cp->i2c->CR1 & I2C_CR1_STOP)
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@ -675,6 +677,7 @@ msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp,
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i2cp->i2c->CR2 |= I2C_CR2_ITERREN | I2C_CR2_ITEVTEN;
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i2cp->i2c->CR1 |= I2C_CR1_START | I2C_CR1_ACK;
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chSysLock(); /* this lock will be released in high level part */
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i2c_lld_wait_s(i2cp, timeout, rdymsg);
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return rdymsg;
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@ -724,7 +727,9 @@ msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, uint8_t slave_addr,
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dmaStreamSetTransactionSize(i2cp->dmatx, txbytes);
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dmaStreamSetMode(i2cp->dmatx, ((i2cp->dmamode) | STM32_DMA_CR_DIR_M2P));
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i2c_lld_wait_bus_free(i2cp);
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/* Wait until BUSY flag is reset. */
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while(i2cp->i2c->SR2 & I2C_SR2_BUSY)
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;
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/* wait stop bit from previous transaction*/
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while(i2cp->i2c->CR1 & I2C_CR1_STOP)
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@ -733,6 +738,7 @@ msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, uint8_t slave_addr,
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i2cp->i2c->CR2 |= I2C_CR2_ITERREN | I2C_CR2_ITEVTEN;
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i2cp->i2c->CR1 |= I2C_CR1_START;
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chSysLock(); /* this lock will be released in high level part */
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i2c_lld_wait_s(i2cp, timeout, rdymsg);
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return rdymsg;
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@ -327,13 +327,6 @@ struct I2CDriver{
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/* Driver macros. */
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/*===========================================================================*/
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/**
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* Wait until BUSY flag is reset.
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*/
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#define i2c_lld_wait_bus_free(i2cp) { \
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while(i2cp->i2c->SR2 & I2C_SR2_BUSY) \
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; \
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}
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/**
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* @brief Waits for operation completion.
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* @details This function waits for the driver to complete the current
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@ -349,7 +342,6 @@ struct I2CDriver{
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#define i2c_lld_wait_s(i2cp, timeout, rdymsg) { \
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chDbgAssert((i2cp)->thread == NULL, \
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"_i2c_wait(), #1", "already waiting"); \
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chSysLock(); /* this lock will be disarmed in high level part */ \
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(i2cp)->thread = chThdSelf(); \
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rdymsg = chSchGoSleepTimeoutS(THD_STATE_SUSPENDED, timeout); \
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}
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@ -362,13 +354,13 @@ struct I2CDriver{
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* @notapi
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*/
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#define i2c_lld_wakeup_isr(i2cp) { \
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chSysLockFromIsr(); \
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if ((i2cp)->thread != NULL) { \
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Thread *tp = (i2cp)->thread; \
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(i2cp)->thread = NULL; \
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chSysLockFromIsr(); \
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chSchReadyI(tp); \
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chSysUnlockFromIsr(); \
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} \
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chSysUnlockFromIsr(); \
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}
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/**
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@ -379,14 +371,14 @@ struct I2CDriver{
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* @notapi
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*/
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#define i2c_lld_error_wakeup_isr(i2cp) { \
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chSysLockFromIsr(); \
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if ((i2cp)->thread != NULL) { \
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Thread *tp = (i2cp)->thread; \
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(i2cp)->thread = NULL; \
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chSysLockFromIsr(); \
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tp->p_u.rdymsg = RDY_RESET; \
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chSchReadyI(tp); \
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chSysUnlockFromIsr(); \
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} \
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chSysUnlockFromIsr(); \
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}
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/**
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