diff --git a/demos/STM32/NIL-STM32F746G-DISCOVERY/mcuconf.h b/demos/STM32/NIL-STM32F746G-DISCOVERY/mcuconf.h index 771168c40..773b73d7f 100644 --- a/demos/STM32/NIL-STM32F746G-DISCOVERY/mcuconf.h +++ b/demos/STM32/NIL-STM32F746G-DISCOVERY/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h b/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h index 771168c40..773b73d7f 100644 --- a/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h +++ b/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* diff --git a/demos/STM32/RT-STM32F746ZG-NUCLEO144/mcuconf.h b/demos/STM32/RT-STM32F746ZG-NUCLEO144/mcuconf.h index 019836253..7e767d181 100644 --- a/demos/STM32/RT-STM32F746ZG-NUCLEO144/mcuconf.h +++ b/demos/STM32/RT-STM32F746ZG-NUCLEO144/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h index 14232e090..8c113a97d 100644 --- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h @@ -2103,7 +2103,7 @@ /** * @brief SDMMC frequency. */ -#define STM32_SDMMCCLK STM32_48CLK +#define STM32_SDMMC1CLK STM32_48CLK /** * @brief Clock of timers connected to APB1 diff --git a/readme.txt b/readme.txt index 647a93256..1ca42108f 100644 --- a/readme.txt +++ b/readme.txt @@ -166,6 +166,7 @@ dependencies and configuration directories. This makes possible to have multiple non-conflicting makefiles in the same project. Updated the various platform.mk implementing "smart build" mode. +- HAL: Fixed Clock selection for SDMMC2 missing in STM32F7 HAL (bug #913). - HAL: Fixed STM32 SDMMCv1 driver not setting DMA channel properly for SDCD2 instance (bug #912)(backported to 17.6.4). - LIB: Fixed inner semaphore not updated in chGuardedPoolAllocI() function diff --git a/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h b/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h index b6515d3f4..091f25335 100644 --- a/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h +++ b/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* diff --git a/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h b/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h index ae060c84a..4c60e2535 100644 --- a/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* diff --git a/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h b/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h index 79ee701cf..9f9e44fc6 100644 --- a/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* diff --git a/testhal/STM32/STM32F7xx/SPI/mcuconf.h b/testhal/STM32/STM32F7xx/SPI/mcuconf.h index 6f2d7e011..82ef3b27a 100644 --- a/testhal/STM32/STM32F7xx/SPI/mcuconf.h +++ b/testhal/STM32/STM32F7xx/SPI/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* diff --git a/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h b/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h index eef739866..ddd2d3591 100644 --- a/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h +++ b/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* diff --git a/testhal/STM32/multi/PAL/cfg-stm32f746_discovery/mcuconf.h b/testhal/STM32/multi/PAL/cfg-stm32f746_discovery/mcuconf.h index 771168c40..773b73d7f 100644 --- a/testhal/STM32/multi/PAL/cfg-stm32f746_discovery/mcuconf.h +++ b/testhal/STM32/multi/PAL/cfg-stm32f746_discovery/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* diff --git a/testhal/STM32/multi/UART/cfg-stm32f746_discovery/mcuconf.h b/testhal/STM32/multi/UART/cfg-stm32f746_discovery/mcuconf.h index 04530d3a7..5f19d541b 100644 --- a/testhal/STM32/multi/UART/cfg-stm32f746_discovery/mcuconf.h +++ b/testhal/STM32/multi/UART/cfg-stm32f746_discovery/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* diff --git a/testhal/STM32/multi/USB_CDC/cfg-stm32f746_discovery/mcuconf.h b/testhal/STM32/multi/USB_CDC/cfg-stm32f746_discovery/mcuconf.h index e26790722..af78a4277 100644 --- a/testhal/STM32/multi/USB_CDC/cfg-stm32f746_discovery/mcuconf.h +++ b/testhal/STM32/multi/USB_CDC/cfg-stm32f746_discovery/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /*