F7 mcuconf mass update.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12488 110e8d01-0319-4d1e-a829-52ad28d1bb01
This commit is contained in:
Giovanni Di Sirio 2018-12-28 10:24:53 +00:00
parent dead88309c
commit 8897e0f3e3
17 changed files with 193 additions and 1 deletions

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -150,7 +150,7 @@
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -141,6 +141,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#define STM32_CAN_CAN3_IRQ_PRIORITY 11
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 FALSE
#define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/*
* DAC driver system settings.
*/

View File

@ -152,6 +152,18 @@
#define STM32_CAN_CAN2_IRQ_PRIORITY ${doc.STM32_CAN_CAN2_IRQ_PRIORITY!"11"}
#define STM32_CAN_CAN3_IRQ_PRIORITY ${doc.STM32_CAN_CAN3_IRQ_PRIORITY!"11"}
/*
* CRY driver system settings.
*/
#define STM32_CRY_USE_CRYP1 ${doc.STM32_CRY_USE_CRYP1!"FALSE"}
#define STM32_CRY_USE_HASH1 ${doc.STM32_CRY_USE_HASH1!"FALSE"}
#define STM32_CRY_CRYP1_IRQ_PRIORITY ${doc.STM32_CRY_CRYP1_IRQ_PRIORITY!"9"}
#define STM32_CRY_HASH1_IRQ_PRIORITY ${doc.STM32_CRY_HASH1_IRQ_PRIORITY!"9"}
#define STM32_CRY_HASH1_DMA_STREAM ${doc.STM32_CRY_HASH1_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 7)"}
#define STM32_CRY_HASH1_DMA_PRIORITY ${doc.STM32_CRY_HASH1_DMA_PRIORITY!"0"}
#define STM32_CRY_HASH_SIZE_THRESHOLD ${doc.STM32_CRY_HASH_SIZE_THRESHOLD!"1024"}
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) ${doc.STM32_CRY_HASH_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
/*
* DAC driver system settings.
*/