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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2038 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-06-25 08:55:40 +00:00
parent 62f4b7f471
commit 88bea4b8c2
56 changed files with 9267 additions and 252 deletions
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67
boards/ST_STM8S_DISCOVERY/board.c Normal file
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
/*
* TIM 2 clock after the prescaler.
*/
#define TIM2_CLOCK (SYSCLK / 16)
#define TIM2_ARR ((TIM2_CLOCK / CH_FREQUENCY) - 1)
/*
* TIM2 interrupt handler.
*/
CH_IRQ_HANDLER(13) {
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
TIM2->SR1 = 0;
CH_IRQ_EPILOGUE();
}
/*
* Board initialization code.
*/
void hwinit(void) {
/*
* HAL initialization.
*/
halInit();
/*
* TIM2 initialization as system tick.
*/
CLK->PCKENR1 |= 32; /* PCKEN15, TIM2 clock source.*/
TIM2->PSCR = 4; /* Prescaler divide by 2^4=16.*/
TIM2->ARRH = (uint8_t)(TIM2_ARR >> 8);
TIM2->ARRL = (uint8_t)(TIM2_ARR);
TIM2->CNTRH = 0;
TIM2->CNTRL = 0;
TIM2->SR1 = 0;
TIM2->IER = 1; /* UIE */
TIM2->CR1 = 1; /* CEN */
}

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for Raisonance REva V3 + STM8S208RB daughter board.
*/
/*
* Board identifiers.
*/
#define BOARD_ST_STM8S_DISCOVERY
#define BOARD_NAME "ST STM8S-Discovery"
/*
* Board frequencies.
*/
#define HSECLK 16000000
/*
* MCU model used on the board.
*/
#define STM8S105
/*
* Pin definitions.
*/
#define PA_OSCIN 1
#define PA_OSCOUT 2
#define PC_TS_KEY 1
#define PC_TS_LOADREF 2
#define PC_TS_SHIELD 3
#define PD_LD10 0
#define PD_SWIM 1
#define PD_TX 5
#define PD_RX 6
/*
* Port A initial setup.
*/
#define VAL_GPIOAODR 0
#define VAL_GPIOADDR 0 /* All inputs. */
#define VAL_GPIOACR1 0xFF /* All pull-up or push-pull. */
#define VAL_GPIOACR2 0
/*
* Port B initial setup.
*/
#define VAL_GPIOBODR 0
#define VAL_GPIOBDDR 0 /* All inputs. */
#define VAL_GPIOBCR1 0xFF /* All push-pull. */
#define VAL_GPIOBCR2 0
/*
* Port C initial setup.
*/
#define VAL_GPIOCODR 0
#define VAL_GPIOCDDR 0 /* All inputs. */
#define VAL_GPIOCCR1 0xFF /* All pull-up. */
#define VAL_GPIOCCR2 0
/*
* Port D initial setup.
*/
#define VAL_GPIODODR (1 << PD_LD10) | (1 << PD_TX)
#define VAL_GPIODDDR (1 << PD_LD10) | (1 << PD_TX)
#define VAL_GPIODCR1 0xFF /* All pull-up. */
#define VAL_GPIODCR2 0
/*
* Port E initial setup.
*/
#define VAL_GPIOEODR 0
#define VAL_GPIOEDDR 0 /* All inputs. */
#define VAL_GPIOECR1 0xFF /* All pull-up. */
#define VAL_GPIOECR2 0
/*
* Port F initial setup.
*/
#define VAL_GPIOFODR 0
#define VAL_GPIOFDDR 0 /* All inputs. */
#define VAL_GPIOFCR1 0xFF /* All pull-up. */
#define VAL_GPIOFCR2 0
/*
* Port G initial setup.
*/
#define VAL_GPIOGODR 0
#define VAL_GPIOGDDR 0 /* All inputs. */
#define VAL_GPIOGCR1 0xFF /* All pull-up or push-pull. */
#define VAL_GPIOGCR2 0
#ifdef __cplusplus
extern "C" {
#endif
void hwinit(void);
#ifdef __cplusplus
}
#endif
#endif /* _BOARD_H_ */

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demos/STM8S-STM8S105-DISCOVERY-STVD/ChibiOS-RT.stw Normal file
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; STMicroelectronics Workspace file
[Version]
Keyword=ST7Workspace-V0.7
[Project0]
Filename=cosmic\cosmic.stp
Dependencies=
[Project1]
Filename=raisonance\raisonance.stp
Dependencies=
[Options]
ActiveProject=cosmic
ActiveConfig=Debug
AddSortedElements=0

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demos/STM8S-STM8S105-DISCOVERY-STVD/cosmic/cosmic.stp Normal file
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demos/STM8S-STM8S105-DISCOVERY-STVD/cosmic/vectors.c Normal file
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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief Exception handler type.
*/
typedef void @far @interrupt (*interrupt_handler_t)(void);
/*
* Various external symbols.
*/
void _stext(void);
@far @interrupt void vector13(void);
@far @interrupt void vector17(void);
@far @interrupt void vector18(void);
@far @interrupt void vector20(void);
@far @interrupt void vector21(void);
/**
* @brief Exception vector type.
*/
typedef struct {
uint8_t ev_instruction;
interrupt_handler_t ev_handler;
} exception_vector_t;
/**
* @brief Undefined interrupt handler.
* @note It should never be invoked.
*/
@far @interrupt static void vector (void)
{
return;
}
/**
* @brief Exceptions table.
*/
exception_vector_t const _vectab[] = {
{0x82, (interrupt_handler_t)_stext}, /* reset */
{0x82, vector}, /* trap */
{0x82, vector}, /* vector0 */
{0x82, vector}, /* vector1 */
{0x82, vector}, /* vector2 */
{0x82, vector}, /* vector3 */
{0x82, vector}, /* vector4 */
{0x82, vector}, /* vector5 */
{0x82, vector}, /* vector6 */
{0x82, vector}, /* vector7 */
{0x82, vector}, /* vector8 */
{0x82, vector}, /* vector9 */
{0x82, vector}, /* vector10 */
{0x82, vector}, /* vector11 */
{0x82, vector}, /* vector12 */
{0x82, vector13}, /* vector13 */
{0x82, vector}, /* vector14 */
{0x82, vector}, /* vector15 */
{0x82, vector}, /* vector16 */
#if USE_STM8_UART1
{0x82, vector17}, /* vector17 */
{0x82, vector18}, /* vector18 */
#else
{0x82, vector}, /* vector17 */
{0x82, vector}, /* vector18 */
#endif
{0x82, vector}, /* vector19 */
#if USE_STM8_UART2 || USE_STM8_UART3
{0x82, vector20}, /* vector20 */
{0x82, vector21}, /* vector21 */
#else
{0x82, vector}, /* vector20 */
{0x82, vector}, /* vector21 */
#endif
{0x82, vector}, /* vector22 */
{0x82, vector}, /* vector23 */
{0x82, vector}, /* vector24 */
{0x82, vector}, /* vector25 */
{0x82, vector}, /* vector26 */
{0x82, vector}, /* vector27 */
{0x82, vector}, /* vector28 */
{0x82, vector}, /* vector29 */
};

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef _CHCONF_H_
#define _CHCONF_H_
/*===========================================================================*/
/* Kernel parameters. */
/*===========================================================================*/
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 100
#endif
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 10
#endif
/**
* @brief Nested locks.
* @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock()
* operations is allowed.<br>
* For performance and code size reasons the recommended setting
* is to leave this option disabled.<br>
* You may use this option if you need to merge ChibiOS/RT with
* external libraries that require nested lock/unlock operations.
*
* @note T he default is @p FALSE.
*/
#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)
#define CH_USE_NESTED_LOCKS FALSE
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_COREMEM.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 128
#endif
/*===========================================================================*/
/* Performance options. */
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED FALSE
#endif
/**
* @brief Exotic optimization.
* @details If defined then a CPU register is used as storage for the global
* @p currp variable. Caching this variable in a register greatly
* improves both space and time OS efficiency. A side effect is that
* one less register has to be saved during the context switch
* resulting in lower RAM usage and faster context switch.
*
* @note This option is only usable with the GCC compiler and is only useful
* on processors with many registers like ARM cores.
* @note If this option is enabled then ALL the libraries linked to the
* ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
* -ffixed-@<reg@>.
* @note This option must be enabled in the Makefile, it is listed here for
* documentation only.
*/
#if defined(__DOXYGEN__)
#define CH_CURRP_REGISTER_CACHE "reg"
#endif
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES TRUE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS TRUE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES TRUE
#endif
/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE TRUE
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP TRUE
#endif
/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_COREMEM, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS TRUE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#endif
/*===========================================================================*/
/* Debug options. */
/*===========================================================================*/
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif
/*===========================================================================*/
/* Kernel hooks. */
/*===========================================================================*/
/**
* @brief Threads descriptor structure hook.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitily from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT(tp) { \
/* Add threads initialization code here.*/ \
}
#endif
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT(tp) { \
/* Add threads finalization code here.*/ \
}
#endif
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* _CHCONF_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @addtogroup HAL_CONF
* @{
*/
/*
* HAL configuration file, this file allows to enable or disable the various
* device drivers from your application. You may also use this file in order
* to override the device drivers default settings.
*/
#ifndef _HALCONF_H_
#define _HALCONF_H_
/*
* Uncomment the following line in order to include a mcu-related
* settings file. This file can be used to include platform specific
* header files or to override the low level drivers settings.
*/
#include "mcuconf.h"
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__)
#define CH_HAL_USE_PAL TRUE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__)
#define CH_HAL_USE_ADC FALSE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__)
#define CH_HAL_USE_CAN FALSE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
#define CH_HAL_USE_MAC FALSE
#endif
/*===========================================================================*/
/* PWM driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)
#define CH_HAL_USE_PWM FALSE
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define CH_HAL_USE_SERIAL TRUE
#endif
/*
* Default SERIAL settings overrides (uncomment to override).
*/
/*#define SERIAL_DEFAULT_BITRATE 38400*/
#define SERIAL_BUFFERS_SIZE 16
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_SPI FALSE
#endif
/*
* Default SPI settings overrides (uncomment to override).
*/
/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_MMC_SPI FALSE
#endif
/*
* Default MMC_SPI settings overrides (uncomment to override).
*/
/*#define MMC_SECTOR_SIZE 512*/
/*#define MMC_NICE_WAITING TRUE*/
/*#define MMC_POLLING_INTERVAL 10*/
/*#define MMC_POLLING_DELAY 10*/
#endif /* _HALCONF_H_ */
/** @} */

75
demos/STM8S-STM8S105-DISCOVERY-STVD/demo/main.c Normal file
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@ -0,0 +1,75 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
#include "test.h"
/*
* LEDs blinker thread, times are in milliseconds.
*/
static WORKING_AREA(waThread1, 64);
static msg_t Thread1(void *arg) {
(void)arg;
while (TRUE) {
palClearPad(GPIOD, PD_LD10);
chThdSleepMilliseconds(500);
palSetPad(GPIOD, PD_LD10);
chThdSleepMilliseconds(500);
}
return 0;
}
/*
* Entry point.
*/
void main(void) {
/*
* Board/HAL initialization.
*/
hwinit();
/*
* OS initialization.
*/
chSysInit();
/*
* Activates the serial driver 1 using the driver default configuration.
*/
sdStart(&SD2, NULL);
/*
* Creates the blinker thread.
*/
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
/*
* Normal main() thread activity.
*/
while (TRUE) {
if (palReadPad(GPIOG, 0) == PAL_LOW)
TestThread(&SD2);
if (palReadPad(GPIOG, 1) == PAL_LOW)
sdWriteTimeout(&SD2, "Hello World!\r\n", 14, TIME_INFINITE);
chThdSleepMilliseconds(1000);
}
}

40
demos/STM8S-STM8S105-DISCOVERY-STVD/demo/mcuconf.h Normal file
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@ -0,0 +1,40 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* STM8 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the driver
* is enabled in halconf.h.
*/
/*
* HAL general settings.
*/
#define STM8_CLOCK_SOURCE CLK_SOURCE_HSI
#define STM8_HSI_DIVIDER CLK_HSI_DIV1
#define STM8_CPU_DIVIDER CLK_CPU_DIV1
/*
* SERIAL driver system settings.
*/
#define USE_STM8_UART1 FALSE
#define USE_STM8_UART2 TRUE
#define USE_STM8_UART3 FALSE

2145
demos/STM8S-STM8S105-DISCOVERY-STVD/raisonance/raisonance.stp Normal file
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File diff suppressed because it is too large Load Diff

1
docs/Doxyfile
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@ -608,6 +608,7 @@ INPUT = ../docs/src \
../os/ports/GCC/PPC \ ../os/ports/GCC/PPC \
../os/ports/GCC/PPC/crt0.s \ ../os/ports/GCC/PPC/crt0.s \
../os/ports/GCC/MSP430 \ ../os/ports/GCC/MSP430 \
../os/ports/cosmic/STM8 \
../os/ports/RC/STM8 \ ../os/ports/RC/STM8 \
../os/hal \ ../os/hal \
../os/hal/include \ ../os/hal/include \

158
docs/reports/STM8S105-16-Cosmic.txt Normal file
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@ -0,0 +1,158 @@
***************************************************************************
Options: Optimized for speed
Settings: CPUCLK=16MHz (HSI)
Compiler: Cosmic STM8 compiler 4.3.3.3.
***************************************************************************
*** ChibiOS/RT test suite
***
*** Kernel: 1.5.8unstable
*** Architecture: STM8
*** Platform: STM8x
*** Test Board: ST STM8S-Discovery
----------------------------------------------------------------------------
--- Test Case 1.1 (Threads, enqueuing test #1)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.2 (Threads, enqueuing test #2)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.3 (Threads, priority change)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.4 (Threads, delays)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.1 (Semaphores, enqueuing)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.2 (Semaphores, timeout)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.3 (Semaphores, atomic signal-wait)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.1 (Mutexes, priority enqueuing test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.2 (Mutexes, priority inheritance, simple case)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.3 (Mutexes, priority inheritance, complex case)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.4 (Mutexes, priority return)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.5 (Mutexes, status)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.6 (CondVar, signal test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.7 (CondVar, broadcast test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.8 (CondVar, boost test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.1 (Messages, loop)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.1 (Mailboxes, queuing and timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.1 (Events, registration and dispatch)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.2 (Events, wait and broadcast)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.3 (Events, timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.1 (Heap, allocation and fragmentation test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.1 (Memory Pools, queue/dequeue)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.1 (Dynamic APIs, threads creation from heap)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.3 (Dynamic APIs, registry and references)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.1 (Queues, input queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.2 (Queues, output queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
--- Score : 36081 msgs/S, 72162 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
--- Score : 28594 msgs/S, 57188 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
--- Score : 28594 msgs/S, 57188 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
--- Score : 138392 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 20867 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 32356 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 9234 reschedules/S, 55404 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 70960 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
--- Score : 89420 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 72654 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 291932 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 147316 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
--- System: 218 bytes
--- Thread: 32 bytes
--- Timer : 10 bytes
--- Semaph: 5 bytes
--- EventS: 2 bytes
--- EventL: 5 bytes
--- Mutex : 8 bytes
--- CondV.: 4 bytes
--- Queue : 15 bytes
--- MailB.: 18 bytes
--- Result: SUCCESS
----------------------------------------------------------------------------
Final result: SUCCESS

158
docs/reports/STM8S105-16-Raisonance.txt Normal file
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@ -0,0 +1,158 @@
***************************************************************************
Options: Optimized for speed
Settings: CPUCLK=16MHz (HSI)
Compiler: Raisonance RKit-STM8_2.28.10.0092
***************************************************************************
*** ChibiOS/RT test suite
***
*** Kernel: 1.5.8unstable
*** Architecture: STM8
*** Platform: STM8x
*** Test Board: ST STM8S-Discovery
----------------------------------------------------------------------------
--- Test Case 1.1 (Threads, enqueuing test #1)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.2 (Threads, enqueuing test #2)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.3 (Threads, priority change)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 1.4 (Threads, delays)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.1 (Semaphores, enqueuing)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.2 (Semaphores, timeout)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 2.3 (Semaphores, atomic signal-wait)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.1 (Mutexes, priority enqueuing test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.2 (Mutexes, priority inheritance, simple case)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.3 (Mutexes, priority inheritance, complex case)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.4 (Mutexes, priority return)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.5 (Mutexes, status)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.6 (CondVar, signal test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.7 (CondVar, broadcast test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 3.8 (CondVar, boost test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 4.1 (Messages, loop)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 5.1 (Mailboxes, queuing and timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.1 (Events, registration and dispatch)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.2 (Events, wait and broadcast)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 6.3 (Events, timeouts)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 7.1 (Heap, allocation and fragmentation test)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 8.1 (Memory Pools, queue/dequeue)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.1 (Dynamic APIs, threads creation from heap)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.3 (Dynamic APIs, registry and references)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.1 (Queues, input queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.2 (Queues, output queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
--- Score : 31524 msgs/S, 63048 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
--- Score : 24143 msgs/S, 48286 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
--- Score : 24143 msgs/S, 48286 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
--- Score : 110424 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 17149 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 25946 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 6971 reschedules/S, 41826 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 54880 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
--- Score : 63392 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 55688 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 216712 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 114572 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
--- System: 214 bytes
--- Thread: 32 bytes
--- Timer : 10 bytes
--- Semaph: 5 bytes
--- EventS: 2 bytes
--- EventL: 5 bytes
--- Mutex : 8 bytes
--- CondV.: 4 bytes
--- Queue : 15 bytes
--- MailB.: 18 bytes
--- Result: SUCCESS
----------------------------------------------------------------------------
Final result: SUCCESS

38
os/hal/platforms/STM8/hal_lld.c
View File

@ -49,9 +49,13 @@ ROMCONST PALConfig pal_default_config =
{VAL_GPIODODR, 0, VAL_GPIODDDR, VAL_GPIODCR1, VAL_GPIODCR2}, {VAL_GPIODODR, 0, VAL_GPIODDDR, VAL_GPIODCR1, VAL_GPIODCR2},
{VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2}, {VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},
{VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2}, {VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},
#if defined(STM8S207) || defined(STM8S208) || defined(STM8S105)
{VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2}, {VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2},
#endif
#if defined(STM8S207) || defined(STM8S208)
{VAL_GPIOHODR, 0, VAL_GPIOHDDR, VAL_GPIOHCR1, VAL_GPIOHCR2}, {VAL_GPIOHODR, 0, VAL_GPIOHDDR, VAL_GPIOHCR1, VAL_GPIOHCR2},
{VAL_GPIOIODR, 0, VAL_GPIOIDDR, VAL_GPIOICR1, VAL_GPIOICR2} {VAL_GPIOIODR, 0, VAL_GPIOIDDR, VAL_GPIOICR1, VAL_GPIOICR2},
#endif
} }
}; };
@ -74,37 +78,37 @@ void hal_lld_init(void) {
#if STM8_CLOCK_SOURCE != CLK_SOURCE_DEFAULT #if STM8_CLOCK_SOURCE != CLK_SOURCE_DEFAULT
#if STM8_CLOCK_SOURCE == CLK_SOURCE_HSI #if STM8_CLOCK_SOURCE == CLK_SOURCE_HSI
CLK_ICKR = 1; /* HSIEN */ CLK->ICKR = 1; /* HSIEN */
while ((CLK_ICKR & 2) == 0) /* HSIRDY */ while ((CLK->ICKR & 2) == 0) /* HSIRDY */
; ;
#elif STM8_CLOCK_SOURCE == CLK_SOURCE_LSI #elif STM8_CLOCK_SOURCE == CLK_SOURCE_LSI
CLK_ICKR = 8; /* LSIEN */ CLK->ICKR = 8; /* LSIEN */
while ((CLK_ICKR & 16) == 0) /* LSIRDY */ while ((CLK->ICKR & 16) == 0) /* LSIRDY */
; ;
#else /* STM8_CLOCK_SOURCE == CLK_SOURCE_HSE */ #else /* STM8_CLOCK_SOURCE == CLK_SOURCE_HSE */
CLK_ECKR = 1; /* HSEEN */ CLK->ECKR = 1; /* HSEEN */
while ((CLK_ECKR & 2) == 0) /* HSERDY */ while ((CLK->ECKR & 2) == 0) /* HSERDY */
; ;
#endif #endif
#if STM8_CLOCK_SOURCE != CLK_SOURCE_HSI #if STM8_CLOCK_SOURCE != CLK_SOURCE_HSI
/* Switching clock (manual switch mode).*/ /* Switching clock (manual switch mode).*/
CLK_SWCR = 0; CLK->SWCR = 0;
CLK_SWR = STM8_CLOCK_SOURCE; CLK->SWR = STM8_CLOCK_SOURCE;
while ((CLK_SWCR & 8) == 0) /* SWIF */ while ((CLK->SWCR & 8) == 0) /* SWIF */
; ;
CLK_SWCR = 2; /* SWEN */ CLK->SWCR = 2; /* SWEN */
#endif #endif
/* Setting up clock dividers.*/ /* Setting up clock dividers.*/
CLK_CKDIVR = (STM8_HSI_DIVIDER << 3) | (STM8_CPU_DIVIDER << 0); CLK->CKDIVR = (STM8_HSI_DIVIDER << 3) | (STM8_CPU_DIVIDER << 0);
/* Clocks initially all disabled.*/ /* Clocks initially all disabled.*/
CLK_PCKENR1 = 0; CLK->PCKENR1 = 0;
CLK_PCKENR2 = 0; CLK->PCKENR2 = 0;
/* Other clock related initializations.*/ /* Other clock related initializations.*/
CLK_CSSR = 0; CLK->CSSR = 0;
CLK_CCOR = 0; CLK->CCOR = 0;
CLK_CANCCR = 0; CLK->CANCCR = 0;
#endif /* STM8_CLOCK_SOURCE != CLK_SOURCE_DEFAULT */ #endif /* STM8_CLOCK_SOURCE != CLK_SOURCE_DEFAULT */
} }

54
os/hal/platforms/STM8/pal_lld.h
View File

@ -50,17 +50,6 @@
/* I/O Ports Types and constants. */ /* I/O Ports Types and constants. */
/*===========================================================================*/ /*===========================================================================*/
/**
* @brief GPIO port representation.
*/
typedef struct {
volatile uint8_t ODR;
volatile uint8_t IDR;
volatile uint8_t DDR;
volatile uint8_t CR1;
volatile uint8_t CR2;
} gpio_t;
/** /**
* @brief Generic I/O ports static initializer. * @brief Generic I/O ports static initializer.
* @details An instance of this structure must be passed to @p palInit() at * @details An instance of this structure must be passed to @p palInit() at
@ -69,7 +58,14 @@ typedef struct {
* or whole ports can be reprogrammed at later time. * or whole ports can be reprogrammed at later time.
*/ */
typedef struct { typedef struct {
gpio_t P[9]; #if defined(STM8S207) || defined(STM8S208) || defined(STM8S105) || \
defined(__DOXYGEN__)
GPIO_TypeDef P[7];
#elif defined(STM8S207) || defined(STM8S208)
GPIO_TypeDef P[9];
#else
GPIO_TypeDef P[6];
#endif
} PALConfig; } PALConfig;
/** /**
@ -91,7 +87,7 @@ typedef uint8_t ioportmask_t;
/** /**
* @brief Port Identifier. * @brief Port Identifier.
*/ */
typedef gpio_t *ioportid_t; typedef GPIO_TypeDef *ioportid_t;
/*===========================================================================*/ /*===========================================================================*/
/* I/O Ports Identifiers. */ /* I/O Ports Identifiers. */
@ -105,56 +101,52 @@ typedef gpio_t *ioportid_t;
/** /**
* @brief GPIO port A identifier. * @brief GPIO port A identifier.
*/ */
#define IOPORT1 ((gpio_t *)0x5000) #define IOPORT1 GPIOA
#define GPIOA IOPORT1
/** /**
* @brief GPIO port B identifier. * @brief GPIO port B identifier.
*/ */
#define IOPORT2 ((gpio_t *)0x5005) #define IOPORT2 GPIOB
#define GPIOB IOPORT2
/** /**
* @brief GPIO port C identifier. * @brief GPIO port C identifier.
*/ */
#define IOPORT3 ((gpio_t *)0x500A) #define IOPORT3 GPIOC
#define GPIOC IOPORT3
/** /**
* @brief GPIO port D identifier. * @brief GPIO port D identifier.
*/ */
#define IOPORT4 ((gpio_t *)0x500F) #define IOPORT4 GPIOD
#define GPIOD IOPORT4
/** /**
* @brief GPIO port E identifier. * @brief GPIO port E identifier.
*/ */
#define IOPORT5 ((gpio_t *)0x5014) #define IOPORT5 GPIOE
#define GPIOE IOPORT5
/** /**
* @brief GPIO port F identifier. * @brief GPIO port F identifier.
*/ */
#define IOPORT6 ((gpio_t *)0x5019) #define IOPORT6 GPIOF
#define GPIOF IOPORT6
#if defined(STM8S207) || defined(STM8S208) || defined(STM8S105) || \
defined(__DOXYGEN__)
/** /**
* @brief GPIO port G identifier. * @brief GPIO port G identifier.
*/ */
#define IOPORT7 ((gpio_t *)0x501E) #define IOPORT7 GPIOG
#define GPIOG IOPORT7 #endif
#if defined(STM8S207) || defined(STM8S208) || defined(__DOXYGEN__)
/** /**
* @brief GPIO port H identifier. * @brief GPIO port H identifier.
*/ */
#define IOPORT8 ((gpio_t *)0x5023) #define IOPORT8 GPIOH
#define GPIOH IOPORT8
/** /**
* @brief GPIO port I identifier. * @brief GPIO port I identifier.
*/ */
#define IOPORT9 ((gpio_t *)0x5028) #define IOPORT9 GPIOI
#define GPIOI IOPORT9 #endif
/*===========================================================================*/ /*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */ /* Implementation, some of the following macros could be implemented as */

4
os/hal/platforms/STM8/platform.dox
View File

@ -19,9 +19,9 @@
/** /**
* @defgroup STM8_DRIVERS STM8 Drivers * @defgroup STM8_DRIVERS STM8 Drivers
* @brief STM8 specific support. * @brief Device drivers included in the STM8 support.
* *
* @ingroup platforms * @ingroup STM8
*/ */
/** /**

237
os/hal/platforms/STM8/serial_lld.c
View File

@ -28,30 +28,6 @@
#include "ch.h" #include "ch.h"
#include "hal.h" #include "hal.h"
/* Because someone somewhere couldn't use the same name for the same thing.*/
#if STM8_PLATFORM == PLATFORM_STM8AF51AA
#define UART1_BRR1 USART_BRR1
#define UART1_BRR2 USART_BRR2
#define UART1_SR USART_SR
#define UART1_DR USART_DR
#define UART1_CR1 USART_CR1
#define UART1_CR2 USART_CR2
#define UART1_CR3 USART_CR3
#define UART1_CR4 USART_CR4
#define UART1_CR5 USART_CR5
#define UART3_BRR1 LINUART_BRR1
#define UART3_BRR2 LINUART_BRR2
#define UART3_SR LINUART_SR
#define UART3_DR LINUART_DR
#define UART3_CR1 LINUART_CR1
#define UART3_CR2 LINUART_CR2
#define UART3_CR3 LINUART_CR3
#define UART3_CR4 LINUART_CR4
#define UART3_CR5 LINUART_CR5
#define UART3_CR6 LINUART_CR6
#endif
#if CH_HAL_USE_SERIAL || defined(__DOXYGEN__) #if CH_HAL_USE_SERIAL || defined(__DOXYGEN__)
/*===========================================================================*/ /*===========================================================================*/
@ -65,6 +41,13 @@
SerialDriver SD1; SerialDriver SD1;
#endif #endif
/**
* @brief UART2 serial driver identifier.
*/
#if USE_STM8_UART2 || defined(__DOXYGEN__)
SerialDriver SD2;
#endif
/** /**
* @brief UART3 serial driver identifier. * @brief UART3 serial driver identifier.
*/ */
@ -91,13 +74,15 @@ static ROMCONST SerialConfig default_config = {
static void set_error(SerialDriver *sdp, uint8_t sr) { static void set_error(SerialDriver *sdp, uint8_t sr) {
sdflags_t sts = 0; sdflags_t sts = 0;
if (sr & 0x08) /* OR bit. */ /* Note, SR register bit definitions are equal for all UARTs so using
the UART1 definitions is fine.*/
if (sr & UART1_SR_OR)
sts |= SD_OVERRUN_ERROR; sts |= SD_OVERRUN_ERROR;
if (sr & 0x04) /* NF bit. */ if (sr & UART1_SR_NF)
sts |= SD_NOISE_ERROR; sts |= SD_NOISE_ERROR;
if (sr & 0x02) /* FE bit. */ if (sr & UART1_SR_FE)
sts |= SD_FRAMING_ERROR; sts |= SD_FRAMING_ERROR;
if (sr & 0x01) /* PE bit. */ if (sr & UART1_SR_PE)
sts |= SD_PARITY_ERROR; sts |= SD_PARITY_ERROR;
chSysLockFromIsr(); chSysLockFromIsr();
sdAddFlagsI(sdp, sts); sdAddFlagsI(sdp, sts);
@ -107,7 +92,7 @@ static void set_error(SerialDriver *sdp, uint8_t sr) {
#if USE_STM8_UART1 || defined(__DOXYGEN__) #if USE_STM8_UART1 || defined(__DOXYGEN__)
static void notify1(void) { static void notify1(void) {
UART1_CR2 |= 0x80; /* TIEN bit. */ UART1->CR2 |= UART1_CR2_TIEN;
} }
/** /**
@ -117,18 +102,18 @@ static void notify1(void) {
*/ */
static void uart1_init(const SerialConfig *config) { static void uart1_init(const SerialConfig *config) {
UART1_BRR2 = ((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) | UART1->BRR2 = (uint8_t)(((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) |
((uint8_t)config->sc_brr & (uint8_t)0x0F); ((uint8_t)config->sc_brr & (uint8_t)0x0F));
UART1_BRR1 = (uint8_t)(config->sc_brr >> 4); UART1->BRR1 = (uint8_t)(config->sc_brr >> 4);
UART1_CR1 = config->sc_mode & UART1->CR1 = (uint8_t)(config->sc_mode &
SD_MODE_PARITY; /* PIEN included. */ SD_MODE_PARITY); /* PIEN included. */
UART1_CR2 = 0x2C; /* RIEN | TEN | REN. */ UART1->CR2 = UART1_CR2_RIEN | UART1_CR2_TEN | UART1_CR2_REN;
UART1_CR3 = config->sc_mode & SD_MODE_STOP; UART1->CR3 = (uint8_t)(config->sc_mode & SD_MODE_STOP);
UART1_CR4 = 0; UART1->CR4 = 0;
UART1_CR5 = 0; UART1->CR5 = 0;
UART1_PSCR = 1; UART1->PSCR = 1;
(void)UART1_SR; (void)UART1->SR;
(void)UART1_DR; (void)UART1->DR;
} }
/** /**
@ -136,19 +121,62 @@ static void uart1_init(const SerialConfig *config) {
*/ */
static void uart1_deinit(void) { static void uart1_deinit(void) {
UART1_CR1 = 0x20; /* UARTD (low power). */ UART1->CR1 = UART1_CR1_UARTD;
UART1_CR2 = 0; UART1->CR2 = 0;
UART1_CR3 = 0; UART1->CR3 = 0;
UART1_CR4 = 0; UART1->CR4 = 0;
UART1_CR5 = 0; UART1->CR5 = 0;
UART1_PSCR = 0; UART1->PSCR = 0;
}
#endif /* USE_STM8_UART1 */
#if USE_STM8_UART2 || defined(__DOXYGEN__)
static void notify2(void) {
UART2->CR2 |= UART2_CR2_TIEN;
}
/**
* @brief UART2 initialization.
*
* @param[in] config architecture-dependent serial driver configuration
*/
static void uart2_init(const SerialConfig *config) {
UART2->BRR2 = (uint8_t)(((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) |
((uint8_t)config->sc_brr & (uint8_t)0x0F));
UART2->BRR1 = (uint8_t)(config->sc_brr >> 4);
UART2->CR1 = (uint8_t)(config->sc_mode &
SD_MODE_PARITY); /* PIEN included. */
UART2->CR2 = UART2_CR2_RIEN | UART2_CR2_TEN | UART2_CR2_REN;
UART2->CR3 = (uint8_t)(config->sc_mode & SD_MODE_STOP);
UART2->CR4 = 0;
UART2->CR5 = 0;
UART2->CR6 = 0;
UART2->PSCR = 1;
(void)UART2->SR;
(void)UART2->DR;
}
/**
* @brief UART1 de-initialization.
*/
static void uart2_deinit(void) {
UART2->CR1 = UART2_CR1_UARTD;
UART2->CR2 = 0;
UART2->CR3 = 0;
UART2->CR4 = 0;
UART2->CR5 = 0;
UART2->CR6 = 0;
UART2->PSCR = 0;
} }
#endif /* USE_STM8_UART1 */ #endif /* USE_STM8_UART1 */
#if USE_STM8_UART3 || defined(__DOXYGEN__) #if USE_STM8_UART3 || defined(__DOXYGEN__)
static void notify3(void) { static void notify3(void) {
UART3_CR2 |= 0x80; /* TIEN bit. */ UART3->CR2 |= UART3_CR2_TIEN;
} }
/** /**
@ -158,17 +186,17 @@ static void notify3(void) {
*/ */
static void uart3_init(const SerialConfig *config) { static void uart3_init(const SerialConfig *config) {
UART3_BRR2 = ((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) | UART3->BRR2 = (uint8_t)(((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) |
((uint8_t)config->sc_brr & (uint8_t)0x0F); ((uint8_t)config->sc_brr & (uint8_t)0x0F));
UART3_BRR1 = (uint8_t)(config->sc_brr >> 4); UART3->BRR1 = (uint8_t)(config->sc_brr >> 4);
UART3_CR1 = config->sc_mode & UART3->CR1 = (uint8_t)(config->sc_mode &
SD_MODE_PARITY; /* PIEN included. */ SD_MODE_PARITY); /* PIEN included. */
UART3_CR2 = 0x2C; /* RIEN | TEN | REN. */ UART3->CR2 = UART3_CR2_RIEN | UART3_CR2_TEN | UART3_CR2_REN;
UART3_CR3 = config->sc_mode & SD_MODE_STOP; UART3->CR3 = (uint8_t)(config->sc_mode & SD_MODE_STOP);
UART3_CR4 = 0; UART3->CR4 = 0;
UART3_CR6 = 0; UART3->CR6 = 0;
(void)UART3_SR; (void)UART3->SR;
(void)UART3_DR; (void)UART3->DR;
} }
/** /**
@ -176,11 +204,11 @@ static void uart3_init(const SerialConfig *config) {
*/ */
static void uart3_deinit(void) { static void uart3_deinit(void) {
UART3_CR1 = 0x20; /* UARTD (low power). */ UART3->CR1 = UART3_CR1_UARTD;
UART3_CR2 = 0; UART3->CR2 = 0;
UART3_CR3 = 0; UART3->CR3 = 0;
UART3_CR4 = 0; UART3->CR4 = 0;
UART3_CR6 = 0; UART3->CR6 = 0;
} }
#endif /* USE_STM8_UART3 */ #endif /* USE_STM8_UART3 */
@ -198,28 +226,62 @@ CH_IRQ_HANDLER(17) {
b = sdRequestDataI(&SD1); b = sdRequestDataI(&SD1);
chSysUnlockFromIsr(); chSysUnlockFromIsr();
if (b < Q_OK) if (b < Q_OK)
UART1_CR2 &= ~0x80; /* TIEN. */ UART1->CR2 &= (uint8_t)~UART1_CR2_TIEN;
else else
UART1_DR = b; UART1->DR = (uint8_t)b;
CH_IRQ_EPILOGUE(); CH_IRQ_EPILOGUE();
} }
CH_IRQ_HANDLER(18) { CH_IRQ_HANDLER(18) {
uint8_t sr = UART1_SR; uint8_t sr = UART1->SR;
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
if ((sr = UART1_SR) & 0x0F) /* OR | BF | FE | PE. */ if ((sr = UART1->SR) & (UART1_SR_OR | UART1_SR_NF |
UART1_SR_FE | UART1_SR_PE))
set_error(&SD1, sr); set_error(&SD1, sr);
chSysLockFromIsr(); chSysLockFromIsr();
sdIncomingDataI(&SD1, UART1_DR); sdIncomingDataI(&SD1, UART1->DR);
chSysUnlockFromIsr(); chSysUnlockFromIsr();
CH_IRQ_EPILOGUE(); CH_IRQ_EPILOGUE();
} }
#endif /* USE_STM8_UART1 */ #endif /* USE_STM8_UART1 */
#if USE_STM8_UART2 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(20) {
msg_t b;
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
b = sdRequestDataI(&SD2);
chSysUnlockFromIsr();
if (b < Q_OK)
UART2->CR2 &= (uint8_t)~UART2_CR2_TIEN;
else
UART2->DR = (uint8_t)b;
CH_IRQ_EPILOGUE();
}
CH_IRQ_HANDLER(21) {
uint8_t sr = UART2->SR;
CH_IRQ_PROLOGUE();
if ((sr = UART2->SR) & (UART2_SR_OR | UART2_SR_NF |
UART2_SR_FE | UART2_SR_PE))
set_error(&SD2, sr);
chSysLockFromIsr();
sdIncomingDataI(&SD2, UART2->DR);
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
}
#endif /* USE_STM8_UART2 */
#if USE_STM8_UART3 || defined(__DOXYGEN__) #if USE_STM8_UART3 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(20) { CH_IRQ_HANDLER(20) {
msg_t b; msg_t b;
@ -230,22 +292,23 @@ CH_IRQ_HANDLER(20) {
b = sdRequestDataI(&SD3); b = sdRequestDataI(&SD3);
chSysUnlockFromIsr(); chSysUnlockFromIsr();
if (b < Q_OK) if (b < Q_OK)
UART3_CR2 &= ~0x80; /* TIEN. */ UART3->CR2 &= (uint8_t)~UART3_CR2_TIEN;
else else
UART3_DR = b; UART3->DR = (uint8_t)b;
CH_IRQ_EPILOGUE(); CH_IRQ_EPILOGUE();
} }
CH_IRQ_HANDLER(21) { CH_IRQ_HANDLER(21) {
uint8_t sr = UART3_SR; uint8_t sr = UART3->SR;
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
if ((sr = UART3_SR) & 0x0F) /* OR | BF | FE | PE. */ if ((sr = UART3->SR) & (UART3_SR_OR | UART3_SR_NF |
UART3_SR_FE | UART3_SR_PE))
set_error(&SD3, sr); set_error(&SD3, sr);
chSysLockFromIsr(); chSysLockFromIsr();
sdIncomingDataI(&SD3, UART3_DR); sdIncomingDataI(&SD3, UART3->DR);
chSysUnlockFromIsr(); chSysUnlockFromIsr();
CH_IRQ_EPILOGUE(); CH_IRQ_EPILOGUE();
@ -263,14 +326,20 @@ void sd_lld_init(void) {
#if USE_STM8_UART1 #if USE_STM8_UART1
sdObjectInit(&SD1, NULL, notify1); sdObjectInit(&SD1, NULL, notify1);
CLK_PCKENR1 |= 4; /* PCKEN12, clock source. */ CLK->PCKENR1 |= CLK_PCKENR1_UART1; /* PCKEN12, clock source. */
UART1_CR1 = 0x20; /* UARTD (low power). */ UART1->CR1 = UART1_CR1_UARTD; /* UARTD (low power). */
#endif
#if USE_STM8_UART2
sdObjectInit(&SD2, NULL, notify2);
CLK->PCKENR1 |= CLK_PCKENR1_UART2; /* PCKEN13, clock source. */
UART2->CR1 = UART2_CR1_UARTD; /* UARTD (low power). */
#endif #endif
#if USE_STM8_UART3 #if USE_STM8_UART3
sdObjectInit(&SD3, NULL, notify3); sdObjectInit(&SD3, NULL, notify3);
CLK_PCKENR1 |= 8; /* PCKEN13, clock source. */ CLK->PCKENR1 |= CLK_PCKENR1_UART3; /* PCKEN13, clock source. */
UART3_CR1 = 0x20; /* UARTD (low power). */ UART3->CR1 = UART3_CR1_UARTD; /* UARTD (low power). */
#endif #endif
} }
@ -293,6 +362,12 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
return; return;
} }
#endif #endif
#if USE_STM8_UART2
if (&SD2 == sdp) {
uart2_init(config);
return;
}
#endif
#if USE_STM8_UART3 #if USE_STM8_UART3
if (&SD3 == sdp) { if (&SD3 == sdp) {
uart3_init(config); uart3_init(config);
@ -316,6 +391,12 @@ void sd_lld_stop(SerialDriver *sdp) {
return; return;
} }
#endif #endif
#if USE_STM8_UART2
if (&SD2 == sdp) {
uart2_deinit();
return;
}
#endif
#if USE_STM8_UART3 #if USE_STM8_UART3
if (&SD3 == sdp) { if (&SD3 == sdp) {
uart3_deinit(); uart3_deinit();

16
os/hal/platforms/STM8/serial_lld.h
View File

@ -57,6 +57,15 @@
#define USE_STM8_UART1 TRUE #define USE_STM8_UART1 TRUE
#endif #endif
/**
* @brief UART2 driver enable switch.
* @details If set to @p TRUE the support for UART3 is included.
* @note The default is @p TRUE.
*/
#if !defined(USE_STM8_UART2) || defined(__DOXYGEN__)
#define USE_STM8_UART2 TRUE
#endif
/** /**
* @brief UART3 driver enable switch. * @brief UART3 driver enable switch.
* @details If set to @p TRUE the support for UART3 is included. * @details If set to @p TRUE the support for UART3 is included.
@ -70,6 +79,10 @@
/* Derived constants and error checks. */ /* Derived constants and error checks. */
/*===========================================================================*/ /*===========================================================================*/
#if USE_STM8_UART2 && USE_STM8_UART3
#error "STM8 UART2 and UART3 cannot be used together"
#endif
/*===========================================================================*/ /*===========================================================================*/
/* Driver data structures and types. */ /* Driver data structures and types. */
/*===========================================================================*/ /*===========================================================================*/
@ -136,6 +149,9 @@ typedef struct {
#if USE_STM8_UART1 && !defined(__DOXYGEN__) #if USE_STM8_UART1 && !defined(__DOXYGEN__)
extern SerialDriver SD1; extern SerialDriver SD1;
#endif #endif
#if USE_STM8_UART2 && !defined(__DOXYGEN__)
extern SerialDriver SD2;
#endif
#if USE_STM8_UART3 && !defined(__DOXYGEN__) #if USE_STM8_UART3 && !defined(__DOXYGEN__)
extern SerialDriver SD3; extern SerialDriver SD3;
#endif #endif

21
os/hal/platforms/STM8/stm8.h
View File

@ -20,22 +20,17 @@
#ifndef _STM8_H_ #ifndef _STM8_H_
#define _STM8_H_ #define _STM8_H_
/* #undef FALSE
* Supported platforms. #undef TRUE
*/
#define PLATFORM_STM8S208RB 1
#define PLATFORM_STM8AF51AA 2
#ifndef STM8_PLATFORM #if defined(STM8S208) || defined(STM8S207) || defined(STM8S105) || \
#error "STM8 platform not defined" defined(STM8S103) || defined (STM8S903)
#endif #include "stm8s.h"
#if STM8_PLATFORM == PLATFORM_STM8S208RB
#include "STM8/STM8S208RB.h"
#elif STM8_PLATFORM == PLATFORM_STM8AF51AA
#include "STM8/STM8AF51AA.h"
#else #else
#error "unsupported or invalid STM8 platform" #error "unsupported or invalid STM8 platform"
#endif #endif
#define FALSE 0
#define TRUE (!FALSE)
#endif /* _STM8_H_ */ #endif /* _STM8_H_ */

2567
os/hal/platforms/STM8/stm8s.h Normal file
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File diff suppressed because it is too large Load Diff

103
os/hal/platforms/STM8/stm8s_type.h Normal file
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@ -0,0 +1,103 @@
/**
******************************************************************************
* @file stm8s_type.h
* @brief This file contains all common data types.
* @author STMicroelectronics - MCD Application Team
* @version V1.1.1
* @date 06/05/2009
******************************************************************************
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
* @image html logo.bmp
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM8S_TYPE_H
#define __STM8S_TYPE_H
/* Includes ------------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
typedef signed long s32;
typedef signed short s16;
typedef signed char s8;
typedef signed long const sc32; /* Read Only */
typedef signed short const sc16; /* Read Only */
typedef signed char const sc8; /* Read Only */
typedef volatile signed long vs32;
typedef volatile signed short vs16;
typedef volatile signed char vs8;
typedef volatile signed long const vsc32; /* Read Only */
typedef volatile signed short const vsc16; /* Read Only */
typedef volatile signed char const vsc8; /* Read Only */
typedef unsigned long u32;
typedef unsigned short u16;
typedef unsigned char u8;
typedef unsigned long const uc32; /* Read Only */
typedef unsigned short const uc16; /* Read Only */
typedef unsigned char const uc8; /* Read Only */
typedef volatile unsigned long vu32;
typedef volatile unsigned short vu16;
typedef volatile unsigned char vu8;
typedef volatile unsigned long const vuc32; /* Read Only */
typedef volatile unsigned short const vuc16; /* Read Only */
typedef volatile unsigned char const vuc8; /* Read Only */
typedef enum
{
FALSE = 0,
TRUE = !FALSE
}
bool;
typedef enum {
RESET = 0,
SET = !RESET
}
FlagStatus, ITStatus, BitStatus;
typedef enum {
DISABLE = 0,
ENABLE = !DISABLE
}
FunctionalState;
#define IS_FUNCTIONALSTATE_OK(VALUE) ( (VALUE == ENABLE) || (VALUE == DISABLE) )
typedef enum {
ERROR = 0,
SUCCESS = !ERROR
}
ErrorStatus;
#define U8_MAX ((u8)255)
#define S8_MAX ((s8)127)
#define S8_MIN ((s8)-128)
#define U16_MAX ((u16)65535u)
#define S16_MAX ((s16)32767)
#define S16_MIN ((s16)-32768)
#define U32_MAX ((u32)4294967295uL)
#define S32_MAX ((s32)2147483647)
#define S32_MIN ((s32)-2147483648)
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
#endif /* __STM8S_TYPE_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/

13
os/kernel/include/chbsem.h
View File

@ -67,10 +67,10 @@ typedef struct {
* that is part of a bigger structure. * that is part of a bigger structure.
* *
* @param[in] name the name of the semaphore variable * @param[in] name the name of the semaphore variable
* @param[in] n the counter initial value, this value must be * @param[in] taken the semaphore initial state
* non-negative
*/ */
#define _BSEMAPHORE_DATA(name, t) {_SEMAPHORE_DATA(name.bs_sem), ((t) ? 0 : 1)} #define _BSEMAPHORE_DATA(name, taken) \
{_SEMAPHORE_DATA(name.bs_sem), ((taken) ? 0 : 1)}
/** /**
* @brief Static semaphore initializer. * @brief Static semaphore initializer.
@ -78,11 +78,10 @@ typedef struct {
* initialization using @p chSemInit(). * initialization using @p chSemInit().
* *
* @param[in] name the name of the semaphore variable * @param[in] name the name of the semaphore variable
* @param[in] n the counter initial value, this value must be * @param[in] taken the semaphore initial state
* non-negative
*/ */
#define BSEMAPHORE_DECL(name, t) Semaphore name = _BSEMAPHORE_DATA(name, t) #define BSEMAPHORE_DECL(name, taken) \
BinarySemaphore name = _BSEMAPHORE_DATA(name, taken)
/** /**
* @brief Initializes a binary semaphore. * @brief Initializes a binary semaphore.

4
os/ports/RC/STM8/chcore.c
View File

@ -19,9 +19,9 @@
/** /**
* @file RC/STM8/chcore.c * @file RC/STM8/chcore.c
* @brief STM8 architecture port code. * @brief STM8 (Raisonance) architecture port code.
* *
* @addtogroup STM8_CORE * @addtogroup STM8_RAISONANCE_CORE
* @{ * @{
*/ */
#pragma SRC("tmp.asm") #pragma SRC("tmp.asm")

19
os/ports/RC/STM8/chcore.h
View File

@ -19,9 +19,9 @@
/** /**
* @file RC/STM8/chcore.h * @file RC/STM8/chcore.h
* @brief STM8 architecture port macros and structures. * @brief STM8 (Raisonance) architecture port macros and structures.
* *
* @addtogroup STM8_CORE * @addtogroup STM8_RAISONANCE_CORE
* @{ * @{
*/ */
@ -160,14 +160,11 @@ struct stm8_startctx {
/** /**
* @brief Per-thread stack overhead for interrupts servicing. * @brief Per-thread stack overhead for interrupts servicing.
* @details This constant is used in the calculation of the correct working * @details This is a safe value, you may trim it down after reading the
* area size. * right size in the map file.
* This value can be zero on those architecture where there is a
* separate interrupt stack and the stack space between @p intctx and
* @p extctx is known to be zero.
*/ */
#ifndef INT_REQUIRED_STACK #ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 32 #define INT_REQUIRED_STACK 48
#endif #endif
/** /**
@ -212,7 +209,7 @@ struct stm8_startctx {
* @note @p id can be a function name or a vector number depending on the * @note @p id can be a function name or a vector number depending on the
* port implementation. * port implementation.
*/ */
#define PORT_IRQ_HANDLER(id) void irq##id(void) interrupt id #define PORT_IRQ_HANDLER(id) void vector##id(void) interrupt id
/** /**
* @brief Port-related initialization code. * @brief Port-related initialization code.
@ -289,9 +286,9 @@ struct stm8_startctx {
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
void port_halt(void);
void _port_switch(Thread *otp); void _port_switch(Thread *otp);
void _port_thread_start(void); void _port_thread_start(void);
void port_halt(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
@ -318,7 +315,7 @@ typedef struct {
#endif #endif
} ReadyList; } ReadyList;
extern page0 ReadyList rlist; page0 extern ReadyList rlist;
#endif /* _CHCORE_H_ */ #endif /* _CHCORE_H_ */

10
os/ports/RC/STM8/chtypes.h
View File

@ -18,10 +18,10 @@
*/ */
/** /**
* @file STM8/chtypes.h * @file RC/STM8/chtypes.h
* @brief STM8 port system types. * @brief STM8 (Raisonance) port system types.
* *
* @addtogroup STM8_CORE * @addtogroup STM8_RAISONANCE_CORE
* @{ * @{
*/ */
@ -94,7 +94,7 @@ typedef uint16_t systime_t;
/** /**
* @brief Counter, recommended fastest signed. * @brief Counter, recommended fastest signed.
*/ */
typedef int16_t cnt_t; typedef int8_t cnt_t;
/** /**
* @brief Inline function modifier. * @brief Inline function modifier.
@ -103,7 +103,7 @@ typedef int16_t cnt_t;
/** /**
* @brief ROM constant modifier. * @brief ROM constant modifier.
* @note Uses the custom "code" keyword in this port. * @note Uses the "const" keyword in this port.
*/ */
#define ROMCONST code #define ROMCONST code

20
os/ports/RC/STM8/port.dox
View File

@ -18,10 +18,10 @@
*/ */
/** /**
* @defgroup STM8 STM8 * @defgroup STM8_RAISONANCE STM8
* @details STM8 port for the Raisonance C compiler. * @details STM8 port for the Raisonance C compiler.
* *
* @section STM8_STATES Mapping of the System States in the STM8 port * @section STM8_RAISONANCE_STATES Mapping of the System States in the STM8 port
* The ChibiOS/RT logical @ref system_states are mapped as follow in the STM8 * The ChibiOS/RT logical @ref system_states are mapped as follow in the STM8
* port: * port:
* - <b>Init</b>. This state is represented by the startup code and the * - <b>Init</b>. This state is represented by the startup code and the
@ -44,7 +44,7 @@
* maskable interrupt sources that can be associated to this state. * maskable interrupt sources that can be associated to this state.
* - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled. * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
* . * .
* @section STM8_NOTES The STM8 port notes * @section STM8_RAISONANCE_NOTES The STM8 port notes
* - The STM8 does not have a dedicated interrupt stack, make sure to reserve * - The STM8 does not have a dedicated interrupt stack, make sure to reserve
* enough stack space for interrupts in each thread stack. This can be done * enough stack space for interrupts in each thread stack. This can be done
* by modifying the @p INT_REQUIRED_STACK macro into * by modifying the @p INT_REQUIRED_STACK macro into
@ -61,7 +61,7 @@
*/ */
/** /**
* @defgroup STM8_CONF Configuration Options * @defgroup STM8_RAISONANCE_CONF Configuration Options
* @brief STM8 Configuration Options. * @brief STM8 Configuration Options.
* @details The STM8 port allows some architecture-specific configurations * @details The STM8 port allows some architecture-specific configurations
* settings that can be specified externally, as example on the compiler * settings that can be specified externally, as example on the compiler
@ -72,15 +72,15 @@
* thread so be careful in order to not waste precious RAM space.<br> * thread so be careful in order to not waste precious RAM space.<br>
* The default value is set into <b>./os/ports/RC/STM8/chcore.h</b>. * The default value is set into <b>./os/ports/RC/STM8/chcore.h</b>.
* . * .
* @ingroup STM8 * @ingroup STM8_RAISONANCE
*/ */
/** /**
* @defgroup STM8_CORE Core Port Implementation * @defgroup STM8_RAISONANCE_CORE Core Port Implementation
* @brief STM8 specific port code, structures and macros. * @brief STM8 specific port code, structures and macros.
* *
* @ingroup STM8 * @ingroup STM8_RAISONANCE
* @file STM8/chtypes.h Port types. * @file RC/STM8/chtypes.h Port types.
* @file STM8/chcore.h Port related structures and macros. * @file RC/STM8/chcore.h Port related structures and macros.
* @file STM8/chcore.c Port related code. * @file RC/STM8/chcore.c Port related code.
*/ */

70
os/ports/cosmic/STM8/chcore.c Normal file
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@ -0,0 +1,70 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file cosmic/STM8/chcore.c
* @brief STM8 (Cosmic) architecture port code.
*
* @addtogroup STM8_COSMIC_CORE
* @{
*/
#include "ch.h"
@tiny ReadyList rlist;
/**
* @brief Performs a context switch between two threads.
*
* @param otp the thread to be switched out
*/
void _port_switch(Thread *otp) {
_asm(" xref _rlist \n"
" ldw y,sp \n"
" ldw (5,x),y \n"
" ldw x,_rlist+5 \n"
" ldw x,(5,x) \n"
" ldw sp,x \n", otp);
}
/**
* @brief Thread start code.
*/
void _port_thread_start(void) {
_asm(" rim \n"
" popw x \n");
}
/**
* @brief Halts the system.
* @details This function is invoked by the operating system when an
* unrecoverable error is detected (as example because a programming
* error in the application code that triggers an assertion while in
* debug mode).
*/
void port_halt(void) {
port_disable();
while (TRUE) {
}
}
/** @} */

320
os/ports/cosmic/STM8/chcore.h Normal file
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@ -0,0 +1,320 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file cosmic/STM8/chcore.h
* @brief STM8 (Cosmic) architecture port macros and structures.
*
* @addtogroup STM8_COSMIC_CORE
* @{
*/
#ifndef _CHCORE_H_
#define _CHCORE_H_
/*===========================================================================*/
/* Port configurable parameters. */
/*===========================================================================*/
/**
* @brief Enables the use of the WFI instruction in the idle thread loop.
*/
#ifndef STM8_ENABLE_WFI_IDLE
#define STM8_ENABLE_WFI_IDLE FALSE
#endif
/*===========================================================================*/
/* Port exported info. */
/*===========================================================================*/
/**
* @brief Unique macro for the implemented architecture.
*/
#define CH_ARCHITECTURE_STM8
/**
* @brief Name of the implemented architecture.
*/
#define CH_ARCHITECTURE_NAME "STM8"
/*===========================================================================*/
/* Port implementation part. */
/*===========================================================================*/
/**
* @brief Base type for stack alignment.
* @note No alignment constraints so uint8_t.
*/
typedef uint8_t stkalign_t;
/**
* @brief Generic STM8 function pointer.
* @note It is used to allocate the proper size for return addresses in
* context-related structures.
*/
typedef void (*stm8func_t)(void);
#if !defined(__DOXYGEN__)
/**
* @brief Interrupt saved context.
* @details This structure represents the stack frame saved during a
* preemption-capable interrupt handler.
* @note The structure requires one dummy field at its start because the
* stack is handled as preincremented/postdecremented.
*/
struct extctx {
uint8_t _next;
uint8_t c_y[3];
uint8_t c_x[3];
uint8_t cc;
uint8_t a;
uint16_t x;
uint16_t y;
uint8_t pce;
uint8_t pch;
uint8_t pcl;
};
#endif
#if !defined(__DOXYGEN__)
/**
* @brief System saved context.
* @details This structure represents the inner stack frame during a context
* switching..
* @note The structure requires one dummy field at its start because the
* stack is handled as preincremented/postdecremented.
*/
struct intctx {
uint8_t _next;
stm8func_t pc; /* Function pointer sized return address. */
};
#endif
#if !defined(__DOXYGEN__)
/**
* @brief Platform dependent part of the @p Thread structure.
* @details This structure usually contains just the saved stack pointer
* defined as a pointer to a @p intctx structure.
*/
struct context {
struct intctx *sp;
};
#endif
/**
* @brief Start context.
* @details This context is the stack organization for the trampoline code
* @p _port_thread_start().
*/
struct stm8_startctx {
uint8_t _next;
stm8func_t ts; /* Trampoline address. */
void *arg; /* Thread argument. */
stm8func_t pc; /* Thread function address. */
stm8func_t ret; /* chThdExit() address. */
};
/**
* @brief Platform dependent part of the @p chThdInit() API.
* @details This code usually setup the context switching frame represented
* by an @p intctx structure.
*/
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
struct stm8_startctx *scp; \
scp = (struct stm8_startctx *)((uint8_t *)workspace + wsize - \
sizeof(struct stm8_startctx)); \
scp->ts = _port_thread_start; \
scp->arg = arg; \
scp->pc = (stm8func_t)pf; \
scp->ret = (stm8func_t)chThdExit; \
tp->p_ctx.sp = (struct intctx *)scp; \
}
/**
* @brief Stack size for the system idle thread.
* @details This size depends on the idle thread implementation, usually
* the idle thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 0
#endif
/**
* @brief Per-thread stack overhead for interrupts servicing.
* @details This is a safe value, you may trim it down after reading the
* right size in the map file.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 48
#endif
/**
* @brief Enforces a correct alignment for a stack area size value.
*/
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
/**
* @brief Computes the thread working area global size.
*/
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
(sizeof(struct intctx) - 1) + \
(sizeof(struct extctx) - 1) + \
(n) + (INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
* @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
/**
* @brief IRQ prologue code.
* @details This macro must be inserted at the start of all IRQ handlers
* enabled to invoke system APIs.
*/
#define PORT_IRQ_PROLOGUE()
/**
* @brief IRQ epilogue code.
* @details This macro must be inserted at the end of all IRQ handlers
* enabled to invoke system APIs.
*/
#define PORT_IRQ_EPILOGUE() { \
if (chSchIsRescRequiredExI()) \
chSchDoRescheduleI(); \
}
/**
* @brief IRQ handler function declaration.
* @note @p id can be a function name or a vector number depending on the
* port implementation.
*/
#define PORT_IRQ_HANDLER(id) @far @interrupt void vector##id(void)
/**
* @brief Port-related initialization code.
* @note None in this port.
*/
#define port_init()
/**
* @brief Kernel-lock action.
* @note Implemented as global interrupts disable.
*/
#define port_lock() _asm("sim")
/**
* @brief Kernel-unlock action.
* @note Implemented as global interrupts enable.
*/
#define port_unlock() _asm("rim")
/**
* @brief Kernel-lock action from an interrupt handler.
* @note This function is empty in this port.
*/
#define port_lock_from_isr()
/**
* @brief Kernel-unlock action from an interrupt handler.
* @note This function is empty in this port.
*/
#define port_unlock_from_isr()
/**
* @brief Disables all the interrupt sources.
* @note Implemented as global interrupts disable.
* @note Of course non maskable interrupt sources are not included.
*/
#define port_disable() _asm("sim")
/**
* @brief Disables the interrupt sources that are not supposed to preempt
* the kernel.
* @note Same as @p port_disable() in this port, there is no difference
* between the two states.
*/
#define port_suspend() _asm("sim")
/**
* @brief Enables all the interrupt sources.
* @note Implemented as global interrupt enable.
*/
#define port_enable() _asm("rim")
/**
* @brief Enters an architecture-dependent halt mode.
* @note Implemented with the specific "wfi" instruction.
*/
#if STM8_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
#define port_wait_for_interrupt() _asm("wfi")
#else
#define port_wait_for_interrupt()
#endif
/**
* @brief Performs a context switch between two threads.
* @details This is the most critical code in any port, this function
* is responsible for the context switch between 2 threads.
* @note Implemented as a call to a low level assembler routine.
*
* @param ntp the thread to be switched in
* @param otp the thread to be switched out
*/
#define port_switch(ntp, otp) _port_switch(otp)
#ifdef __cplusplus
extern "C" {
#endif
void _port_switch(Thread *otp);
void _port_thread_start(void);
void port_halt(void);
#ifdef __cplusplus
}
#endif
/*===========================================================================*/
/* Scheduler captured code. */
/*===========================================================================*/
#define PORT_OPTIMIZED_RLIST_VAR
#define PORT_OPTIMIZED_RLIST_EXT
#define PORT_OPTIMIZED_READYLIST_STRUCT
typedef struct {
ThreadsQueue r_queue;
tprio_t r_prio;
Thread *r_current;
#if CH_USE_REGISTRY
Thread *r_newer;
Thread *r_older;
#endif
/* End of the fields shared with the Thread structure.*/
#if CH_TIME_QUANTUM > 0
cnt_t r_preempt;
#endif
} ReadyList;
@tiny extern ReadyList rlist;
#endif /* _CHCORE_H_ */
/** @} */

130
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@ -0,0 +1,130 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file cosmic/STM8/chtypes.h
* @brief STM8 (Cosmic) port system types.
*
* @addtogroup STM8_COSMIC_CORE
* @{
*/
#ifndef _CHTYPES_H_
#define _CHTYPES_H_
#define __need_NULL
#define __need_size_t
#include <stddef.h>
//#if !defined(_STDINT_H) && !defined(__STDINT_H_)
//#include <stdint.h>
//#endif
typedef unsigned char uint8_t; /**< C99-style 8 bits unsigned. */
typedef signed char int8_t; /**< C99-style 8 bits signed. */
typedef unsigned int uint16_t; /**< C99-style 16 bits unsigned. */
typedef signed int int16_t; /**< C99-style 16 bits signed. */
typedef unsigned long uint32_t; /**< C99-style 32 bits unsigned. */
typedef signed long int32_t; /**< C99-style 32 bits signed. */
typedef uint8_t uint_fast8_t; /**< C99-style 8 bits unsigned. */
typedef uint16_t uint_fast16_t; /**< C99-style 16 bits unsigned. */
typedef uint32_t uint_fast32_t; /**< C99-style 32 bits unsigned. */
/**
* @brief Boolean, recommended the fastest signed.
*/
typedef int8_t bool_t;
/**
* @brief Thread mode flags, uint8_t is ok.
*/
typedef uint8_t tmode_t;
/**
* @brief Thread state, uint8_t is ok.
*/
typedef uint8_t tstate_t;
/**
* @brief Thread references counter, uint8_t is ok.
*/
typedef uint8_t trefs_t;
/**
* @brief Priority, use the fastest unsigned type.
*/
typedef uint8_t tprio_t;
/**
* @brief Message, use signed pointer equivalent.
*/
typedef int16_t msg_t;
/**
* @brief Event Id, use fastest signed.
*/
typedef int8_t eventid_t;
/**
* @brief Event Mask, recommended fastest unsigned.
*/
typedef uint8_t eventmask_t;
/**
* @brief System Time, recommended fastest unsigned.
*/
typedef uint16_t systime_t;
/**
* @brief Counter, recommended fastest signed.
*/
typedef int8_t cnt_t;
/**
* @brief Inline function modifier.
*/
#define INLINE @inline
/**
* @brief ROM constant modifier.
* @note Uses the "const" keyword in this port.
*/
#define ROMCONST const
/**
* @brief Packed structure modifier (within).
* @note Empty in this port.
*/
#define PACK_STRUCT_STRUCT
/**
* @brief Packed structure modifier (before).
* @note Empty in this port.
*/
#define PACK_STRUCT_BEGIN
/**
* @brief Packed structure modifier (after).
* @note Empty in this port.
*/
#define PACK_STRUCT_END
#endif /* _CHTYPES_H_ */
/** @} */

86
os/ports/cosmic/STM8/port.dox Normal file
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@ -0,0 +1,86 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup STM8_COSMIC STM8
* @details STM8 port for the Cosmic C compiler.
*
* @section STM8_COSMIC_STATES Mapping of the System States in the STM8 port
* The ChibiOS/RT logical @ref system_states are mapped as follow in the STM8
* port:
* - <b>Init</b>. This state is represented by the startup code and the
* initialization code before @p chSysInit() is executed. It has not a
* special hardware state associated.
* - <b>Normal</b>. This is the state the system has after executing
* @p chSysInit(). Interrupts are enabled.
* - <b>Suspended</b>. Interrupts are disabled.
* - <b>Disabled</b>. Interrupts are enabled. This state is equivalent to the
* Suspended state because there are no fast interrupts in this architecture.
* - <b>Sleep</b>. Implemented with "wait" instruction insertion in the idle
* loop.
* - <b>S-Locked</b>. Interrupts are disabled.
* - <b>I-Locked</b>. This state is equivalent to the SRI state, the
* @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
* order to formally change state because this may change).
* - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
* - <b>Serving Fast Interrupt</b>. Not present in this architecture.
* - <b>Serving Non-Maskable Interrupt</b>. The STM8 ha non
* maskable interrupt sources that can be associated to this state.
* - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
* .
* @section STM8_COSMIC_NOTES The STM8 port notes
* - The STM8 does not have a dedicated interrupt stack, make sure to reserve
* enough stack space for interrupts in each thread stack. This can be done
* by modifying the @p INT_REQUIRED_STACK macro into
* <b>./os/ports/RC/STM8/chcore.h</b>.
* - The kernel currently supports only the small memory model so the
* kernel files should be loaded in the first 64K. Note that this is not
* a problem because upper addresses can be used by the user code, the
* kernel can context switch code running there.
* - The configuration option @p CH_OPTIMIZE_SPEED is not currently supported
* because the missing support of the @p inline "C" keyword in the
* compiler.
* .
* @ingroup cosmic
*/
/**
* @defgroup STM8_COSMIC_CONF Configuration Options
* @brief STM8 Configuration Options.
* @details The STM8 port allows some architecture-specific configurations
* settings that can be specified externally, as example on the compiler
* command line:
* - @p INT_REQUIRED_STACK, this value represent the amount of stack space
* used by the interrupt handlers.<br>
* The default for this value is @p 32, this space is allocated for each
* thread so be careful in order to not waste precious RAM space.<br>
* The default value is set into <b>./os/ports/cosmic/STM8/chcore.h</b>.
* .
* @ingroup STM8_COSMIC
*/
/**
* @defgroup STM8_COSMIC_CORE Core Port Implementation
* @brief STM8 specific port code, structures and macros.
*
* @ingroup STM8_COSMIC
* @file cosmic/STM8/chtypes.h Port types.
* @file cosmic/STM8/chcore.h Port related structures and macros.
* @file cosmic/STM8/chcore.c Port related code.
*/

11
os/ports/ports.dox
View File

@ -31,8 +31,15 @@
*/ */
/** /**
* @defgroup raisonance Raisonance Ports * @defgroup cosmic Cosmic Compiler Ports
* Ports for the Raisonance compiler or derivatives. * Ports for the Compiler compiler.
*
* @ingroup ports
*/
/**
* @defgroup raisonance Raisonance Compiler Ports
* Ports for the Raisonance compiler.
* *
* @ingroup ports * @ingroup ports
*/ */

4
readme.txt
View File

@ -75,6 +75,10 @@
in 2.0.1). in 2.0.1).
- FIX: Fixed broken AVR port (bug 3016619)(backported in 2.0.0). - FIX: Fixed broken AVR port (bug 3016619)(backported in 2.0.0).
- FIX: Fixed assertion in adcStop() (bug 3015109)(backported in 2.0.0). - FIX: Fixed assertion in adcStop() (bug 3015109)(backported in 2.0.0).
- NEW: Merged the new unified STM8 port, now the port supports both the
Cosmic and Raisonance compilers.
- NEW: Added an STM8-DISCOVERY demo, the demo can be compiled with both the
Cosmic and Raisonance compilers under the STDV IDE.
- NEW: Added timers clock macros to the STM32 clock tree HAL driver (backported - NEW: Added timers clock macros to the STM32 clock tree HAL driver (backported
in 2.0.1). in 2.0.1).
- NEW: Added Binary Semaphores among the synchronization primitives. The new - NEW: Added Binary Semaphores among the synchronization primitives. The new

4
test/test.c
View File

@ -44,7 +44,7 @@
/* /*
* Array of all the test patterns. * Array of all the test patterns.
*/ */
static const struct testcase **patterns[] = { static ROMCONST struct testcase **patterns[] = {
patternthd, patternthd,
patternsem, patternsem,
patternmtx, patternmtx,
@ -78,7 +78,7 @@ Thread *threads[MAX_THREADS];
/* /*
* Pointers to the working areas. * Pointers to the working areas.
*/ */
void * const wa[5] = {test.wa.T0, test.wa.T1, test.wa.T2, void * ROMCONST wa[5] = {test.wa.T0, test.wa.T1, test.wa.T2,
test.wa.T3, test.wa.T4}; test.wa.T3, test.wa.T4};
/* /*

12
test/test.h
View File

@ -45,10 +45,10 @@
#define MAX_THREADS 5 #define MAX_THREADS 5
#define MAX_TOKENS 16 #define MAX_TOKENS 16
#if defined(CH_ARCHITECTURE_AVR) || \ #if defined(CH_ARCHITECTURE_AVR) || defined(CH_ARCHITECTURE_MSP430)
defined(CH_ARCHITECTURE_MSP430) || \
defined(CH_ARCHITECTURE_STM8)
#define THREADS_STACK_SIZE 48 #define THREADS_STACK_SIZE 48
#elif defined(CH_ARCHITECTURE_STM8)
#define THREADS_STACK_SIZE 64
#elif defined(CH_ARCHITECTURE_SIMIA32) #elif defined(CH_ARCHITECTURE_SIMIA32)
#define THREADS_STACK_SIZE 512 #define THREADS_STACK_SIZE 512
#else #else
@ -84,8 +84,8 @@ extern "C" {
#endif #endif
msg_t TestThread(void *p); msg_t TestThread(void *p);
void test_printn(uint32_t n); void test_printn(uint32_t n);
void test_print(const char *msgp); void test_print(char *msgp);
void test_println(const char *msgp); void test_println(char *msgp);
void test_emit_token(char token); void test_emit_token(char token);
bool_t _test_fail(unsigned point); bool_t _test_fail(unsigned point);
bool_t _test_assert(unsigned point, bool_t condition); bool_t _test_assert(unsigned point, bool_t condition);
@ -151,7 +151,7 @@ extern "C" {
#if !defined(__DOXYGEN__) #if !defined(__DOXYGEN__)
extern Thread *threads[MAX_THREADS]; extern Thread *threads[MAX_THREADS];
extern union test_buffers test; extern union test_buffers test;
extern void * const wa[]; extern void * ROMCONST wa[];
extern bool_t test_timer_done; extern bool_t test_timer_done;
#endif #endif

28
test/testbmk.c
View File

@ -115,7 +115,7 @@ static void bmk1_execute(void) {
test_println(" ctxswc/S"); test_println(" ctxswc/S");
} }
const struct testcase testbmk1 = { ROMCONST struct testcase testbmk1 = {
"Benchmark, messages #1", "Benchmark, messages #1",
NULL, NULL,
NULL, NULL,
@ -144,7 +144,7 @@ static void bmk2_execute(void) {
test_println(" ctxswc/S"); test_println(" ctxswc/S");
} }
const struct testcase testbmk2 = { ROMCONST struct testcase testbmk2 = {
"Benchmark, messages #2", "Benchmark, messages #2",
NULL, NULL,
NULL, NULL,
@ -183,7 +183,7 @@ static void bmk3_execute(void) {
test_println(" ctxswc/S"); test_println(" ctxswc/S");
} }
const struct testcase testbmk3 = { ROMCONST struct testcase testbmk3 = {
"Benchmark, messages #3", "Benchmark, messages #3",
NULL, NULL,
NULL, NULL,
@ -244,7 +244,7 @@ static void bmk4_execute(void) {
test_println(" ctxswc/S"); test_println(" ctxswc/S");
} }
const struct testcase testbmk4 = { ROMCONST struct testcase testbmk4 = {
"Benchmark, context switch", "Benchmark, context switch",
NULL, NULL,
NULL, NULL,
@ -281,7 +281,7 @@ static void bmk5_execute(void) {
test_println(" threads/S"); test_println(" threads/S");
} }
const struct testcase testbmk5 = { ROMCONST struct testcase testbmk5 = {
"Benchmark, threads, full cycle", "Benchmark, threads, full cycle",
NULL, NULL,
NULL, NULL,
@ -320,7 +320,7 @@ static void bmk6_execute(void) {
test_println(" threads/S"); test_println(" threads/S");
} }
const struct testcase testbmk6 = { ROMCONST struct testcase testbmk6 = {
"Benchmark, threads, create only", "Benchmark, threads, create only",
NULL, NULL,
NULL, NULL,
@ -381,7 +381,7 @@ static void bmk7_execute(void) {
test_println(" ctxswc/S"); test_println(" ctxswc/S");
} }
const struct testcase testbmk7 = { ROMCONST struct testcase testbmk7 = {
"Benchmark, mass reschedule, 5 threads", "Benchmark, mass reschedule, 5 threads",
bmk7_setup, bmk7_setup,
NULL, NULL,
@ -434,7 +434,7 @@ static void bmk8_execute(void) {
test_println(" ctxswc/S"); test_println(" ctxswc/S");
} }
const struct testcase testbmk8 = { ROMCONST struct testcase testbmk8 = {
"Benchmark, round robin context switching", "Benchmark, round robin context switching",
NULL, NULL,
NULL, NULL,
@ -479,7 +479,7 @@ static void bmk9_execute(void) {
test_println(" bytes/S"); test_println(" bytes/S");
} }
const struct testcase testbmk9 = { ROMCONST struct testcase testbmk9 = {
"Benchmark, I/O Queues throughput", "Benchmark, I/O Queues throughput",
NULL, NULL,
NULL, NULL,
@ -520,7 +520,7 @@ static void bmk10_execute(void) {
test_println(" timers/S"); test_println(" timers/S");
} }
const struct testcase testbmk10 = { ROMCONST struct testcase testbmk10 = {
"Benchmark, virtual timers set/reset", "Benchmark, virtual timers set/reset",
NULL, NULL,
NULL, NULL,
@ -566,7 +566,7 @@ static void bmk11_execute(void) {
test_println(" wait+signal/S"); test_println(" wait+signal/S");
} }
const struct testcase testbmk11 = { ROMCONST struct testcase testbmk11 = {
"Benchmark, semaphores wait/signal", "Benchmark, semaphores wait/signal",
bmk11_setup, bmk11_setup,
NULL, NULL,
@ -613,7 +613,7 @@ static void bmk12_execute(void) {
test_println(" lock+unlock/S"); test_println(" lock+unlock/S");
} }
const struct testcase testbmk12 = { ROMCONST struct testcase testbmk12 = {
"Benchmark, mutexes lock/unlock", "Benchmark, mutexes lock/unlock",
bmk12_setup, bmk12_setup,
NULL, NULL,
@ -674,7 +674,7 @@ static void bmk13_execute(void) {
#endif #endif
} }
const struct testcase testbmk13 = { ROMCONST struct testcase testbmk13 = {
"Benchmark, RAM footprint", "Benchmark, RAM footprint",
NULL, NULL,
NULL, NULL,
@ -684,7 +684,7 @@ const struct testcase testbmk13 = {
/** /**
* @brief Test sequence for benchmarks. * @brief Test sequence for benchmarks.
*/ */
const struct testcase * const patternbmk[] = { ROMCONST struct testcase * ROMCONST patternbmk[] = {
#if !TEST_NO_BENCHMARKS #if !TEST_NO_BENCHMARKS
&testbmk1, &testbmk1,
&testbmk2, &testbmk2,

2
test/testbmk.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTBMK_H_ #ifndef _TESTBMK_H_
#define _TESTBMK_H_ #define _TESTBMK_H_
extern const struct testcase *patternbmk[]; extern ROMCONST struct testcase * ROMCONST patternbmk[];
#endif /* _TESTBMK_H_ */ #endif /* _TESTBMK_H_ */

8
test/testdyn.c
View File

@ -117,7 +117,7 @@ static void dyn1_execute(void) {
test_assert(4, n == sz, "heap size changed"); test_assert(4, n == sz, "heap size changed");
} }
const struct testcase testdyn1 = { ROMCONST struct testcase testdyn1 = {
"Dynamic APIs, threads creation from heap", "Dynamic APIs, threads creation from heap",
dyn1_setup, dyn1_setup,
NULL, NULL,
@ -173,7 +173,7 @@ static void dyn2_execute(void) {
test_assert(4, chPoolAlloc(&mp1) == NULL, "pool list not empty"); test_assert(4, chPoolAlloc(&mp1) == NULL, "pool list not empty");
} }
const struct testcase testdyn2 = { ROMCONST struct testcase testdyn2 = {
"Dynamic APIs, threads creation from memory pool", "Dynamic APIs, threads creation from memory pool",
dyn2_setup, dyn2_setup,
NULL, NULL,
@ -240,7 +240,7 @@ static void dyn3_execute(void) {
test_assert(7, n1 == n3, "unexpected threads count"); test_assert(7, n1 == n3, "unexpected threads count");
} }
const struct testcase testdyn3 = { ROMCONST struct testcase testdyn3 = {
"Dynamic APIs, registry and references", "Dynamic APIs, registry and references",
dyn3_setup, dyn3_setup,
NULL, NULL,
@ -252,7 +252,7 @@ const struct testcase testdyn3 = {
/** /**
* @brief Test sequence for dynamic APIs. * @brief Test sequence for dynamic APIs.
*/ */
const struct testcase * const patterndyn[] = { ROMCONST struct testcase * ROMCONST patterndyn[] = {
#if CH_USE_DYNAMIC #if CH_USE_DYNAMIC
#if CH_USE_HEAP #if CH_USE_HEAP
&testdyn1, &testdyn1,

2
test/testdyn.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTDYN_H_ #ifndef _TESTDYN_H_
#define _TESTDYN_H_ #define _TESTDYN_H_
extern const struct testcase *patterndyn[]; extern ROMCONST struct testcase * ROMCONST patterndyn[];
#endif /* _TESTDYN_H_ */ #endif /* _TESTDYN_H_ */

10
test/testevt.c
View File

@ -83,7 +83,7 @@ static void evt1_setup(void) {
static void h1(eventid_t id) {(void)id;test_emit_token('A');} static void h1(eventid_t id) {(void)id;test_emit_token('A');}
static void h2(eventid_t id) {(void)id;test_emit_token('B');} static void h2(eventid_t id) {(void)id;test_emit_token('B');}
static void h3(eventid_t id) {(void)id;test_emit_token('C');} static void h3(eventid_t id) {(void)id;test_emit_token('C');}
static const evhandler_t evhndl[] = {h1, h2, h3}; static ROMCONST evhandler_t evhndl[] = {h1, h2, h3};
static void evt1_execute(void) { static void evt1_execute(void) {
EventListener el1, el2; EventListener el1, el2;
@ -107,7 +107,7 @@ static void evt1_execute(void) {
test_assert_sequence(4, "ABC"); test_assert_sequence(4, "ABC");
} }
const struct testcase testevt1 = { ROMCONST struct testcase testevt1 = {
"Events, registration and dispatch", "Events, registration and dispatch",
evt1_setup, evt1_setup,
NULL, NULL,
@ -224,7 +224,7 @@ static void evt2_execute(void) {
test_assert(15, !chEvtIsListening(&es2), "stuck listener"); test_assert(15, !chEvtIsListening(&es2), "stuck listener");
} }
const struct testcase testevt2 = { ROMCONST struct testcase testevt2 = {
"Events, wait and broadcast", "Events, wait and broadcast",
evt2_setup, evt2_setup,
NULL, NULL,
@ -272,7 +272,7 @@ static void evt3_execute(void) {
test_assert(6, m == 0, "spurious event"); test_assert(6, m == 0, "spurious event");
} }
const struct testcase testevt3 = { ROMCONST struct testcase testevt3 = {
"Events, timeouts", "Events, timeouts",
evt3_setup, evt3_setup,
NULL, NULL,
@ -283,7 +283,7 @@ const struct testcase testevt3 = {
/** /**
* @brief Test sequence for events. * @brief Test sequence for events.
*/ */
const struct testcase * const patternevt[] = { ROMCONST struct testcase * ROMCONST patternevt[] = {
#if CH_USE_EVENTS #if CH_USE_EVENTS
&testevt1, &testevt1,
&testevt2, &testevt2,

2
test/testevt.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTEVT_H_ #ifndef _TESTEVT_H_
#define _TESTEVT_H_ #define _TESTEVT_H_
extern const struct testcase *patternevt[]; extern ROMCONST struct testcase * ROMCONST patternevt[];
#endif /* _TESTEVT_H_ */ #endif /* _TESTEVT_H_ */

4
test/testheap.c
View File

@ -142,7 +142,7 @@ static void heap1_execute(void) {
test_assert(12, n == sz, "size changed"); test_assert(12, n == sz, "size changed");
} }
const struct testcase testheap1 = { ROMCONST struct testcase testheap1 = {
"Heap, allocation and fragmentation test", "Heap, allocation and fragmentation test",
heap1_setup, heap1_setup,
NULL, NULL,
@ -154,7 +154,7 @@ const struct testcase testheap1 = {
/** /**
* @brief Test sequence for heap. * @brief Test sequence for heap.
*/ */
const struct testcase * const patternheap[] = { ROMCONST struct testcase * ROMCONST patternheap[] = {
#if CH_USE_HEAP #if CH_USE_HEAP
&testheap1, &testheap1,
#endif #endif

2
test/testheap.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTHEAP_H_ #ifndef _TESTHEAP_H_
#define _TESTHEAP_H_ #define _TESTHEAP_H_
extern const struct testcase *patternheap[]; extern ROMCONST struct testcase * ROMCONST patternheap[];
#endif /* _TESTHEAP_H_ */ #endif /* _TESTHEAP_H_ */

4
test/testmbox.c
View File

@ -155,7 +155,7 @@ static void mbox1_execute(void) {
test_assert(21, mb1.mb_buffer == mb1.mb_rdptr, "read pointer not aligned to base"); test_assert(21, mb1.mb_buffer == mb1.mb_rdptr, "read pointer not aligned to base");
} }
const struct testcase testmbox1 = { ROMCONST struct testcase testmbox1 = {
"Mailboxes, queuing and timeouts", "Mailboxes, queuing and timeouts",
mbox1_setup, mbox1_setup,
NULL, NULL,
@ -167,7 +167,7 @@ const struct testcase testmbox1 = {
/** /**
* @brief Test sequence for mailboxes. * @brief Test sequence for mailboxes.
*/ */
const struct testcase * const patternmbox[] = { ROMCONST struct testcase * ROMCONST patternmbox[] = {
#if CH_USE_MAILBOXES #if CH_USE_MAILBOXES
&testmbox1, &testmbox1,
#endif #endif

2
test/testmbox.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTMBOX_H_ #ifndef _TESTMBOX_H_
#define _TESTMBOX_H_ #define _TESTMBOX_H_
extern const struct testcase *patternmbox[]; extern ROMCONST struct testcase * ROMCONST patternmbox[];
#endif /* _TESTMBOX_H_ */ #endif /* _TESTMBOX_H_ */

4
test/testmsg.c
View File

@ -101,7 +101,7 @@ static void msg1_execute(void) {
test_assert(3, msg == 0, "unknown message"); test_assert(3, msg == 0, "unknown message");
} }
const struct testcase testmsg1 = { ROMCONST struct testcase testmsg1 = {
"Messages, loop", "Messages, loop",
NULL, NULL,
NULL, NULL,
@ -113,7 +113,7 @@ const struct testcase testmsg1 = {
/** /**
* @brief Test sequence for messages. * @brief Test sequence for messages.
*/ */
const struct testcase * const patternmsg[] = { ROMCONST struct testcase * ROMCONST patternmsg[] = {
#if CH_USE_MESSAGES #if CH_USE_MESSAGES
&testmsg1, &testmsg1,
#endif #endif

2
test/testmsg.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTMSG_H_ #ifndef _TESTMSG_H_
#define _TESTMSG_H_ #define _TESTMSG_H_
extern const struct testcase *patternmsg[]; extern ROMCONST struct testcase * ROMCONST patternmsg[];
#endif /* _TESTMSG_H_ */ #endif /* _TESTMSG_H_ */

18
test/testmtx.c
View File

@ -112,7 +112,7 @@ static void mtx1_execute(void) {
test_assert_sequence(2, "ABCDE"); test_assert_sequence(2, "ABCDE");
} }
const struct testcase testmtx1 = { ROMCONST struct testcase testmtx1 = {
"Mutexes, priority enqueuing test", "Mutexes, priority enqueuing test",
mtx1_setup, mtx1_setup,
NULL, NULL,
@ -203,7 +203,7 @@ static void mtx2_execute(void) {
test_assert_time_window(2, time + MS2ST(100), time + MS2ST(100) + ALLOWED_DELAY); test_assert_time_window(2, time + MS2ST(100), time + MS2ST(100) + ALLOWED_DELAY);
} }
const struct testcase testmtx2 = { ROMCONST struct testcase testmtx2 = {
"Mutexes, priority inheritance, simple case", "Mutexes, priority inheritance, simple case",
mtx2_setup, mtx2_setup,
NULL, NULL,
@ -323,7 +323,7 @@ static void mtx3_execute(void) {
test_assert_time_window(2, time + MS2ST(110), time + MS2ST(110) + ALLOWED_DELAY); test_assert_time_window(2, time + MS2ST(110), time + MS2ST(110) + ALLOWED_DELAY);
} }
const struct testcase testmtx3 = { ROMCONST struct testcase testmtx3 = {
"Mutexes, priority inheritance, complex case", "Mutexes, priority inheritance, complex case",
mtx3_setup, mtx3_setup,
NULL, NULL,
@ -411,7 +411,7 @@ static void mtx4_execute(void) {
test_wait_threads(); test_wait_threads();
} }
const struct testcase testmtx4 = { ROMCONST struct testcase testmtx4 = {
"Mutexes, priority return", "Mutexes, priority return",
mtx4_setup, mtx4_setup,
NULL, NULL,
@ -454,7 +454,7 @@ static void mtx5_execute(void) {
test_assert(5, chThdGetPriority() == prio, "wrong priority level"); test_assert(5, chThdGetPriority() == prio, "wrong priority level");
} }
const struct testcase testmtx5 = { ROMCONST struct testcase testmtx5 = {
"Mutexes, status", "Mutexes, status",
mtx5_setup, mtx5_setup,
NULL, NULL,
@ -508,7 +508,7 @@ static void mtx6_execute(void) {
test_assert_sequence(1, "ABCDE"); test_assert_sequence(1, "ABCDE");
} }
const struct testcase testmtx6 = { ROMCONST struct testcase testmtx6 = {
"CondVar, signal test", "CondVar, signal test",
mtx6_setup, mtx6_setup,
NULL, NULL,
@ -545,7 +545,7 @@ static void mtx7_execute(void) {
test_assert_sequence(1, "ABCDE"); test_assert_sequence(1, "ABCDE");
} }
const struct testcase testmtx7 = { ROMCONST struct testcase testmtx7 = {
"CondVar, broadcast test", "CondVar, broadcast test",
mtx7_setup, mtx7_setup,
NULL, NULL,
@ -603,7 +603,7 @@ static void mtx8_execute(void) {
test_assert_sequence(1, "ABC"); test_assert_sequence(1, "ABC");
} }
const struct testcase testmtx8 = { ROMCONST struct testcase testmtx8 = {
"CondVar, boost test", "CondVar, boost test",
mtx8_setup, mtx8_setup,
NULL, NULL,
@ -615,7 +615,7 @@ const struct testcase testmtx8 = {
/** /**
* @brief Test sequence for mutexes. * @brief Test sequence for mutexes.
*/ */
const struct testcase * const patternmtx[] = { ROMCONST struct testcase * ROMCONST patternmtx[] = {
#if CH_USE_MUTEXES #if CH_USE_MUTEXES
&testmtx1, &testmtx1,
#if CH_DBG_THREADS_PROFILING #if CH_DBG_THREADS_PROFILING

2
test/testmtx.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTMTX_H_ #ifndef _TESTMTX_H_
#define _TESTMTX_H_ #define _TESTMTX_H_
extern const struct testcase *patternmtx[]; extern ROMCONST struct testcase * ROMCONST patternmtx[];
#endif /* _TESTMTX_H_ */ #endif /* _TESTMTX_H_ */

4
test/testpools.c
View File

@ -90,7 +90,7 @@ static void pools1_execute(void) {
test_assert(3, chPoolAlloc(&mp1) == NULL, "provider returned memory"); test_assert(3, chPoolAlloc(&mp1) == NULL, "provider returned memory");
} }
const struct testcase testpools1 = { ROMCONST struct testcase testpools1 = {
"Memory Pools, queue/dequeue", "Memory Pools, queue/dequeue",
pools1_setup, pools1_setup,
NULL, NULL,
@ -102,7 +102,7 @@ const struct testcase testpools1 = {
/* /*
* @brief Test sequence for pools. * @brief Test sequence for pools.
*/ */
const struct testcase * const patternpools[] = { ROMCONST struct testcase * ROMCONST patternpools[] = {
#if CH_USE_MEMPOOLS #if CH_USE_MEMPOOLS
&testpools1, &testpools1,
#endif #endif

2
test/testpools.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTPOOLS_H_ #ifndef _TESTPOOLS_H_
#define _TESTPOOLS_H_ #define _TESTPOOLS_H_
extern const struct testcase *patternpools[]; extern ROMCONST struct testcase * ROMCONST patternpools[];
#endif /* _TESTPOOLS_H_ */ #endif /* _TESTPOOLS_H_ */

6
test/testqueues.c
View File

@ -129,7 +129,7 @@ static void queues1_execute(void) {
test_assert(12, chIQGetTimeout(&iq, 10) == Q_TIMEOUT, "wrong timeout return"); test_assert(12, chIQGetTimeout(&iq, 10) == Q_TIMEOUT, "wrong timeout return");
} }
const struct testcase testqueues1 = { ROMCONST struct testcase testqueues1 = {
"Queues, input queues", "Queues, input queues",
queues1_setup, queues1_setup,
NULL, NULL,
@ -189,7 +189,7 @@ static void queues2_execute(void) {
test_assert(12, chOQPutTimeout(&oq, 0, 10) == Q_TIMEOUT, "wrong timeout return"); test_assert(12, chOQPutTimeout(&oq, 0, 10) == Q_TIMEOUT, "wrong timeout return");
} }
const struct testcase testqueues2 = { ROMCONST struct testcase testqueues2 = {
"Queues, output queues", "Queues, output queues",
queues2_setup, queues2_setup,
NULL, NULL,
@ -200,7 +200,7 @@ const struct testcase testqueues2 = {
/** /**
* @brief Test sequence for queues. * @brief Test sequence for queues.
*/ */
const struct testcase * const patternqueues[] = { ROMCONST struct testcase * ROMCONST patternqueues[] = {
#if CH_USE_QUEUES #if CH_USE_QUEUES
&testqueues1, &testqueues1,
&testqueues2, &testqueues2,

2
test/testqueues.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTQUEUES_H_ #ifndef _TESTQUEUES_H_
#define _TESTQUEUES_H_ #define _TESTQUEUES_H_
extern const struct testcase *patternqueues[]; extern ROMCONST struct testcase * ROMCONST patternqueues[];
#endif /* _TESTQUEUES_H_ */ #endif /* _TESTQUEUES_H_ */

8
test/testsem.c
View File

@ -103,7 +103,7 @@ static void sem1_execute(void) {
#endif #endif
} }
const struct testcase testsem1 = { ROMCONST struct testcase testsem1 = {
"Semaphores, enqueuing", "Semaphores, enqueuing",
sem1_setup, sem1_setup,
NULL, NULL,
@ -177,7 +177,7 @@ static void sem2_execute(void) {
test_assert_time_window(11, target_time, target_time + ALLOWED_DELAY); test_assert_time_window(11, target_time, target_time + ALLOWED_DELAY);
} }
const struct testcase testsem2 = { ROMCONST struct testcase testsem2 = {
"Semaphores, timeout", "Semaphores, timeout",
sem2_setup, sem2_setup,
NULL, NULL,
@ -222,7 +222,7 @@ static void sem3_execute(void) {
test_assert(4, sem1.s_cnt == 0, "counter not zero"); test_assert(4, sem1.s_cnt == 0, "counter not zero");
} }
const struct testcase testsem3 = { ROMCONST struct testcase testsem3 = {
"Semaphores, atomic signal-wait", "Semaphores, atomic signal-wait",
sem3_setup, sem3_setup,
NULL, NULL,
@ -234,7 +234,7 @@ const struct testcase testsem3 = {
/** /**
* @brief Test sequence for semaphores. * @brief Test sequence for semaphores.
*/ */
const struct testcase * const patternsem[] = { ROMCONST struct testcase * ROMCONST patternsem[] = {
#if CH_USE_SEMAPHORES #if CH_USE_SEMAPHORES
&testsem1, &testsem1,
&testsem2, &testsem2,

2
test/testsem.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTSEM_H_ #ifndef _TESTSEM_H_
#define _TESTSEM_H_ #define _TESTSEM_H_
extern const struct testcase *patternsem[]; extern ROMCONST struct testcase * ROMCONST patternsem[];
#endif /* _TESTSEM_H_ */ #endif /* _TESTSEM_H_ */

10
test/testthd.c
View File

@ -77,7 +77,7 @@ static void thd1_execute(void) {
test_assert_sequence(1, "ABCDE"); test_assert_sequence(1, "ABCDE");
} }
const struct testcase testthd1 = { ROMCONST struct testcase testthd1 = {
"Threads, enqueuing test #1", "Threads, enqueuing test #1",
NULL, NULL,
NULL, NULL,
@ -105,7 +105,7 @@ static void thd2_execute(void) {
test_assert_sequence(1, "ABCDE"); test_assert_sequence(1, "ABCDE");
} }
const struct testcase testthd2 = { ROMCONST struct testcase testthd2 = {
"Threads, enqueuing test #2", "Threads, enqueuing test #2",
NULL, NULL,
NULL, NULL,
@ -170,7 +170,7 @@ static void thd3_execute(void) {
#endif #endif
} }
const struct testcase testthd3 = { ROMCONST struct testcase testthd3 = {
"Threads, priority change", "Threads, priority change",
NULL, NULL,
NULL, NULL,
@ -211,7 +211,7 @@ static void thd4_execute(void) {
test_assert_time_window(4, time, time + 1); test_assert_time_window(4, time, time + 1);
} }
const struct testcase testthd4 = { ROMCONST struct testcase testthd4 = {
"Threads, delays", "Threads, delays",
NULL, NULL,
NULL, NULL,
@ -221,7 +221,7 @@ const struct testcase testthd4 = {
/** /**
* @brief Test sequence for threads. * @brief Test sequence for threads.
*/ */
const struct testcase * const patternthd[] = { ROMCONST struct testcase * ROMCONST patternthd[] = {
&testthd1, &testthd1,
&testthd2, &testthd2,
&testthd3, &testthd3,

2
test/testthd.h
View File

@ -20,6 +20,6 @@
#ifndef _TESTRDY_H_ #ifndef _TESTRDY_H_
#define _TESTRDY_H_ #define _TESTRDY_H_
extern const struct testcase *patternthd[]; extern ROMCONST struct testcase * ROMCONST patternthd[];
#endif /* _TESTRDY_H_ */ #endif /* _TESTRDY_H_ */