Imported I2Cv3 driver in L4+ HAL.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12266 110e8d01-0319-4d1e-a829-52ad28d1bb01

demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/halconf.h

@@ -86,7 +86,7 @@
  * @brief   Enables the I2C subsystem.
  */
 #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                         FALSE
+#define HAL_USE_I2C                         TRUE
 #endif
 
 /**

demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h

@@ -158,6 +158,23 @@
 /*
  * I2C driver system settings.
  */
+#define STM32_I2C_USE_I2C1                  TRUE
+#define STM32_I2C_USE_I2C2                  TRUE
+#define STM32_I2C_USE_I2C3                  TRUE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_RX_DMA_CHANNEL       6
+#define STM32_I2C_I2C1_TX_DMA_CHANNEL       7
+#define STM32_I2C_I2C2_RX_DMA_CHANNEL       8
+#define STM32_I2C_I2C2_TX_DMA_CHANNEL       9
+#define STM32_I2C_I2C3_RX_DMA_CHANNEL       8
+#define STM32_I2C_I2C3_TX_DMA_CHANNEL       9
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C3_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_I2C3_DMA_PRIORITY         3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
 
 /*
  * ICU driver system settings.
@@ -218,12 +235,12 @@
 #define STM32_SPI_USE_SPI1                  FALSE
 #define STM32_SPI_USE_SPI2                  FALSE
 #define STM32_SPI_USE_SPI3                  FALSE
-#define STM32_SPI_SPI1_RX_DMA_CHANNEL       10
+#define STM32_SPI_SPI1_RX_DMA_CHANNEL       0
-#define STM32_SPI_SPI1_TX_DMA_CHANNEL       11
+#define STM32_SPI_SPI1_TX_DMA_CHANNEL       1
-#define STM32_SPI_SPI2_RX_DMA_CHANNEL       12
+#define STM32_SPI_SPI2_RX_DMA_CHANNEL       2
-#define STM32_SPI_SPI2_TX_DMA_CHANNEL       13
+#define STM32_SPI_SPI2_TX_DMA_CHANNEL       3
-#define STM32_SPI_SPI3_RX_DMA_CHANNEL       10
+#define STM32_SPI_SPI3_RX_DMA_CHANNEL       4
-#define STM32_SPI_SPI3_TX_DMA_CHANNEL       11
+#define STM32_SPI_SPI3_TX_DMA_CHANNEL       5
 #define STM32_SPI_SPI1_DMA_PRIORITY         1
 #define STM32_SPI_SPI2_DMA_PRIORITY         1
 #define STM32_SPI_SPI3_DMA_PRIORITY         1

os/hal/ports/STM32/LLD/I2Cv3/hal_i2c_lld.h

@@ -291,65 +291,61 @@
 
 #if STM32_I2C_USE_DMA == TRUE
 
-#if STM32_I2C_USE_I2C1 &&                                                   \
+#if STM32_I2C_USE_I2C1
-    !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C1_RX_DMA_CHANNEL)
+#if !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C1_RX_DMA_CHANNEL)
 #error "Invalid DMA channel assigned to I2C1 RX"
 #endif
 
-#if STM32_I2C_USE_I2C1 &&                                                   \
+#if !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C1_TX_DMA_CHANNEL)
-    !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C1_TX_DMA_CHANNEL)
 #error "Invalid DMA channel assigned to I2C1 TX"
 #endif
 
-#if STM32_I2C_USE_I2C2 &&                                                   \
+#if !STM32_DMA_IS_VALID_PRIORITY(STM32_I2C_I2C1_DMA_PRIORITY)
-    !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C2_RX_DMA_CHANNEL)
+#error "Invalid DMA priority assigned to I2C1"
+#endif
+#endif
+
+#if STM32_I2C_USE_I2C2
+#if !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C2_RX_DMA_CHANNEL)
 #error "Invalid DMA channel assigned to I2C2 RX"
 #endif
 
-#if STM32_I2C_USE_I2C2 &&                                                   \
+#if !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C2_TX_DMA_CHANNEL)
-    !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C2_TX_DMA_CHANNEL)
 #error "Invalid DMA channel assigned to I2C2 TX"
 #endif
 
-#if STM32_I2C_USE_I2C3 &&                                                   \
+#if !STM32_DMA_IS_VALID_PRIORITY(STM32_I2C_I2C2_DMA_PRIORITY)
-    !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C3_RX_DMA_CHANNEL)
+#error "Invalid DMA priority assigned to I2C2"
+#endif
+#endif
+
+#if STM32_I2C_USE_I2C3
+#if !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C3_RX_DMA_CHANNEL)
 #error "Invalid DMA channel assigned to I2C3 RX"
 #endif
 
-#if STM32_I2C_USE_I2C3 &&                                                   \
+#if !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C3_TX_DMA_CHANNEL)
-    !STM32_DMA_IS_VALID_CHANNEL(STM32_I2C_I2C3_TX_DMA_CHANNEL)
 #error "Invalid DMA channel assigned to I2C3 TX"
 #endif
 
-#if STM32_I2C_USE_I2C4 &&                                                   \
+#if !STM32_DMA_IS_VALID_PRIORITY(STM32_I2C_I2C3_DMA_PRIORITY)
-    !STM32_BDMA_IS_VALID_CHANNEL(STM32_I2C_I2C4_RX_BDMA_CHANNEL)
+#error "Invalid DMA priority assigned to I2C3"
+#endif
+#endif
+
+#if STM32_I2C_USE_I2C4
+#if !STM32_BDMA_IS_VALID_CHANNEL(STM32_I2C_I2C4_RX_BDMA_CHANNEL)
 #error "Invalid BDMA channel assigned to I2C4 RX"
 #endif
 
-#if STM32_I2C_USE_I2C4 &&                                                   \
+#if !STM32_BDMA_IS_VALID_CHANNEL(STM32_I2C_I2C4_TX_BDMA_CHANNEL)
-    !STM32_BDMA_IS_VALID_CHANNEL(STM32_I2C_I2C4_TX_BDMA_CHANNEL)
 #error "Invalid BDMA channel assigned to I2C4 TX"
 #endif
 
-#if STM32_I2C_USE_I2C1 &&                                                   \
+#if !STM32_BDMA_IS_VALID_PRIORITY(STM32_I2C_I2C4_DMA_PRIORITY)
-    !STM32_DMA_IS_VALID_PRIORITY(STM32_I2C_I2C1_DMA_PRIORITY)
-#error "Invalid DMA priority assigned to I2C1"
-#endif
-
-#if STM32_I2C_USE_I2C2 &&                                                   \
-    !STM32_DMA_IS_VALID_PRIORITY(STM32_I2C_I2C2_DMA_PRIORITY)
-#error "Invalid DMA priority assigned to I2C2"
-#endif
-
-#if STM32_I2C_USE_I2C3 &&                                                   \
-    !STM32_DMA_IS_VALID_PRIORITY(STM32_I2C_I2C3_DMA_PRIORITY)
-#error "Invalid DMA priority assigned to I2C3"
-#endif
-
-#if STM32_I2C_USE_I2C4 &&                                                   \
-    !STM32_DMA_IS_VALID_PRIORITY(STM32_I2C_I2C4_DMA_PRIORITY)
 #error "Invalid DMA priority assigned to I2C4"
 #endif
+#endif
 
 #if STM32_I2C_USE_I2C1 || STM32_I2C_USE_I2C2 || STM32_I2C_USE_I2C3
 #define STM32_I2C_DMA_REQUIRED

os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c

@@ -199,8 +199,13 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI1
   spiObjectInit(&SPID1);
   SPID1.spi       = SPI1;
+#if STM32_DMA_SUPPORTS_DMAMUX
+  SPID1.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI1_RX_DMA_CHANNEL);
+  SPID1.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI1_TX_DMA_CHANNEL);
+#else
   SPID1.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI1_RX_DMA_STREAM);
   SPID1.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI1_TX_DMA_STREAM);
+#endif
   SPID1.rxdmamode = STM32_DMA_CR_CHSEL(SPI1_RX_DMA_CHANNEL) |
                     STM32_DMA_CR_PL(STM32_SPI_SPI1_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_P2M |
@@ -217,8 +222,13 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI2
   spiObjectInit(&SPID2);
   SPID2.spi       = SPI2;
+#if STM32_DMA_SUPPORTS_DMAMUX
+  SPID1.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI1_RX_DMA_CHANNEL);
+  SPID1.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI1_TX_DMA_CHANNEL);
+#else
   SPID2.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI2_RX_DMA_STREAM);
   SPID2.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI2_TX_DMA_STREAM);
+#endif
   SPID2.rxdmamode = STM32_DMA_CR_CHSEL(SPI2_RX_DMA_CHANNEL) |
                     STM32_DMA_CR_PL(STM32_SPI_SPI2_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_P2M |
@@ -235,8 +245,13 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI3
   spiObjectInit(&SPID3);
   SPID3.spi       = SPI3;
+#if STM32_DMA_SUPPORTS_DMAMUX
+  SPID3.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI3_RX_DMA_CHANNEL);
+  SPID3.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI3_TX_DMA_CHANNEL);
+#else
   SPID3.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI3_RX_DMA_STREAM);
   SPID3.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI3_TX_DMA_STREAM);
+#endif
   SPID3.rxdmamode = STM32_DMA_CR_CHSEL(SPI3_RX_DMA_CHANNEL) |
                     STM32_DMA_CR_PL(STM32_SPI_SPI3_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_P2M |
@@ -253,8 +268,13 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI4
   spiObjectInit(&SPID4);
   SPID4.spi       = SPI4;
+#if STM32_DMA_SUPPORTS_DMAMUX
+  SPID4.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI4_RX_DMA_CHANNEL);
+  SPID4.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI4_TX_DMA_CHANNEL);
+#else
   SPID4.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI4_RX_DMA_STREAM);
   SPID4.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI4_TX_DMA_STREAM);
+#endif
   SPID4.rxdmamode = STM32_DMA_CR_CHSEL(SPI4_RX_DMA_CHANNEL) |
                     STM32_DMA_CR_PL(STM32_SPI_SPI4_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_P2M |
@@ -271,8 +291,13 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI5
   spiObjectInit(&SPID5);
   SPID5.spi       = SPI5;
+#if STM32_DMA_SUPPORTS_DMAMUX
+  SPID5.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI5_RX_DMA_CHANNEL);
+  SPID5.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI5_TX_DMA_CHANNEL);
+#else
   SPID5.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI5_RX_DMA_STREAM);
   SPID5.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI5_TX_DMA_STREAM);
+#endif
   SPID5.rxdmamode = STM32_DMA_CR_CHSEL(SPI5_RX_DMA_CHANNEL) |
                     STM32_DMA_CR_PL(STM32_SPI_SPI5_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_P2M |
@@ -289,8 +314,13 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI6
   spiObjectInit(&SPID6);
   SPID6.spi       = SPI6;
+#if STM32_DMA_SUPPORTS_DMAMUX
+  SPID6.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI6_RX_DMA_CHANNEL);
+  SPID6.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI6_TX_DMA_CHANNEL);
+#else
   SPID6.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI6_RX_DMA_STREAM);
   SPID6.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI6_TX_DMA_STREAM);
+#endif
   SPID6.rxdmamode = STM32_DMA_CR_CHSEL(SPI6_RX_DMA_CHANNEL) |
                     STM32_DMA_CR_PL(STM32_SPI_SPI6_DMA_PRIORITY) |
                     STM32_DMA_CR_DIR_P2M |
@@ -331,6 +361,10 @@ void spi_lld_start(SPIDriver *spip) {
                             (void *)spip);
       osalDbgAssert(!b, "stream already allocated");
       rccEnableSPI1(true);
+#if STM32_DMA_SUPPORTS_DMAMUX
+      dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI1_RX);
+      dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI1_TX);
+#endif
     }
 #endif
 #if STM32_SPI_USE_SPI2
@@ -347,6 +381,10 @@ void spi_lld_start(SPIDriver *spip) {
                             (void *)spip);
       osalDbgAssert(!b, "stream already allocated");
       rccEnableSPI2(true);
+#if STM32_DMA_SUPPORTS_DMAMUX
+      dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI2_RX);
+      dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI2_TX);
+#endif
     }
 #endif
 #if STM32_SPI_USE_SPI3
@@ -363,6 +401,10 @@ void spi_lld_start(SPIDriver *spip) {
                             (void *)spip);
       osalDbgAssert(!b, "stream already allocated");
       rccEnableSPI3(true);
+#if STM32_DMA_SUPPORTS_DMAMUX
+      dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI3_RX);
+      dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI3_TX);
+#endif
     }
 #endif
 #if STM32_SPI_USE_SPI4
@@ -379,6 +421,10 @@ void spi_lld_start(SPIDriver *spip) {
                             (void *)spip);
       osalDbgAssert(!b, "stream already allocated");
       rccEnableSPI4(true);
+#if STM32_DMA_SUPPORTS_DMAMUX
+      dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI4_RX);
+      dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI4_TX);
+#endif
     }
 #endif
 #if STM32_SPI_USE_SPI5
@@ -395,6 +441,10 @@ void spi_lld_start(SPIDriver *spip) {
                             (void *)spip);
       osalDbgAssert(!b, "stream already allocated");
       rccEnableSPI5(true);
+#if STM32_DMA_SUPPORTS_DMAMUX
+      dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI5_RX);
+      dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI5_TX);
+#endif
     }
 #endif
 #if STM32_SPI_USE_SPI6
@@ -411,6 +461,10 @@ void spi_lld_start(SPIDriver *spip) {
                             (void *)spip);
       osalDbgAssert(!b, "stream already allocated");
       rccEnableSPI6(true);
+#if STM32_DMA_SUPPORTS_DMAMUX
+      dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI6_RX);
+      dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI6_TX);
+#endif
     }
 #endif
 

os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h

@@ -301,9 +301,66 @@
 #error "Invalid DMA priority assigned to SPI6"
 #endif
 
-/* The following checks are only required when there is a DMA able to
+/* Devices with DMAMUX require a different kind of check.*/
-   reassign streams to different channels.*/
+#if STM32_DMA_SUPPORTS_DMAMUX
-#if STM32_ADVANCED_DMA
+
+#if STM32_SPI_USE_SPI1 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI1_TX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI1 TX"
+#endif
+
+#if STM32_SPI_USE_SPI2 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI2_RX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI2 RX"
+#endif
+
+#if STM32_SPI_USE_SPI2 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI2_TX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI2 TX"
+#endif
+
+#if STM32_SPI_USE_SPI3 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI3_RX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI3 RX"
+#endif
+
+#if STM32_SPI_USE_SPI3 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI3_TX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI3 TX"
+#endif
+
+#if STM32_SPI_USE_SPI4 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI4_RX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI4 RX"
+#endif
+
+#if STM32_SPI_USE_SPI4 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI4_TX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI4 TX"
+#endif
+
+#if STM32_SPI_USE_SPI5 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI5_RX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI5 RX"
+#endif
+
+#if STM32_SPI_USE_SPI5 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI5_TX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI5 TX"
+#endif
+
+#if STM32_SPI_USE_SPI6 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI6_RX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI6 RX"
+#endif
+
+#if STM32_SPI_USE_SPI6 &&                                                   \
+    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI6_TX_DMA_CHANNEL)
+#error "Invalid DMA channel assigned to SPI6 TX"
+#endif
+
+#else /* !STM32_DMA_SUPPORTS_DMAMUX */
+
 /* Check on the presence of the DMA streams settings in mcuconf.h.*/
 #if STM32_SPI_USE_SPI1 && (!defined(STM32_SPI_SPI1_RX_DMA_STREAM) ||        \
                            !defined(STM32_SPI_SPI1_TX_DMA_STREAM))
@@ -395,7 +452,8 @@
     !STM32_DMA_IS_VALID_ID(STM32_SPI_SPI6_TX_DMA_STREAM, STM32_SPI6_TX_DMA_MSK)
 #error "invalid DMA stream associated to SPI6 TX"
 #endif
-#endif /* STM32_ADVANCED_DMA */
+
+#endif /* !STM32_DMA_SUPPORTS_DMAMUX */
 
 #if !defined(STM32_DMA_REQUIRED)
 #define STM32_DMA_REQUIRED

os/hal/ports/STM32/STM32L4xx+/platform.mk

@@ -24,8 +24,9 @@ endif
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv3/driver.mk
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv3/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk
-include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv3/driver.mk
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1/driver.mk

testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h

@@ -158,6 +158,23 @@
 /*
  * I2C driver system settings.
  */
+#define STM32_I2C_USE_I2C1                  FALSE
+#define STM32_I2C_USE_I2C2                  FALSE
+#define STM32_I2C_USE_I2C3                  FALSE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_RX_DMA_CHANNEL       6
+#define STM32_I2C_I2C1_TX_DMA_CHANNEL       7
+#define STM32_I2C_I2C2_RX_DMA_CHANNEL       8
+#define STM32_I2C_I2C2_TX_DMA_CHANNEL       9
+#define STM32_I2C_I2C3_RX_DMA_CHANNEL       8
+#define STM32_I2C_I2C3_TX_DMA_CHANNEL       9
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C3_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_I2C3_DMA_PRIORITY         3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
 
 /*
  * ICU driver system settings.
@@ -215,9 +232,9 @@
 /*
  * SPI driver system settings.
  */
-#define STM32_SPI_USE_SPI1                  TRUE
+#define STM32_SPI_USE_SPI1                  FALSE
-#define STM32_SPI_USE_SPI2                  TRUE
+#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_USE_SPI3                  TRUE
+#define STM32_SPI_USE_SPI3                  FALSE
 #define STM32_SPI_SPI1_RX_DMA_CHANNEL       0
 #define STM32_SPI_SPI1_TX_DMA_CHANNEL       1
 #define STM32_SPI_SPI2_RX_DMA_CHANNEL       2

testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/portab.c

@@ -94,13 +94,13 @@ void portab_setup(void) {
    * SPI2 I/O pins setup.
    */
   palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) |
-                           PAL_STM32_OSPEED_HIGHEST);       /* New SCK.     */
+                           PAL_STM32_OSPEED_HIGH);          /* New SCK.     */
   palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) |
-                           PAL_STM32_OSPEED_HIGHEST);       /* New MISO.    */
+                           PAL_STM32_OSPEED_HIGH);          /* New MISO.    */
   palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) |
-                           PAL_STM32_OSPEED_HIGHEST);       /* New MOSI.    */
+                           PAL_STM32_OSPEED_HIGH);          /* New MOSI.    */
   palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL |
-                           PAL_STM32_OSPEED_HIGHEST);       /* New CS.      */
+                           PAL_STM32_OSPEED_HIGH);          /* New CS.      */
   palSetPad(GPIOB, 12);
 }
 

tools/ftl/processors/conf/mcuconf_stm32l4r5xx/mcuconf.h.ftl

@@ -169,6 +169,23 @@
 /*
  * I2C driver system settings.
  */
+#define STM32_I2C_USE_I2C1                  ${doc.STM32_I2C_USE_I2C1!"FALSE"}
+#define STM32_I2C_USE_I2C2                  ${doc.STM32_I2C_USE_I2C2!"FALSE"}
+#define STM32_I2C_USE_I2C3                  ${doc.STM32_I2C_USE_I2C3!"FALSE"}
+#define STM32_I2C_BUSY_TIMEOUT              ${doc.STM32_I2C_BUSY_TIMEOUT!"50"}
+#define STM32_I2C_I2C1_RX_DMA_CHANNEL       ${doc.STM32_I2C_I2C1_RX_DMA_CHANNEL!"6"}
+#define STM32_I2C_I2C1_TX_DMA_CHANNEL       ${doc.STM32_I2C_I2C1_TX_DMA_CHANNEL!"7"}
+#define STM32_I2C_I2C2_RX_DMA_CHANNEL       ${doc.STM32_I2C_I2C2_RX_DMA_CHANNEL!"8"}
+#define STM32_I2C_I2C2_TX_DMA_CHANNEL       ${doc.STM32_I2C_I2C2_TX_DMA_CHANNEL!"9"}
+#define STM32_I2C_I2C3_RX_DMA_CHANNEL       ${doc.STM32_I2C_I2C3_RX_DMA_CHANNEL!"8"}
+#define STM32_I2C_I2C3_TX_DMA_CHANNEL       ${doc.STM32_I2C_I2C3_TX_DMA_CHANNEL!"9"}
+#define STM32_I2C_I2C1_IRQ_PRIORITY         ${doc.STM32_I2C_I2C1_IRQ_PRIORITY!"5"}
+#define STM32_I2C_I2C2_IRQ_PRIORITY         ${doc.STM32_I2C_I2C2_IRQ_PRIORITY!"5"}
+#define STM32_I2C_I2C3_IRQ_PRIORITY         ${doc.STM32_I2C_I2C3_IRQ_PRIORITY!"5"}
+#define STM32_I2C_I2C1_DMA_PRIORITY         ${doc.STM32_I2C_I2C1_DMA_PRIORITY!"3"}
+#define STM32_I2C_I2C2_DMA_PRIORITY         ${doc.STM32_I2C_I2C2_DMA_PRIORITY!"3"}
+#define STM32_I2C_I2C3_DMA_PRIORITY         ${doc.STM32_I2C_I2C3_DMA_PRIORITY!"3"}
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      ${doc.STM32_I2C_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
 
 /*
  * ICU driver system settings.
@@ -229,12 +246,12 @@
 #define STM32_SPI_USE_SPI1                  ${doc.STM32_SPI_USE_SPI1!"FALSE"}
 #define STM32_SPI_USE_SPI2                  ${doc.STM32_SPI_USE_SPI2!"FALSE"}
 #define STM32_SPI_USE_SPI3                  ${doc.STM32_SPI_USE_SPI3!"FALSE"}
-#define STM32_SPI_SPI1_RX_DMA_CHANNEL       ${doc.STM32_SPI_SPI1_RX_DMA_CHANNEL!"10"}
+#define STM32_SPI_SPI1_RX_DMA_CHANNEL       ${doc.STM32_SPI_SPI1_RX_DMA_CHANNEL!"0"}
-#define STM32_SPI_SPI1_TX_DMA_CHANNEL       ${doc.STM32_SPI_SPI1_TX_DMA_CHANNEL!"11"}
+#define STM32_SPI_SPI1_TX_DMA_CHANNEL       ${doc.STM32_SPI_SPI1_TX_DMA_CHANNEL!"1"}
-#define STM32_SPI_SPI2_RX_DMA_CHANNEL       ${doc.STM32_SPI_SPI2_RX_DMA_CHANNEL!"12"}
+#define STM32_SPI_SPI2_RX_DMA_CHANNEL       ${doc.STM32_SPI_SPI2_RX_DMA_CHANNEL!"2"}
-#define STM32_SPI_SPI2_TX_DMA_CHANNEL       ${doc.STM32_SPI_SPI2_TX_DMA_CHANNEL!"13"}
+#define STM32_SPI_SPI2_TX_DMA_CHANNEL       ${doc.STM32_SPI_SPI2_TX_DMA_CHANNEL!"3"}
-#define STM32_SPI_SPI3_RX_DMA_CHANNEL       ${doc.STM32_SPI_SPI3_RX_DMA_CHANNEL!"10"}
+#define STM32_SPI_SPI3_RX_DMA_CHANNEL       ${doc.STM32_SPI_SPI3_RX_DMA_CHANNEL!"4"}
-#define STM32_SPI_SPI3_TX_DMA_CHANNEL       ${doc.STM32_SPI_SPI3_TX_DMA_CHANNEL!"11"}
+#define STM32_SPI_SPI3_TX_DMA_CHANNEL       ${doc.STM32_SPI_SPI3_TX_DMA_CHANNEL!"5"}
 #define STM32_SPI_SPI1_DMA_PRIORITY         ${doc.STM32_SPI_SPI1_DMA_PRIORITY!"1"}
 #define STM32_SPI_SPI2_DMA_PRIORITY         ${doc.STM32_SPI_SPI2_DMA_PRIORITY!"1"}
 #define STM32_SPI_SPI3_DMA_PRIORITY         ${doc.STM32_SPI_SPI3_DMA_PRIORITY!"1"}