From 9f73c0dbf69e3eb51b9d8d1b886e2bf15a8160f1 Mon Sep 17 00:00:00 2001
From: edolomb <none@example.com>
Date: Fri, 22 Dec 2017 17:38:41 +0000
Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11167
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c | 25 ++++++++++++++++++++++++
 os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h |  4 ++++
 2 files changed, 29 insertions(+)

diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c
index c8624ea40..db399a3bb 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c
+++ b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c
@@ -77,6 +77,31 @@
 /*===========================================================================*/
 /* Driver exported functions.                                                */
 /*===========================================================================*/
+/**
+ * @brief   Configures peripheral security
+ *
+ * @param[in] mtxp      pointer to a MATRIX register block.
+ * @param[in] id        PERIPHERAL_ID.
+ * @param[in] mode      SECURE_PER or NOT_SECURE_PER.
+ *
+ * @retval true         Peripheral is not secured.
+ * @retval false        Peripheral is secured.
+ *
+ */
+bool mtxConfigPeriphSecurity(Matrix *mtxp, uint8_t id, bool mode) {
+
+  mtxDisableWP(mtxp);
+  if (mode) {
+    mtxp->MATRIX_SPSELR[id / 32] |= (MATRIX_SPSELR_NSECP0 << id);
+  }
+  else {
+    mtxp->MATRIX_SPSELR[id / 32] &= ~(MATRIX_SPSELR_NSECP0 << id);
+  }
+  mtxEnableWP(mtxp);
+
+  return (MATRIX0->MATRIX_SPSELR[id / 32] & (MATRIX_SPSELR_NSECP0 << id)) &
+         (MATRIX1->MATRIX_SPSELR[id / 32] & (MATRIX_SPSELR_NSECP0 << id));
+}
 
 /**
  * @brief    Associates slave with a kind of master
diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h
index 52a3bb3f1..b9133a85b 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h
+++ b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h
@@ -37,6 +37,9 @@
 #define NOT_SECURE_READ          0x1u
 #define NOT_SECURE_WRITE         0x1u
 
+#define SECURE_PER               FALSE
+#define NOT_SECURE_PER           TRUE
+
 #define NO_DEFAULT_MASTER        0x0u
 #define LAST_DEFAULT_MASTER      0x1u
 #define FIXED_DEFAULT_MASTER     0x2u
@@ -90,6 +93,7 @@
 #ifdef __cplusplus
 extern "C" {
 #endif
+ bool mtxConfigPeriphSecurity(Matrix *mtxp, uint8_t id, bool mode);
  void mtxConfigDefaultMaster(Matrix *mtxp, uint8_t slaveID,
                              uint8_t type, uint8_t masterID);
  void mtxConfigSlaveSec(Matrix *mtxp, uint8_t slaveID,