From a21ea7128bf738c458449ac51361fbb45834f447 Mon Sep 17 00:00:00 2001 From: Rocco Marco Guglielmi Date: Thu, 5 May 2016 00:55:57 +0000 Subject: [PATCH] Completed STM32L0xx port adding STM32L011xx support, Added STM32 Nucleo32-L011K4 board files Added demo NIL-STM32L011K4-NUCLEO32 git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9414 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- .../STM32/NIL-STM32L011K4-NUCLEO32/.cproject | 54 + demos/STM32/NIL-STM32L011K4-NUCLEO32/.project | 90 ++ demos/STM32/NIL-STM32L011K4-NUCLEO32/Makefile | 218 ++++ demos/STM32/NIL-STM32L011K4-NUCLEO32/chconf.h | 274 ++++++ ...4-NUCLEO32 (OpenOCD, Flash and Run).launch | 52 + .../STM32/NIL-STM32L011K4-NUCLEO32/halconf.h | 381 +++++++ demos/STM32/NIL-STM32L011K4-NUCLEO32/main.c | 83 ++ .../STM32/NIL-STM32L011K4-NUCLEO32/mcuconf.h | 174 ++++ demos/STM32/RT-STM32F031K6-NUCLEO32/main.c | 2 +- demos/STM32/RT-STM32F042K6-NUCLEO32/main.c | 2 +- demos/STM32/RT-STM32F303K8-NUCLEO32/main.c | 2 +- demos/STM32/RT-STM32L031K6-NUCLEO32/main.c | 2 +- .../ARMCMx/compilers/GCC/ld/STM32L011x4.ld | 2 +- .../boards/ST_NUCLEO32_F031K6/cfg/board.chcfg | 6 +- os/hal/boards/ST_NUCLEO32_F042K6/board.h | 10 +- os/hal/boards/ST_NUCLEO32_F042K6/board.mk | 4 +- .../boards/ST_NUCLEO32_F042K6/cfg/board.chcfg | 6 +- os/hal/boards/ST_NUCLEO32_F303K8/board.h | 10 +- os/hal/boards/ST_NUCLEO32_F303K8/board.mk | 4 +- .../boards/ST_NUCLEO32_F303K8/cfg/board.chcfg | 6 +- os/hal/boards/ST_NUCLEO32_L011K4/board.c | 124 +++ os/hal/boards/ST_NUCLEO32_L011K4/board.h | 930 ++++++++++++++++++ os/hal/boards/ST_NUCLEO32_L011K4/board.mk | 5 + .../boards/ST_NUCLEO32_L011K4/cfg/board.chcfg | 799 +++++++++++++++ os/hal/boards/ST_NUCLEO32_L031K6/board.h | 8 +- .../boards/ST_NUCLEO32_L031K6/cfg/board.chcfg | 6 +- 26 files changed, 3219 insertions(+), 35 deletions(-) create mode 100644 demos/STM32/NIL-STM32L011K4-NUCLEO32/.cproject create mode 100644 demos/STM32/NIL-STM32L011K4-NUCLEO32/.project create mode 100644 demos/STM32/NIL-STM32L011K4-NUCLEO32/Makefile create mode 100644 demos/STM32/NIL-STM32L011K4-NUCLEO32/chconf.h create mode 100644 demos/STM32/NIL-STM32L011K4-NUCLEO32/debug/NIL-STM32L011K4-NUCLEO32 (OpenOCD, Flash and Run).launch create mode 100644 demos/STM32/NIL-STM32L011K4-NUCLEO32/halconf.h create mode 100644 demos/STM32/NIL-STM32L011K4-NUCLEO32/main.c create mode 100644 demos/STM32/NIL-STM32L011K4-NUCLEO32/mcuconf.h create mode 100644 os/hal/boards/ST_NUCLEO32_L011K4/board.c create mode 100644 os/hal/boards/ST_NUCLEO32_L011K4/board.h create mode 100644 os/hal/boards/ST_NUCLEO32_L011K4/board.mk create mode 100644 os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg diff --git a/demos/STM32/NIL-STM32L011K4-NUCLEO32/.cproject b/demos/STM32/NIL-STM32L011K4-NUCLEO32/.cproject new file mode 100644 index 000000000..53f0ef742 --- /dev/null +++ b/demos/STM32/NIL-STM32L011K4-NUCLEO32/.cproject @@ -0,0 +1,54 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/demos/STM32/NIL-STM32L011K4-NUCLEO32/.project b/demos/STM32/NIL-STM32L011K4-NUCLEO32/.project new file mode 100644 index 000000000..c44f326b8 --- /dev/null +++ b/demos/STM32/NIL-STM32L011K4-NUCLEO32/.project @@ -0,0 +1,90 @@ + + + NIL-STM32L011K4-NUCLEO32 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + mingw32-make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + C:/ChibiStudio/chibios_trunk/os/hal/boards/ST_NUCLEO32_L011K4 + + + os + 2 + CHIBIOS/os + + + diff --git a/demos/STM32/NIL-STM32L011K4-NUCLEO32/Makefile b/demos/STM32/NIL-STM32L011K4-NUCLEO32/Makefile new file mode 100644 index 000000000..aa817d62a --- /dev/null +++ b/demos/STM32/NIL-STM32L011K4-NUCLEO32/Makefile @@ -0,0 +1,218 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x100 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x200 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +# Startup files. +include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/ports/STM32/STM32L0xx/platform.mk +include $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_L011K4/board.mk +include $(CHIBIOS)/os/hal/osal/nil/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/nil/nil.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk +# Other files (optional). +#include $(CHIBIOS)/test/nil/test.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/STM32L011x4.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(STARTUPSRC) \ + $(KERNSRC) \ + $(PORTSRC) \ + $(OSALSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(TESTSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = +ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) + +INCDIR = $(CHIBIOS)/os/license \ + $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra -Wundef + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/demos/STM32/NIL-STM32L011K4-NUCLEO32/chconf.h b/demos/STM32/NIL-STM32L011K4-NUCLEO32/chconf.h new file mode 100644 index 000000000..c5772de18 --- /dev/null +++ b/demos/STM32/NIL-STM32L011K4-NUCLEO32/chconf.h @@ -0,0 +1,274 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_NIL_CONF_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of user threads in the application. + * @note This number is not inclusive of the idle thread which is + * Implicitly handled. + */ +#define CH_CFG_NUM_THREADS 2 + +/** @} */ + +/*===========================================================================*/ +/** + * @name System timer settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_ST_RESOLUTION 16 + +/** + * @brief System tick frequency. + * @note This value together with the @p CH_CFG_ST_RESOLUTION + * option defines the maximum amount of time allowed for + * timeouts. + */ +#define CH_CFG_ST_FREQUENCY 1000 + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#define CH_CFG_ST_TIMEDELTA 2 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_SEMAPHORES TRUE + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note Feature not currently implemented. + * @note The default is @p FALSE. + */ +#define CH_CFG_USE_MUTEXES FALSE + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_EVENTS TRUE + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_MAILBOXES TRUE + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMCORE TRUE + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_HEAP TRUE + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMPOOLS TRUE + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#define CH_CFG_MEMCORE_SIZE 0 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note Feature not currently implemented. + * @note The default is @p FALSE. + */ +#define CH_DBG_STATISTICS FALSE + +/** + * @brief Debug option, system state check. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_SYSTEM_STATE_CHECK FALSE + +/** + * @brief Debug option, parameters checks. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_CHECKS FALSE + +/** + * @brief System assertions. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_ASSERTS FALSE + +/** + * @brief Stack check. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_STACK_CHECK FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System initialization hook. + */ +#if !defined(CH_CFG_SYSTEM_INIT_HOOK) || defined(__DOXYGEN__) +#define CH_CFG_SYSTEM_INIT_HOOK() { \ +} +#endif + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + */ +#define CH_CFG_THREAD_EXT_INIT_HOOK(tr) { \ + /* Add custom threads initialization code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ +} + +/** + * @brief System halt hook. + */ +#if !defined(CH_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in nilcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/demos/STM32/NIL-STM32L011K4-NUCLEO32/debug/NIL-STM32L011K4-NUCLEO32 (OpenOCD, Flash and Run).launch b/demos/STM32/NIL-STM32L011K4-NUCLEO32/debug/NIL-STM32L011K4-NUCLEO32 (OpenOCD, Flash and Run).launch new file mode 100644 index 000000000..37a751152 --- /dev/null +++ b/demos/STM32/NIL-STM32L011K4-NUCLEO32/debug/NIL-STM32L011K4-NUCLEO32 (OpenOCD, Flash and Run).launch @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/demos/STM32/NIL-STM32L011K4-NUCLEO32/halconf.h b/demos/STM32/NIL-STM32L011K4-NUCLEO32/halconf.h new file mode 100644 index 000000000..1bdd0f844 --- /dev/null +++ b/demos/STM32/NIL-STM32L011K4-NUCLEO32/halconf.h @@ -0,0 +1,381 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/demos/STM32/NIL-STM32L011K4-NUCLEO32/main.c b/demos/STM32/NIL-STM32L011K4-NUCLEO32/main.c new file mode 100644 index 000000000..b43e980ad --- /dev/null +++ b/demos/STM32/NIL-STM32L011K4-NUCLEO32/main.c @@ -0,0 +1,83 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" +#include "ch.h" + +/* + * Thread 1. + */ +THD_WORKING_AREA(waThread1, 128); +THD_FUNCTION(Thread1, arg) { + + (void)arg; + + while (true) { + palSetPad(GPIOB, GPIOB_LED_GREEN); + chThdSleepMilliseconds(250); + palClearPad(GPIOB, GPIOB_LED_GREEN); + chThdSleepMilliseconds(250); + } +} + +/* + * Thread 2. + */ +THD_WORKING_AREA(waThread2, 128); +THD_FUNCTION(Thread2, arg) { + + (void)arg; + + sdStart(&SD2, NULL); + + while (true) { + chnWrite(&SD2, (const uint8_t *)"Hello World!\r\n", 14); + chThdSleepMilliseconds(2000); + } +} + + +/* + * Threads static table, one entry per thread. The number of entries must + * match NIL_CFG_NUM_THREADS. + */ +THD_TABLE_BEGIN + THD_TABLE_ENTRY(waThread1, "blinker", Thread1, NULL) + THD_TABLE_ENTRY(waThread2, "hello", Thread2, NULL) +THD_TABLE_END + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* This is now the idle thread loop, you may perform here a low priority + task but you must never try to sleep or wait in this loop. Note that + this tasks runs at the lowest priority level so any instruction added + here will be executed after all other tasks have been started.*/ + while (true) { + } +} diff --git a/demos/STM32/NIL-STM32L011K4-NUCLEO32/mcuconf.h b/demos/STM32/NIL-STM32L011K4-NUCLEO32/mcuconf.h new file mode 100644 index 000000000..1c648453a --- /dev/null +++ b/demos/STM32/NIL-STM32L011K4-NUCLEO32/mcuconf.h @@ -0,0 +1,174 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32L0xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI16_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED FALSE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI16 +#define STM32_PLLMUL_VALUE 4 +#define STM32_PLLDIV_VALUE 2 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_USART2SEL STM32_USART2SEL_APB +#define STM32_LPUART1SEL STM32_LPUART1SEL_APB +#define STM32_I2C1SEL STM32_I2C1SEL_APB +#define STM32_LPTIM1SEL STM32_LPTIM1SEL_APB +#define STM32_HSI48SEL STM32_HSI48SEL_HSI48 + +/* + * ADC driver system settings. + * Note, IRQ is shared with EXT channels 21 and 22. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_ADC_PRESCALER_VALUE 1 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI17_20_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 3 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 +#define STM32_GPT_USE_TIM21 FALSE +#define STM32_GPT_TIM21_IRQ_PRIORITY 2 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_IRQ_PRIORITY 3 +#define STM32_I2C_I2C2_IRQ_PRIORITY 3 +#define STM32_I2C_USE_DMA TRUE +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 +#define STM32_ICU_USE_TIM21 FALSE +#define STM32_ICU_TIM21_IRQ_PRIORITY 3 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 +#define STM32_PWM_USE_TIM21 FALSE +#define STM32_PWM_TIM21_IRQ_PRIORITY 3 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_LPUART1 FALSE +#define STM32_SERIAL_USART1_PRIORITY 3 +#define STM32_SERIAL_USART2_PRIORITY 3 +#define STM32_SERIAL_LPUART1_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 1 +#define STM32_SPI_SPI2_IRQ_PRIORITY 1 +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 2 +#define STM32_ST_USE_TIMER 21 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ diff --git a/demos/STM32/RT-STM32F031K6-NUCLEO32/main.c b/demos/STM32/RT-STM32F031K6-NUCLEO32/main.c index c4441b352..09f7ebfb1 100644 --- a/demos/STM32/RT-STM32F031K6-NUCLEO32/main.c +++ b/demos/STM32/RT-STM32F031K6-NUCLEO32/main.c @@ -26,7 +26,7 @@ static THD_FUNCTION(Thread1, arg) { (void)arg; chRegSetThreadName("blinker"); - palSetLineMode(LINE_LED_GREEN, PAL_MODE_OUTPUT_PUSHPULL); + while (true) { palClearLine(LINE_LED_GREEN); chThdSleepMilliseconds(500); diff --git a/demos/STM32/RT-STM32F042K6-NUCLEO32/main.c b/demos/STM32/RT-STM32F042K6-NUCLEO32/main.c index e8272659a..da36cadbd 100644 --- a/demos/STM32/RT-STM32F042K6-NUCLEO32/main.c +++ b/demos/STM32/RT-STM32F042K6-NUCLEO32/main.c @@ -26,7 +26,7 @@ static THD_FUNCTION(Thread1, arg) { (void)arg; chRegSetThreadName("blinker"); - palSetLineMode(LINE_LED_GREEN, PAL_MODE_OUTPUT_PUSHPULL); + while (true) { palClearLine(LINE_LED_GREEN); chThdSleepMilliseconds(500); diff --git a/demos/STM32/RT-STM32F303K8-NUCLEO32/main.c b/demos/STM32/RT-STM32F303K8-NUCLEO32/main.c index e8272659a..da36cadbd 100644 --- a/demos/STM32/RT-STM32F303K8-NUCLEO32/main.c +++ b/demos/STM32/RT-STM32F303K8-NUCLEO32/main.c @@ -26,7 +26,7 @@ static THD_FUNCTION(Thread1, arg) { (void)arg; chRegSetThreadName("blinker"); - palSetLineMode(LINE_LED_GREEN, PAL_MODE_OUTPUT_PUSHPULL); + while (true) { palClearLine(LINE_LED_GREEN); chThdSleepMilliseconds(500); diff --git a/demos/STM32/RT-STM32L031K6-NUCLEO32/main.c b/demos/STM32/RT-STM32L031K6-NUCLEO32/main.c index e8272659a..da36cadbd 100644 --- a/demos/STM32/RT-STM32L031K6-NUCLEO32/main.c +++ b/demos/STM32/RT-STM32L031K6-NUCLEO32/main.c @@ -26,7 +26,7 @@ static THD_FUNCTION(Thread1, arg) { (void)arg; chRegSetThreadName("blinker"); - palSetLineMode(LINE_LED_GREEN, PAL_MODE_OUTPUT_PUSHPULL); + while (true) { palClearLine(LINE_LED_GREEN); chThdSleepMilliseconds(500); diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x4.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x4.ld index e67b5fc41..f9d5ef057 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x4.ld +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x4.ld @@ -19,7 +19,7 @@ */ MEMORY { - flash0 : org = 0x08000000, len = 8k + flash0 : org = 0x08000000, len = 16k flash1 : org = 0x00000000, len = 0 flash2 : org = 0x00000000, len = 0 flash3 : org = 0x00000000, len = 0 diff --git a/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg index 8cd278de0..a31562edb 100644 --- a/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg @@ -173,10 +173,10 @@ + + + + resources/gencfg/processors/boards/stm32l0xx/templates + .. + 3.0.x + + STMicroelectronics STM32 Nucleo32-L011K4 + ST_NUCLEO32_L011K4 + + STM32L011xx + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/os/hal/boards/ST_NUCLEO32_L031K6/board.h b/os/hal/boards/ST_NUCLEO32_L031K6/board.h index e5f1e46b0..79dd70a90 100644 --- a/os/hal/boards/ST_NUCLEO32_L031K6/board.h +++ b/os/hal/boards/ST_NUCLEO32_L031K6/board.h @@ -357,7 +357,7 @@ * PB0 - ARD_D3 (input pullup). * PB1 - ARD_D6 (input pullup). * PB2 - PIN2 (input pullup). - * PB3 - ARD_D13 LED_GREEN (input pullup). + * PB3 - ARD_D13 LED_GREEN (output pushpull maximum). * PB4 - ARD_D12 (input pullup). * PB5 - ARD_D11 (input pullup). * PB6 - ARD_D5 ARD_A5_ALT (input pullup). @@ -374,7 +374,7 @@ #define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_D3) | \ PIN_MODE_INPUT(GPIOB_ARD_D6) | \ PIN_MODE_INPUT(GPIOB_PIN2) | \ - PIN_MODE_INPUT(GPIOB_ARD_D13) | \ + PIN_MODE_OUTPUT(GPIOB_ARD_D13) | \ PIN_MODE_INPUT(GPIOB_ARD_D12) | \ PIN_MODE_INPUT(GPIOB_ARD_D11) | \ PIN_MODE_INPUT(GPIOB_ARD_D5) | \ @@ -422,7 +422,7 @@ #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_D3) | \ PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | \ PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOB_ARD_D13) | \ + PIN_PUPDR_FLOATING(GPIOB_ARD_D13) | \ PIN_PUPDR_PULLUP(GPIOB_ARD_D12) | \ PIN_PUPDR_PULLUP(GPIOB_ARD_D11) | \ PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | \ @@ -438,7 +438,7 @@ #define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_D3) | \ PIN_ODR_HIGH(GPIOB_ARD_D6) | \ PIN_ODR_HIGH(GPIOB_PIN2) | \ - PIN_ODR_HIGH(GPIOB_ARD_D13) | \ + PIN_ODR_LOW(GPIOB_ARD_D13) | \ PIN_ODR_HIGH(GPIOB_ARD_D12) | \ PIN_ODR_HIGH(GPIOB_ARD_D11) | \ PIN_ODR_HIGH(GPIOB_ARD_D5) | \ diff --git a/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.chcfg index 41e308c5b..0a0e4ab89 100644 --- a/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.chcfg @@ -173,10 +173,10 @@