mirror of https://github.com/rusefi/ChibiOS.git
New semaphore functions.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13076 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -65,6 +65,40 @@
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*/
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#define chSemObjectInit(sp, n) ((sp)->cnt = n)
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/**
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* @brief Performs a reset operation on the semaphore.
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* @post After invoking this function all the threads waiting on the
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* semaphore, if any, are released and the semaphore counter is set
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* to the specified, non negative, value.
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* @note This function implicitly sends @p MSG_RESET as message.
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*
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* @param[in] sp pointer to a @p semaphore_t structure
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* @param[in] n the new value of the semaphore counter. The value must
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* be non-negative.
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*
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* @api
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*/
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#define chSemReset(sp, n) chSemResetWithMessage(sp, n, MSG_RESET)
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/**
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* @brief Performs a reset operation on the semaphore.
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* @post After invoking this function all the threads waiting on the
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* semaphore, if any, are released and the semaphore counter is set
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* to the specified, non negative, value.
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* @post This function does not reschedule so a call to a rescheduling
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* function must be performed before unlocking the kernel. Note that
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* interrupt handlers always reschedule on exit so an explicit
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* reschedule must not be performed in ISRs.
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* @note This function implicitly sends @p MSG_RESET as message.
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*
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* @param[in] sp pointer to a @p semaphore_t structure
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* @param[in] n the new value of the semaphore counter. The value must
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* be non-negative.
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*
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* @iclass
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*/
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#define chSemResetI(sp, n) chSemResetWithMessageI(sp, n, MSG_RESET)
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/**
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* @brief Performs a wait operation on a semaphore.
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*
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@ -133,8 +167,8 @@ extern "C" {
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msg_t chSemWaitTimeoutS(semaphore_t *sp, sysinterval_t timeout);
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void chSemSignal(semaphore_t *sp);
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void chSemSignalI(semaphore_t *sp);
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void chSemReset(semaphore_t *sp, cnt_t n);
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void chSemResetI(semaphore_t *sp, cnt_t n);
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void chSemResetWithMessage(semaphore_t *sp, cnt_t n, msg_t msg);
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void chSemResetWithMessageI(semaphore_t *sp, cnt_t n, msg_t msg);
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#ifdef __cplusplus
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}
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#endif
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@ -169,17 +169,22 @@ void chSemSignalI(semaphore_t *sp) {
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* @post After invoking this function all the threads waiting on the
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* semaphore, if any, are released and the semaphore counter is set
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* to the specified, non negative, value.
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* @post This function does not reschedule so a call to a rescheduling
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* function must be performed before unlocking the kernel. Note that
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* interrupt handlers always reschedule on exit so an explicit
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* reschedule must not be performed in ISRs.
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*
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* @param[in] sp pointer to a @p semaphore_t structure
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* @param[in] n the new value of the semaphore counter. The value must
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* be non-negative.
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* @param[in] msg message to be sent
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*
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* @api
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*/
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void chSemReset(semaphore_t *sp, cnt_t n) {
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void chSemResetWithMessage(semaphore_t *sp, cnt_t n, msg_t msg) {
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chSysLock();
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chSemResetI(sp, n);
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chSemResetWithMessageI(sp, n, msg);
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chSchRescheduleS();
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chSysUnlock();
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}
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@ -197,10 +202,11 @@ void chSemReset(semaphore_t *sp, cnt_t n) {
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* @param[in] sp pointer to a @p semaphore_t structure
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* @param[in] n the new value of the semaphore counter. The value must
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* be non-negative.
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* @param[in] msg message to be sent
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*
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* @iclass
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*/
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void chSemResetI(semaphore_t *sp, cnt_t n) {
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void chSemResetWithMessageI(semaphore_t *sp, cnt_t n, msg_t msg) {
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cnt_t cnt;
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chDbgCheckClassI();
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@ -210,7 +216,7 @@ void chSemResetI(semaphore_t *sp, cnt_t n) {
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sp->cnt = n;
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/* Does nothing for cnt >= 0, calling anyway.*/
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(void) nil_ready_all((void *)sp, cnt, MSG_RESET);
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(void) nil_ready_all((void *)sp, cnt, msg);
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}
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#endif /* CH_CFG_USE_SEMAPHORES == TRUE */
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@ -89,8 +89,8 @@ typedef struct ch_semaphore {
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extern "C" {
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#endif
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void chSemObjectInit(semaphore_t *sp, cnt_t n);
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void chSemReset(semaphore_t *sp, cnt_t n);
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void chSemResetI(semaphore_t *sp, cnt_t n);
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void chSemResetWithMessage(semaphore_t *sp, cnt_t n, msg_t msg);
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void chSemResetWithMessageI(semaphore_t *sp, cnt_t n, msg_t msg);
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msg_t chSemWait(semaphore_t *sp);
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msg_t chSemWaitS(semaphore_t *sp);
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msg_t chSemWaitTimeout(semaphore_t *sp, sysinterval_t timeout);
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@ -107,6 +107,46 @@ extern "C" {
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/* Module inline functions. */
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/*===========================================================================*/
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/**
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* @brief Performs a reset operation on the semaphore.
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* @post After invoking this function all the threads waiting on the
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* semaphore, if any, are released and the semaphore counter is set
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* to the specified, non negative, value.
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* @note This function implicitly sends @p MSG_RESET as message.
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*
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* @param[in] sp pointer to a @p semaphore_t structure
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* @param[in] n the new value of the semaphore counter. The value must
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* be non-negative.
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*
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* @api
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*/
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static inline void chSemReset(semaphore_t *sp, cnt_t n) {
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chSemResetWithMessage(sp, n, MSG_RESET);
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}
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/**
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* @brief Performs a reset operation on the semaphore.
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* @post After invoking this function all the threads waiting on the
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* semaphore, if any, are released and the semaphore counter is set
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* to the specified, non negative, value.
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* @post This function does not reschedule so a call to a rescheduling
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* function must be performed before unlocking the kernel. Note that
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* interrupt handlers always reschedule on exit so an explicit
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* reschedule must not be performed in ISRs.
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* @note This function implicitly sends @p MSG_RESET as message.
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*
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* @param[in] sp pointer to a @p semaphore_t structure
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* @param[in] n the new value of the semaphore counter. The value must
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* be non-negative.
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*
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* @iclass
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*/
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static inline void chSemResetI(semaphore_t *sp, cnt_t n) {
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chSemResetWithMessageI(sp, n, MSG_RESET);
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}
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/**
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* @brief Decreases the semaphore counter.
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* @details This macro can be used when the counter is known to be positive.
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@ -107,20 +107,22 @@ void chSemObjectInit(semaphore_t *sp, cnt_t n) {
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* @post After invoking this function all the threads waiting on the
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* semaphore, if any, are released and the semaphore counter is set
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* to the specified, non negative, value.
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* @note The released threads can recognize they were waked up by a reset
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* rather than a signal because the @p chSemWait() will return
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* @p MSG_RESET instead of @p MSG_OK.
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* @post This function does not reschedule so a call to a rescheduling
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* function must be performed before unlocking the kernel. Note that
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* interrupt handlers always reschedule on exit so an explicit
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* reschedule must not be performed in ISRs.
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*
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* @param[in] sp pointer to a @p semaphore_t structure
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* @param[in] n the new value of the semaphore counter. The value must
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* be non-negative.
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* @param[in] msg message to be sent
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*
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* @api
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*/
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void chSemReset(semaphore_t *sp, cnt_t n) {
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void chSemResetWithMessage(semaphore_t *sp, cnt_t n, msg_t msg) {
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chSysLock();
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chSemResetI(sp, n);
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chSemResetWithMessageI(sp, n, msg);
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chSchRescheduleS();
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chSysUnlock();
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}
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@ -134,17 +136,15 @@ void chSemReset(semaphore_t *sp, cnt_t n) {
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* function must be performed before unlocking the kernel. Note that
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* interrupt handlers always reschedule on exit so an explicit
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* reschedule must not be performed in ISRs.
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* @note The released threads can recognize they were waked up by a reset
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* rather than a signal because the @p chSemWait() will return
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* @p MSG_RESET instead of @p MSG_OK.
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*
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* @param[in] sp pointer to a @p semaphore_t structure
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* @param[in] n the new value of the semaphore counter. The value must
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* be non-negative.
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* @param[in] msg message to be sent
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*
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* @iclass
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*/
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void chSemResetI(semaphore_t *sp, cnt_t n) {
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void chSemResetWithMessageI(semaphore_t *sp, cnt_t n, msg_t msg) {
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cnt_t cnt;
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chDbgCheckClassI();
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@ -156,7 +156,7 @@ void chSemResetI(semaphore_t *sp, cnt_t n) {
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cnt = sp->cnt;
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sp->cnt = n;
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while (++cnt <= (cnt_t)0) {
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chSchReadyI(queue_lifo_remove(&sp->queue))->u.rdymsg = MSG_RESET;
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chSchReadyI(queue_lifo_remove(&sp->queue))->u.rdymsg = msg;
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}
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}
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@ -74,9 +74,11 @@
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*****************************************************************************
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*** Next ***
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- NEW: Added canTryAbortX() function to CAN driver, implemented
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- NIL: New functions: chSemResetWithMessageI() and chSemResetWithMessage().
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- RT: New functions: chSemResetWithMessageI() and chSemResetWithMessage().
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- HAL: Added canTryAbortX() function to CAN driver, implemented
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for STM32 CANv1.
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- NEW: Added error handling to WSPI driver, now LLDs can report error
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- HAL: Added error handling to WSPI driver, now LLDs can report error
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conditions to upper layers.
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- NEW: Added mcuconf.h generator for STM32G4x4.
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- HAL: STM32 DMAv1 driver improvements and generalization, added support
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