Higher SPI speed.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15916 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2022-12-25 13:03:46 +00:00
parent f3fef1eb70
commit a48dab3767
2 changed files with 2 additions and 2 deletions

View File

@ -75,7 +75,7 @@
#define STM32_PLLQ_VALUE 8
#define STM32_PLLR_VALUE 2
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV4
#define STM32_PPRE1 STM32_PPRE1_DIV2
#define STM32_PPRE2 STM32_PPRE2_DIV1
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_MCOPRE STM32_MCOPRE_DIV1

View File

@ -51,7 +51,7 @@
/*===========================================================================*/
/* Making sure mcuconf.h setup is as expected.*/
#if STM32_PCLK1 != 85000000/2
#if STM32_PCLK1 != 85000000
#error "unexpected PCLK1 frequency"
#endif