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Fixed bug #1049. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13081 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2019-10-06 06:03:41 +00:00
parent 4c33071e12
commit a6b5e77f22
5 changed files with 50 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
os/hal/ports/STM32/STM32F4xx/hal_lld.h
View File

@ -183,11 +183,7 @@
#if (STM32_CK48MSEL == STM32_CK48MSEL_PLL) || defined(__DOXYGEN__)
#define STM32_PLL48CLK (STM32_PLLVCO / STM32_PLLQ_VALUE)
#elif STM32_CK48MSEL == STM32_CK48MSEL_PLLALT
#if STM32_RCC_CK48MSEL_USES_I2S
#define STM32_PLL48CLK STM32_PLLI2S_Q_CLKOUT
#else
#define STM32_PLL48CLK STM32_PLLSAI_Q_CLKOUT
#endif
#define STM32_PLL48CLK STM32_PLL48CLK_ALTSRC
#else
#error "invalid source selected for PLL48CLK clock"
#endif

29
os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h
View File

@ -1037,7 +1037,8 @@
#endif /* !defined(STM32F4XX) */
/**
* @name Maximum frequency thresholds and wait states for flash access.
* @name Maximum frequency thresholds, wait states and
* parallelism for flash access.
* @{
*/
#if defined(STM32F429_439xx) || defined(STM32F427_437xx) || \
@ -1053,6 +1054,7 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 2
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
#define STM32_0WS_THRESHOLD 24000000
#define STM32_1WS_THRESHOLD 48000000
@ -1063,6 +1065,7 @@
#define STM32_6WS_THRESHOLD 168000000
#define STM32_7WS_THRESHOLD 180000000
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
#define STM32_0WS_THRESHOLD 22000000
#define STM32_1WS_THRESHOLD 44000000
@ -1073,6 +1076,7 @@
#define STM32_6WS_THRESHOLD 154000000
#define STM32_7WS_THRESHOLD 176000000
#define STM32_8WS_THRESHOLD 180000000
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 180) && (STM32_VDD < 210)
#define STM32_0WS_THRESHOLD 20000000
#define STM32_1WS_THRESHOLD 40000000
@ -1083,6 +1087,7 @@
#define STM32_6WS_THRESHOLD 140000000
#define STM32_7WS_THRESHOLD 168000000
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 0
#else
#error "invalid VDD voltage specified"
#endif
@ -1098,6 +1103,7 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 2
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
#define STM32_0WS_THRESHOLD 24000000
#define STM32_1WS_THRESHOLD 48000000
@ -1108,6 +1114,7 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
#define STM32_0WS_THRESHOLD 18000000
#define STM32_1WS_THRESHOLD 36000000
@ -1118,6 +1125,7 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 170) && (STM32_VDD < 210)
#define STM32_0WS_THRESHOLD 16000000
#define STM32_1WS_THRESHOLD 32000000
@ -1128,6 +1136,7 @@
#define STM32_6WS_THRESHOLD 100000000
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 0
#else
#error "invalid VDD voltage specified"
#endif
@ -1143,6 +1152,7 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 2
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
#define STM32_0WS_THRESHOLD 24000000
#define STM32_1WS_THRESHOLD 48000000
@ -1153,6 +1163,7 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
#define STM32_0WS_THRESHOLD 18000000
#define STM32_1WS_THRESHOLD 36000000
@ -1163,6 +1174,7 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 171) && (STM32_VDD < 210)
#define STM32_0WS_THRESHOLD 16000000
#define STM32_1WS_THRESHOLD 32000000
@ -1173,6 +1185,8 @@
#define STM32_6WS_THRESHOLD 100000000
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 0
#else
#error "invalid VDD voltage specified"
#endif
@ -1188,6 +1202,8 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 2
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
#define STM32_0WS_THRESHOLD 24000000
#define STM32_1WS_THRESHOLD 48000000
@ -1198,6 +1214,8 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
#define STM32_0WS_THRESHOLD 18000000
#define STM32_1WS_THRESHOLD 36000000
@ -1208,6 +1226,8 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 180) && (STM32_VDD < 210)
#define STM32_0WS_THRESHOLD 16000000
#define STM32_1WS_THRESHOLD 32000000
@ -1218,6 +1238,8 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 0
#else
#error "invalid VDD voltage specified"
#endif
@ -1232,6 +1254,7 @@
#define STM32_5WS_THRESHOLD 0
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 2
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
#define STM32_0WS_THRESHOLD 24000000
#define STM32_1WS_THRESHOLD 48000000
@ -1241,6 +1264,7 @@
#define STM32_5WS_THRESHOLD 0
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
#define STM32_0WS_THRESHOLD 18000000
#define STM32_1WS_THRESHOLD 36000000
@ -1250,6 +1274,7 @@
#define STM32_5WS_THRESHOLD 108000000
#define STM32_6WS_THRESHOLD 120000000
#define STM32_7WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 180) && (STM32_VDD < 210)
#define STM32_0WS_THRESHOLD 16000000
#define STM32_1WS_THRESHOLD 32000000
@ -1259,6 +1284,8 @@
#define STM32_5WS_THRESHOLD 96000000
#define STM32_6WS_THRESHOLD 112000000
#define STM32_7WS_THRESHOLD 120000000
#define STM32_FLASH_PSIZE 0
#else
#error "invalid VDD voltage specified"
#endif

14
os/hal/ports/STM32/STM32F4xx/hal_lld_type2.h
View File

@ -652,7 +652,8 @@
#endif
/**
* @name Maximum frequency thresholds and wait states for flash access.
* @name Maximum frequency thresholds, wait states and
* parallelism for flash access.
* @{
*/
#if defined(STM32F413xx)
@ -666,6 +667,7 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 2
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
#define STM32_0WS_THRESHOLD 20000000
#define STM32_1WS_THRESHOLD 40000000
@ -676,6 +678,7 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
#define STM32_0WS_THRESHOLD 18000000
#define STM32_1WS_THRESHOLD 36000000
@ -686,6 +689,7 @@
#define STM32_6WS_THRESHOLD 0
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 1
#elif (STM32_VDD >= 170) && (STM32_VDD < 210)
#define STM32_0WS_THRESHOLD 16000000
#define STM32_1WS_THRESHOLD 32000000
@ -696,9 +700,11 @@
#define STM32_6WS_THRESHOLD 100000000
#define STM32_7WS_THRESHOLD 0
#define STM32_8WS_THRESHOLD 0
#define STM32_FLASH_PSIZE 0
#else
#error "invalid VDD voltage specified"
#endif
#define FLASH_SR_OPERR FLASH_SR_SOP
#endif /* defined(STM32F413xx) */
/** @} */
@ -1168,6 +1174,12 @@
*/
#define STM32_PLLI2S_R_CLKOUT (STM32_PLLI2SVCO / STM32_PLLI2SR_VALUE)
/**
* @brief PLLI2SP enable bit.
* @note Always 0, there is no PLLI2SP.
*/
#define STM32_PLLI2SP 0
/**
* @brief PLLSAI activation flag.
* @note Always FALSE, there is no PLLSAI.

12
os/hal/ports/STM32/STM32F4xx/stm32_registry.h
View File

@ -131,6 +131,7 @@
#define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL TRUE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
#define STM32_PLL48CLK_ALTSRC STM32_PLLSAI_Q_CLKOUT
#define STM32_TIMPRE_PRESCALE4 TRUE
/* ADC attributes.*/
@ -509,6 +510,7 @@
#define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL TRUE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
#define STM32_PLL48CLK_ALTSRC STM32_PLLSAI_P_CLKOUT
#define STM32_TIMPRE_PRESCALE4 TRUE
/* ADC attributes.*/
@ -856,8 +858,6 @@
#define STM32_HAS_RCC_PLLI2S TRUE
#define STM32_HAS_RCC_DCKCFGR TRUE
#define STM32_HAS_RCC_DCKCFGR2 FALSE
#define STM32_HAS_RCC_CK48MSEL_I2S FALSE
#define STM32_HAS_RCC_CK48MSEL_SAI FALSE
#define STM32_HAS_RCC_I2SSRC TRUE
#define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL FALSE
@ -1234,6 +1234,7 @@
#define STM32_HAS_RCC_I2SPLLSRC TRUE
#define STM32_HAS_RCC_CK48MSEL TRUE
#define STM32_RCC_CK48MSEL_USES_I2S TRUE
#define STM32_PLL48CLK_ALTSRC STM32_PLLI2S_Q_CLKOUT
#define STM32_TIMPRE_PRESCALE4 FALSE
/* ADC attributes.*/
@ -1618,6 +1619,7 @@
#define STM32_HAS_RCC_I2SPLLSRC TRUE
#define STM32_HAS_RCC_CK48MSEL TRUE
#define STM32_RCC_CK48MSEL_USES_I2S TRUE
#define STM32_PLL48CLK_ALTSRC STM32_PLLI2S_Q_CLKOUT
#define STM32_TIMPRE_PRESCALE4 FALSE
/* ADC attributes.*/
@ -1949,6 +1951,7 @@
#define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL FALSE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
#define STM32_PLL48CLK_ALTSRC STM32_PLLSAI_Q_CLKOUT
#define STM32_TIMPRE_PRESCALE4 FALSE
/* ADC attributes.*/
@ -2248,12 +2251,11 @@
#define STM32_HAS_RCC_PLLI2S FALSE
#define STM32_HAS_RCC_DCKCFGR TRUE
#define STM32_HAS_RCC_DCKCFGR2 TRUE
#define STM32_HAS_RCC_CK48MSEL_I2S FALSE
#define STM32_HAS_RCC_CK48MSEL_SAI FALSE
#define STM32_HAS_RCC_I2SSRC FALSE
#define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL FALSE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
#define STM32_PLL48CLK_ALTSRC STM32_PLLSAI_Q_CLKOUT
#define STM32_TIMPRE_PRESCALE4 FALSE
/* ADC attributes.*/
@ -2523,8 +2525,6 @@
#define STM32_HAS_RCC_PLLI2S TRUE
#define STM32_HAS_RCC_DCKCFGR FALSE
#define STM32_HAS_RCC_DCKCFGR2 FALSE
#define STM32_HAS_RCC_CK48MSEL_I2S FALSE
#define STM32_HAS_RCC_CK48MSEL_SAI FALSE
#define STM32_HAS_RCC_I2SSRC TRUE
#define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL FALSE

2
readme.txt
View File

@ -130,6 +130,8 @@
- HAL: Added a new interface for range-finder devices (used by EX).
- HAL: Added mcuconf.h updater tool for STM32F407 (backported to 19.1.1).
- NIL: Integrated NIL 4.0.
- FIX: Fixed clock tree differences in STM32F4 family (bug #1049)
(backported to 19.1.4)(backported to 18.2.3).
- FIX: Fixed wrong debug check in STM32 I2Cv1 driver (bug #1048)
(backported to 19.1.4)(backported to 18.2.3).
- FIX: Fixed warning in simulator PAL driver (bug #1047)