Power saving mode for SDMMCv1 driver.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10176 35acf78f-673a-0410-8e92-d51de3d6d3f4

os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c

@@ -543,14 +543,29 @@ void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) {
 #if 0
   if (SDC_CLK_50MHz == clk) {
     sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) |
+#if STM32_SDC_SDMMC_PWRSAV
+                         SDMMC_CLKDIV_HS | SDMMC_CLKCR_BYPASS |
+                         SDMMC_CLKCR_PWRSAV;
+#else
                          SDMMC_CLKDIV_HS | SDMMC_CLKCR_BYPASS;
+#endif
   }
-  else
+  else {
+#if STM32_SDC_SDMMC_PWRSAV
+    sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) | SDMMC_CLKDIV_HS |
+                         SDMMC_CLKCR_PWRSAV;
+#else
     sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) | SDMMC_CLKDIV_HS;
+#endif
+  }
 #else
   (void)clk;
 
-  sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) | SDMMC_CLKDIV_HS;
+#if STM32_SDC_SDMMC_PWRSAV
+#else
+  sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) | SDMMC_CLKDIV_HS |
+                       SDMMC_CLKCR_PWRSAV;
+#endif
 #endif
 }
 

os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.h

@@ -84,6 +84,12 @@
  */
 #if !defined(STM32_SDC_SDMMC_CLOCK_DELAY) || defined(__DOXYGEN__)
 #define STM32_SDC_SDMMC_CLOCK_DELAY         10
+
+/**
+ * @brief   Card clock power saving enable.
+ */
+#if !defined(STM32_SDC_SDMMC_PWRSAV) || defined(__DOXYGEN__)
+#define STM32_SDC_SDMMC_PWRSAV              TRUE
 #endif
 
 /**

readme.txt

@@ -88,6 +88,7 @@
 *****************************************************************************
 
 *** Next ***
+- HAL: Added clock power saving switch to STM32 SDMMCv1 driver, default is on.
 - RT:  Added safe versions of the time conversion functions, the new versions
        are prefixed with LL_ and use an internal 64 bits representation and
        assertions for overflow conditions.