mirror of https://github.com/rusefi/ChibiOS.git
Fixed unaligned mcuconf.h file.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12136 110e8d01-0319-4d1e-a829-52ad28d1bb01
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@ -32,6 +32,7 @@
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*/
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#define STM32H7xx_MCUCONF
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#define STM32H743_MCUCONF
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/*
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* General settings.
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@ -51,12 +52,9 @@
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* Register constants are taken from the ST header.
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*/
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#define STM32_VOS STM32_VOS_SCALE1
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#define STM32_PWR_CR1 (PWR_CR1_SVOS_1 | \
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PWR_CR1_SVOS_0)
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#define STM32_PWR_CR1 (PWR_CR1_SVOS_1 | PWR_CR1_SVOS_0)
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#define STM32_PWR_CR2 (PWR_CR2_BREN)
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#define STM32_PWR_CR3 (PWR_CR3_LDOEN | \
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PWR_CR3_USBREGEN | \
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PWR_CR3_USB33DEN)
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#define STM32_PWR_CR3 (PWR_CR3_LDOEN | PWR_CR3_USBREGEN | PWR_CR3_USB33DEN)
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#define STM32_PWR_CPUCR 0
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/*
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@ -94,7 +92,7 @@
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#define STM32_PLL2_DIVM_VALUE 4
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#define STM32_PLL2_DIVN_VALUE 400
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#define STM32_PLL2_FRACN_VALUE 0
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#define STM32_PLL2_DIVP_VALUE 2
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#define STM32_PLL2_DIVP_VALUE 8
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#define STM32_PLL2_DIVQ_VALUE 8
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#define STM32_PLL2_DIVR_VALUE 8
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#define STM32_PLL3_ENABLED TRUE
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@ -104,7 +102,7 @@
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#define STM32_PLL3_DIVM_VALUE 4
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#define STM32_PLL3_DIVN_VALUE 400
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#define STM32_PLL3_FRACN_VALUE 0
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#define STM32_PLL3_DIVP_VALUE 2
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#define STM32_PLL3_DIVP_VALUE 8
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#define STM32_PLL3_DIVQ_VALUE 8
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#define STM32_PLL3_DIVR_VALUE 8
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@ -115,11 +113,11 @@
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#define STM32_SW STM32_SW_PLL1_P_CK
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#define STM32_RTCSEL STM32_RTCSEL_LSE_CK
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#define STM32_D1CPRE STM32_D1CPRE_DIV1
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#define STM32_D1HPRE STM32_D1HPRE_DIV2
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#define STM32_D1PPRE3 STM32_D1PPRE3_DIV2
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#define STM32_D2PPRE1 STM32_D2PPRE1_DIV2
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#define STM32_D2PPRE2 STM32_D2PPRE2_DIV2
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#define STM32_D3PPRE4 STM32_D3PPRE4_DIV2
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#define STM32_D1HPRE STM32_D1HPRE_DIV4
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#define STM32_D1PPRE3 STM32_D1PPRE3_DIV1
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#define STM32_D2PPRE1 STM32_D2PPRE1_DIV1
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#define STM32_D2PPRE2 STM32_D2PPRE2_DIV1
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#define STM32_D3PPRE4 STM32_D3PPRE4_DIV1
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/*
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* Peripherals clocks static settings.
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@ -183,20 +181,18 @@
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/*
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* ADC driver system settings.
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*/
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#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
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#define STM32_ADC_USE_ADC1 FALSE
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#define STM32_ADC_USE_ADC2 FALSE
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#define STM32_ADC_DUAL_MODE FALSE
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#define STM32_ADC_COMPACT_SAMPLES FALSE
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#define STM32_ADC_USE_ADC12 TRUE
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#define STM32_ADC_USE_ADC3 FALSE
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#define STM32_ADC_ADC1_DMA_CHANNEL 0
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#define STM32_ADC_ADC2_DMA_CHANNEL 1
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#define STM32_ADC_ADC3_DMA_CHANNEL 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC2_DMA_PRIORITY 2
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#define STM32_ADC_ADC12_DMA_CHANNEL 0
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#define STM32_ADC_ADC3_DMA_CHANNEL 1
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#define STM32_ADC_ADC12_DMA_PRIORITY 2
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#define STM32_ADC_ADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 6
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#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
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#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
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#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6
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#define STM32_ADC_ADC12_IRQ_PRIORITY 5
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#define STM32_ADC_ADC3_IRQ_PRIORITY 5
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#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV4
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#define STM32_ADC_ADC3_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV4
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/*
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* CAN driver system settings.
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@ -364,12 +360,6 @@
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#define STM32_SPI_USE_SPI4 TRUE
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#define STM32_SPI_USE_SPI5 TRUE
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#define STM32_SPI_USE_SPI6 TRUE
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#define STM32_SPI_SPI1_IRQ_PRIORITY 10
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#define STM32_SPI_SPI2_IRQ_PRIORITY 10
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#define STM32_SPI_SPI3_IRQ_PRIORITY 10
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#define STM32_SPI_SPI4_IRQ_PRIORITY 10
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#define STM32_SPI_SPI5_IRQ_PRIORITY 10
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#define STM32_SPI_SPI6_IRQ_PRIORITY 10
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#define STM32_SPI_SPI1_RX_DMA_CHANNEL 10
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#define STM32_SPI_SPI1_TX_DMA_CHANNEL 11
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#define STM32_SPI_SPI2_RX_DMA_CHANNEL 12
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@ -388,6 +378,12 @@
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#define STM32_SPI_SPI4_DMA_PRIORITY 1
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#define STM32_SPI_SPI5_DMA_PRIORITY 1
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#define STM32_SPI_SPI6_DMA_PRIORITY 1
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#define STM32_SPI_SPI1_IRQ_PRIORITY 10
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#define STM32_SPI_SPI2_IRQ_PRIORITY 10
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#define STM32_SPI_SPI3_IRQ_PRIORITY 10
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#define STM32_SPI_SPI4_IRQ_PRIORITY 10
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#define STM32_SPI_SPI5_IRQ_PRIORITY 10
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#define STM32_SPI_SPI6_IRQ_PRIORITY 10
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#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
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/*
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@ -448,9 +444,7 @@
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#define STM32_USB_OTG2_IRQ_PRIORITY 14
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#define STM32_USB_OTG1_RX_FIFO_SIZE 512
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#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
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#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
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#define STM32_USB_OTG_THREAD_STACK_SIZE 128
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#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
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#define STM32_USB_HOST_WAKEUP_DURATION 2
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/*
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* WDG driver system settings.
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