mirror of https://github.com/rusefi/ChibiOS.git
Experimental FPU support for ARMv8-M.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13503 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -66,7 +66,7 @@ endif
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# Enables the use of FPU (no, softfp, hard).
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ifeq ($(USE_FPU),)
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USE_FPU = no
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USE_FPU = hard
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endif
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# FPU-related options.
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@ -66,7 +66,7 @@ endif
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# Enables the use of FPU (no, softfp, hard).
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ifeq ($(USE_FPU),)
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USE_FPU = no
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USE_FPU = hard
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endif
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# FPU-related options.
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File diff suppressed because one or more lines are too long
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@ -263,6 +263,26 @@ struct port_intctx {
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uint32_t lr_thd;
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uint32_t pc;
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uint32_t xpsr;
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#if (CORTEX_USE_FPU == TRUE) || defined(__DOXYGEN__)
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uint32_t s0;
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uint32_t s1;
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uint32_t s2;
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uint32_t s3;
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uint32_t s4;
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uint32_t s5;
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uint32_t s6;
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uint32_t s7;
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uint32_t s8;
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uint32_t s9;
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uint32_t s10;
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uint32_t s11;
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uint32_t s12;
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uint32_t s13;
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uint32_t s14;
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uint32_t s15;
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uint32_t fpscr;
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uint32_t reserved;
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#endif /* CORTEX_USE_FPU == TRUE */
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};
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/**
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@ -286,6 +306,24 @@ struct port_context {
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uint32_t splim;
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#endif
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uint32_t lr_exc;
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#if (CORTEX_USE_FPU == TRUE) || defined(__DOXYGEN__)
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uint32_t s16;
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uint32_t s17;
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uint32_t s18;
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uint32_t s19;
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uint32_t s20;
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uint32_t s21;
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uint32_t s22;
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uint32_t s23;
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uint32_t s24;
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uint32_t s25;
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uint32_t s26;
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uint32_t s27;
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uint32_t s28;
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uint32_t s29;
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uint32_t s30;
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uint32_t s31;
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#endif /* CORTEX_USE_FPU == TRUE */
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};
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#endif /* !defined(_FROM_ASM_) */
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@ -91,21 +91,27 @@ SVC_Handler:
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// movs r3, #(2 << 5)
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#if CH_DBG_ENABLE_STACK_CHECK
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mrs r12, PSPLIM
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stmia r1, {r2-r12,lr}
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stmia r1!, {r2-r12,lr}
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#else
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stmia r1, {r2-r11,lr}
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stmia r1!, {r2-r11,lr}
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#endif
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#if CORTEX_USE_FPU
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vstmia r1, {s16-s31}
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#endif
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/* Restoring calle context of thread being swapped in.*/
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adds r0, #CONTEXT_OFFSET
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#if CH_DBG_ENABLE_STACK_CHECK
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ldmia r0, {r2-r12, lr}
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ldmia r0!, {r2-r12, lr}
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msr PSPLIM, r12
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#else
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ldmia r0, {r2-r11, lr}
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ldmia r0!, {r2-r11, lr}
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#endif
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msr BASEPRI, r3
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msr PSP, r2
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#if CORTEX_USE_FPU
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vldmia r0, {s16-s31}
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#endif
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bx lr
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/*--------------------------------------------------------------------------*
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@ -124,9 +130,12 @@ PendSV_Handler:
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mrs r3, BASEPRI
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#if CH_DBG_ENABLE_STACK_CHECK
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mrs r12, PSPLIM
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stmia r1, {r2-r12,lr}
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stmia r1!, {r2-r12,lr}
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#else
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stmia r1, {r2-r11,lr}
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stmia r1!, {r2-r11,lr}
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#endif
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#if CORTEX_USE_FPU
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vstmia r1, {s16-s31}
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#endif
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/* Selecting the thread to be swapped in.*/
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@ -135,13 +144,16 @@ PendSV_Handler:
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/* Restoring calle context of thread being swapped in.*/
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adds r0, #CONTEXT_OFFSET
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#if CH_DBG_ENABLE_STACK_CHECK
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ldmia r0, {r2-r12, lr}
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ldmia r0!, {r2-r12, lr}
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msr PSPLIM, r12
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#else
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ldmia r0, {r2-r11, lr}
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ldmia r0!, {r2-r11, lr}
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#endif
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msr BASEPRI, r3
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msr PSP, r2
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#if CORTEX_USE_FPU
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vldmia r0, {s16-s31}
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#endif
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bx lr
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/*--------------------------------------------------------------------------*
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