mirror of https://github.com/rusefi/ChibiOS.git
Updater tool for STM32F401.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13842 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio
parent
b18ce2f1ca
commit
b1069891d2
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@ -74,6 +74,7 @@
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*****************************************************************************
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*** Next ***
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- NEW: Added mcuconf.h updater for STM32F401.
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- NEW: SIO STM32 implementation for USARTs without FIFO in STM32/LLD/USARTv2,
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implementation with FIFO in STM32/LLD/USARTv3.
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- NEW: Updated SIO driver model to support more use cases.
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@ -0,0 +1,256 @@
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[#ftl]
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[#--
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
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This file is part of ChibiOS.
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ChibiOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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--]
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[@pp.dropOutputFile /]
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[#import "/@lib/libutils.ftl" as utils /]
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[#import "/@lib/liblicense.ftl" as license /]
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[@pp.changeOutputFile name="mcuconf.h" /]
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/*
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[@license.EmitLicenseAsText /]
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*/
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#ifndef MCUCONF_H
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#define MCUCONF_H
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/*
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* STM32F4xx drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the whole
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* driver is enabled in halconf.h.
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*
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* IRQ priorities:
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* 15...0 Lowest...Highest.
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*
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* DMA priorities:
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* 0...3 Lowest...Highest.
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*/
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#define STM32F4xx_MCUCONF
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#define STM32F401_MCUCONF
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/*
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* HAL driver system settings.
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*/
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#define STM32_NO_INIT ${doc.STM32_NO_INIT!"FALSE"}
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#define STM32_PVD_ENABLE ${doc.STM32_PVD_ENABLE!"FALSE"}
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#define STM32_PLS ${doc.STM32_PLS!"STM32_PLS_LEV0"}
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#define STM32_BKPRAM_ENABLE ${doc.STM32_BKPRAM_ENABLE!"FALSE"}
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#define STM32_HSI_ENABLED ${doc.STM32_HSI_ENABLED!"TRUE"}
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#define STM32_LSI_ENABLED ${doc.STM32_LSI_ENABLED!"TRUE"}
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#define STM32_HSE_ENABLED ${doc.STM32_HSE_ENABLED!"TRUE"}
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#define STM32_LSE_ENABLED ${doc.STM32_LSE_ENABLED!"FALSE"}
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#define STM32_CLOCK48_REQUIRED ${doc.STM32_CLOCK48_REQUIRED!"TRUE"}
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#define STM32_SW ${doc.STM32_SW!"STM32_SW_PLL"}
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#define STM32_PLLSRC ${doc.STM32_PLLSRC!"STM32_PLLSRC_HSE"}
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#define STM32_PLLM_VALUE ${doc.STM32_PLLM_VALUE!"8"}
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#define STM32_PLLN_VALUE ${doc.STM32_PLLN_VALUE!"336"}
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#define STM32_PLLP_VALUE ${doc.STM32_PLLP_VALUE!"2"}
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#define STM32_PLLQ_VALUE ${doc.STM32_PLLQ_VALUE!"7"}
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#define STM32_HPRE ${doc.STM32_HPRE!"STM32_HPRE_DIV1"}
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#define STM32_PPRE1 ${doc.STM32_PPRE1!"STM32_PPRE1_DIV4"}
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#define STM32_PPRE2 ${doc.STM32_PPRE2!"STM32_PPRE2_DIV2"}
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#define STM32_RTCSEL ${doc.STM32_RTCSEL!"STM32_RTCSEL_LSI"}
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#define STM32_RTCPRE_VALUE ${doc.STM32_RTCPRE_VALUE!"8"}
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#define STM32_MCO1SEL ${doc.STM32_MCO1SEL!"STM32_MCO1SEL_HSI"}
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#define STM32_MCO1PRE ${doc.STM32_MCO1PRE!"STM32_MCO1PRE_DIV1"}
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#define STM32_MCO2SEL ${doc.STM32_MCO2SEL!"STM32_MCO2SEL_SYSCLK"}
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#define STM32_MCO2PRE ${doc.STM32_MCO2PRE!"STM32_MCO2PRE_DIV5"}
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#define STM32_I2SSRC ${doc.STM32_I2SSRC!"STM32_I2SSRC_CKIN"}
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#define STM32_PLLI2SN_VALUE ${doc.STM32_PLLI2SN_VALUE!"192"}
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#define STM32_PLLI2SR_VALUE ${doc.STM32_PLLI2SR_VALUE!"4"}
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/*
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* IRQ system settings.
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*/
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#define STM32_IRQ_EXTI0_PRIORITY ${doc.STM32_IRQ_EXTI0_PRIORITY!"6"}
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#define STM32_IRQ_EXTI1_PRIORITY ${doc.STM32_IRQ_EXTI1_PRIORITY!"6"}
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#define STM32_IRQ_EXTI2_PRIORITY ${doc.STM32_IRQ_EXTI2_PRIORITY!"6"}
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#define STM32_IRQ_EXTI3_PRIORITY ${doc.STM32_IRQ_EXTI3_PRIORITY!"6"}
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#define STM32_IRQ_EXTI4_PRIORITY ${doc.STM32_IRQ_EXTI4_PRIORITY!"6"}
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#define STM32_IRQ_EXTI5_9_PRIORITY ${doc.STM32_IRQ_EXTI5_9_PRIORITY!"6"}
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#define STM32_IRQ_EXTI10_15_PRIORITY ${doc.STM32_IRQ_EXTI10_15_PRIORITY!"6"}
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#define STM32_IRQ_EXTI16_PRIORITY ${doc.STM32_IRQ_EXTI16_PRIORITY!"6"}
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#define STM32_IRQ_EXTI17_PRIORITY ${doc.STM32_IRQ_EXTI17_PRIORITY!"15"}
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#define STM32_IRQ_EXTI18_PRIORITY ${doc.STM32_IRQ_EXTI18_PRIORITY!"6"}
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#define STM32_IRQ_EXTI19_PRIORITY ${doc.STM32_IRQ_EXTI19_PRIORITY!"6"}
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#define STM32_IRQ_EXTI20_PRIORITY ${doc.STM32_IRQ_EXTI20_PRIORITY!"6"}
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#define STM32_IRQ_EXTI21_PRIORITY ${doc.STM32_IRQ_EXTI21_PRIORITY!"15"}
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#define STM32_IRQ_EXTI22_PRIORITY ${doc.STM32_IRQ_EXTI22_PRIORITY!"15"}
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#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY ${doc.STM32_IRQ_TIM1_BRK_TIM9_PRIORITY!"7"}
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#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY ${doc.STM32_IRQ_TIM1_UP_TIM10_PRIORITY!"7"}
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#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY ${doc.STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY!"7"}
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#define STM32_IRQ_TIM1_CC_PRIORITY ${doc.STM32_IRQ_TIM1_CC_PRIORITY!"7"}
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#define STM32_IRQ_TIM2_PRIORITY ${doc.STM32_IRQ_TIM2_PRIORITY!"7"}
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#define STM32_IRQ_TIM3_PRIORITY ${doc.STM32_IRQ_TIM3_PRIORITY!"7"}
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#define STM32_IRQ_TIM4_PRIORITY ${doc.STM32_IRQ_TIM4_PRIORITY!"7"}
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#define STM32_IRQ_TIM5_PRIORITY ${doc.STM32_IRQ_TIM5_PRIORITY!"7"}
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#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
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#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
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#define STM32_IRQ_USART6_PRIORITY ${doc.STM32_IRQ_USART6_PRIORITY!"12"}
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/*
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* ADC driver system settings.
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*/
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#define STM32_ADC_ADCPRE ${doc.STM32_ADC_ADCPRE!"ADC_CCR_ADCPRE_DIV4"}
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#define STM32_ADC_USE_ADC1 ${doc.STM32_ADC_USE_ADC1!"FALSE"}
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#define STM32_ADC_ADC1_DMA_STREAM ${doc.STM32_ADC_ADC1_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 4)"}
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#define STM32_ADC_ADC1_DMA_PRIORITY ${doc.STM32_ADC_ADC1_DMA_PRIORITY!"2"}
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#define STM32_ADC_IRQ_PRIORITY ${doc.STM32_ADC_IRQ_PRIORITY!"6"}
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#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"6"}
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/*
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* GPT driver system settings.
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*/
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#define STM32_GPT_USE_TIM1 ${doc.STM32_GPT_USE_TIM1!"FALSE"}
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#define STM32_GPT_USE_TIM2 ${doc.STM32_GPT_USE_TIM2!"FALSE"}
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#define STM32_GPT_USE_TIM3 ${doc.STM32_GPT_USE_TIM3!"FALSE"}
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#define STM32_GPT_USE_TIM4 ${doc.STM32_GPT_USE_TIM4!"FALSE"}
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#define STM32_GPT_USE_TIM5 ${doc.STM32_GPT_USE_TIM5!"FALSE"}
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#define STM32_GPT_USE_TIM9 ${doc.STM32_GPT_USE_TIM9!"FALSE"}
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#define STM32_GPT_USE_TIM10 ${doc.STM32_GPT_USE_TIM10!"FALSE"}
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#define STM32_GPT_USE_TIM11 ${doc.STM32_GPT_USE_TIM11!"FALSE"}
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/*
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* I2C driver system settings.
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*/
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#define STM32_I2C_USE_I2C1 ${doc.STM32_I2C_USE_I2C1!"FALSE"}
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#define STM32_I2C_USE_I2C2 ${doc.STM32_I2C_USE_I2C2!"FALSE"}
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#define STM32_I2C_USE_I2C3 ${doc.STM32_I2C_USE_I2C3!"FALSE"}
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#define STM32_I2C_BUSY_TIMEOUT ${doc.STM32_I2C_BUSY_TIMEOUT!"50"}
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#define STM32_I2C_I2C1_RX_DMA_STREAM ${doc.STM32_I2C_I2C1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 0)"}
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#define STM32_I2C_I2C1_TX_DMA_STREAM ${doc.STM32_I2C_I2C1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 6)"}
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#define STM32_I2C_I2C2_RX_DMA_STREAM ${doc.STM32_I2C_I2C2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 2)"}
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#define STM32_I2C_I2C2_TX_DMA_STREAM ${doc.STM32_I2C_I2C2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 7)"}
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#define STM32_I2C_I2C3_RX_DMA_STREAM ${doc.STM32_I2C_I2C3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 2)"}
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#define STM32_I2C_I2C3_TX_DMA_STREAM ${doc.STM32_I2C_I2C3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"}
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#define STM32_I2C_I2C1_IRQ_PRIORITY ${doc.STM32_I2C_I2C1_IRQ_PRIORITY!"5"}
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#define STM32_I2C_I2C2_IRQ_PRIORITY ${doc.STM32_I2C_I2C2_IRQ_PRIORITY!"5"}
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#define STM32_I2C_I2C3_IRQ_PRIORITY ${doc.STM32_I2C_I2C3_IRQ_PRIORITY!"5"}
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#define STM32_I2C_I2C1_DMA_PRIORITY ${doc.STM32_I2C_I2C1_DMA_PRIORITY!"3"}
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#define STM32_I2C_I2C2_DMA_PRIORITY ${doc.STM32_I2C_I2C2_DMA_PRIORITY!"3"}
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#define STM32_I2C_I2C3_DMA_PRIORITY ${doc.STM32_I2C_I2C3_DMA_PRIORITY!"3"}
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#define STM32_I2C_DMA_ERROR_HOOK(i2cp) ${doc.STM32_I2C_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
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/*
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* I2S driver system settings.
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*/
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#define STM32_I2S_USE_SPI2 ${doc.STM32_I2S_USE_SPI2!"FALSE"}
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#define STM32_I2S_USE_SPI3 ${doc.STM32_I2S_USE_SPI3!"FALSE"}
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#define STM32_I2S_SPI2_IRQ_PRIORITY ${doc.STM32_I2S_SPI2_IRQ_PRIORITY!"10"}
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#define STM32_I2S_SPI3_IRQ_PRIORITY ${doc.STM32_I2S_SPI3_IRQ_PRIORITY!"10"}
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#define STM32_I2S_SPI2_DMA_PRIORITY ${doc.STM32_I2S_SPI2_DMA_PRIORITY!"1"}
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#define STM32_I2S_SPI3_DMA_PRIORITY ${doc.STM32_I2S_SPI3_DMA_PRIORITY!"1"}
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#define STM32_I2S_SPI2_RX_DMA_STREAM ${doc.STM32_I2S_SPI2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 3)"}
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#define STM32_I2S_SPI2_TX_DMA_STREAM ${doc.STM32_I2S_SPI2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"}
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#define STM32_I2S_SPI3_RX_DMA_STREAM ${doc.STM32_I2S_SPI3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 0)"}
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#define STM32_I2S_SPI3_TX_DMA_STREAM ${doc.STM32_I2S_SPI3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 7)"}
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#define STM32_I2S_DMA_ERROR_HOOK(i2sp) ${doc.STM32_I2S_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
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/*
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* ICU driver system settings.
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*/
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#define STM32_ICU_USE_TIM1 ${doc.STM32_ICU_USE_TIM1!"FALSE"}
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#define STM32_ICU_USE_TIM2 ${doc.STM32_ICU_USE_TIM2!"FALSE"}
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#define STM32_ICU_USE_TIM3 ${doc.STM32_ICU_USE_TIM3!"FALSE"}
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#define STM32_ICU_USE_TIM4 ${doc.STM32_ICU_USE_TIM4!"FALSE"}
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#define STM32_ICU_USE_TIM5 ${doc.STM32_ICU_USE_TIM5!"FALSE"}
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#define STM32_ICU_USE_TIM9 ${doc.STM32_ICU_USE_TIM9!"FALSE"}
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#define STM32_ICU_USE_TIM10 ${doc.STM32_ICU_USE_TIM10!"FALSE"}
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#define STM32_ICU_USE_TIM11 ${doc.STM32_ICU_USE_TIM11!"FALSE"}
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/*
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* PWM driver system settings.
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*/
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#define STM32_PWM_USE_ADVANCED ${doc.STM32_PWM_USE_ADVANCED!"FALSE"}
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#define STM32_PWM_USE_TIM1 ${doc.STM32_PWM_USE_TIM1!"FALSE"}
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#define STM32_PWM_USE_TIM2 ${doc.STM32_PWM_USE_TIM2!"FALSE"}
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#define STM32_PWM_USE_TIM3 ${doc.STM32_PWM_USE_TIM3!"FALSE"}
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#define STM32_PWM_USE_TIM4 ${doc.STM32_PWM_USE_TIM4!"FALSE"}
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#define STM32_PWM_USE_TIM5 ${doc.STM32_PWM_USE_TIM5!"FALSE"}
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#define STM32_PWM_USE_TIM9 ${doc.STM32_PWM_USE_TIM9!"FALSE"}
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#define STM32_PWM_USE_TIM10 ${doc.STM32_PWM_USE_TIM10!"FALSE"}
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#define STM32_PWM_USE_TIM11 ${doc.STM32_PWM_USE_TIM11!"FALSE"}
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/*
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* SERIAL driver system settings.
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*/
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#define STM32_SERIAL_USE_USART1 ${doc.STM32_SERIAL_USE_USART1!"FALSE"}
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#define STM32_SERIAL_USE_USART2 ${doc.STM32_SERIAL_USE_USART2!"FALSE"}
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#define STM32_SERIAL_USE_USART6 ${doc.STM32_SERIAL_USE_USART6!"FALSE"}
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/*
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* SPI driver system settings.
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*/
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#define STM32_SPI_USE_SPI1 ${doc.STM32_SPI_USE_SPI1!"FALSE"}
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#define STM32_SPI_USE_SPI2 ${doc.STM32_SPI_USE_SPI2!"FALSE"}
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#define STM32_SPI_USE_SPI3 ${doc.STM32_SPI_USE_SPI3!"FALSE"}
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#define STM32_SPI_SPI1_RX_DMA_STREAM ${doc.STM32_SPI_SPI1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 0)"}
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#define STM32_SPI_SPI1_TX_DMA_STREAM ${doc.STM32_SPI_SPI1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 3)"}
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#define STM32_SPI_SPI2_RX_DMA_STREAM ${doc.STM32_SPI_SPI2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 3)"}
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#define STM32_SPI_SPI2_TX_DMA_STREAM ${doc.STM32_SPI_SPI2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"}
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#define STM32_SPI_SPI3_RX_DMA_STREAM ${doc.STM32_SPI_SPI3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 0)"}
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#define STM32_SPI_SPI3_TX_DMA_STREAM ${doc.STM32_SPI_SPI3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 7)"}
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#define STM32_SPI_SPI1_DMA_PRIORITY ${doc.STM32_SPI_SPI1_DMA_PRIORITY!"1"}
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#define STM32_SPI_SPI2_DMA_PRIORITY ${doc.STM32_SPI_SPI2_DMA_PRIORITY!"1"}
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#define STM32_SPI_SPI3_DMA_PRIORITY ${doc.STM32_SPI_SPI3_DMA_PRIORITY!"1"}
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#define STM32_SPI_SPI1_IRQ_PRIORITY ${doc.STM32_SPI_SPI1_IRQ_PRIORITY!"10"}
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#define STM32_SPI_SPI2_IRQ_PRIORITY ${doc.STM32_SPI_SPI2_IRQ_PRIORITY!"10"}
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#define STM32_SPI_SPI3_IRQ_PRIORITY ${doc.STM32_SPI_SPI3_IRQ_PRIORITY!"10"}
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#define STM32_SPI_DMA_ERROR_HOOK(spip) ${doc.STM32_SPI_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
|
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/*
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* ST driver system settings.
|
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*/
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#define STM32_ST_IRQ_PRIORITY ${doc.STM32_ST_IRQ_PRIORITY!"8"}
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#define STM32_ST_USE_TIMER ${doc.STM32_ST_USE_TIMER!"2"}
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|
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/*
|
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* UART driver system settings.
|
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*/
|
||||
#define STM32_UART_USE_USART1 ${doc.STM32_UART_USE_USART1!"FALSE"}
|
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#define STM32_UART_USE_USART2 ${doc.STM32_UART_USE_USART2!"FALSE"}
|
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#define STM32_UART_USE_USART6 ${doc.STM32_UART_USE_USART6!"FALSE"}
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#define STM32_UART_USART1_RX_DMA_STREAM ${doc.STM32_UART_USART1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 5)"}
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#define STM32_UART_USART1_TX_DMA_STREAM ${doc.STM32_UART_USART1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 7)"}
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#define STM32_UART_USART2_RX_DMA_STREAM ${doc.STM32_UART_USART2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 5)"}
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#define STM32_UART_USART2_TX_DMA_STREAM ${doc.STM32_UART_USART2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 6)"}
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#define STM32_UART_USART6_RX_DMA_STREAM ${doc.STM32_UART_USART6_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 2)"}
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#define STM32_UART_USART6_TX_DMA_STREAM ${doc.STM32_UART_USART6_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 7)"}
|
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#define STM32_UART_USART1_DMA_PRIORITY ${doc.STM32_UART_USART1_DMA_PRIORITY!"0"}
|
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#define STM32_UART_USART2_DMA_PRIORITY ${doc.STM32_UART_USART2_DMA_PRIORITY!"0"}
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#define STM32_UART_USART6_DMA_PRIORITY ${doc.STM32_UART_USART6_DMA_PRIORITY!"0"}
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#define STM32_UART_DMA_ERROR_HOOK(uartp) ${doc.STM32_UART_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
|
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|
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/*
|
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* USB driver system settings.
|
||||
*/
|
||||
#define STM32_USB_USE_OTG1 ${doc.STM32_USB_USE_OTG1!"FALSE"}
|
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#define STM32_USB_OTG1_IRQ_PRIORITY ${doc.STM32_USB_OTG1_IRQ_PRIORITY!"14"}
|
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#define STM32_USB_OTG1_RX_FIFO_SIZE ${doc.STM32_USB_OTG1_RX_FIFO_SIZE!"512"}
|
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#define STM32_USB_HOST_WAKEUP_DURATION ${doc.STM32_USB_HOST_WAKEUP_DURATION!"2"}
|
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|
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/*
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* WDG driver system settings.
|
||||
*/
|
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#define STM32_WDG_USE_IWDG ${doc.STM32_WDG_USE_IWDG!"FALSE"}
|
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|
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#endif /* MCUCONF_H */
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@ -0,0 +1,29 @@
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#!/bin/bash
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||||
if [ $# -eq 2 ]
|
||||
then
|
||||
if [ $1 = "rootpath" ]
|
||||
then
|
||||
find $2 -name "mcuconf.h" -exec bash update_mcuconf_stm32f401xx.sh "{}" \;
|
||||
else
|
||||
echo "Usage: update_mcuconf_stm32f401xx.sh [rootpath <root path>]"
|
||||
fi
|
||||
elif [ $# -eq 1 ]
|
||||
then
|
||||
declare conffile=$(<$1)
|
||||
if egrep -q "STM32F401_MCUCONF" <<< "$conffile"
|
||||
then
|
||||
echo Processing: $1
|
||||
egrep -e "\#define\s+[a-zA-Z0-9_()]*\s+[^\s]" <<< "$conffile" | sed -r 's/\#define\s+([a-zA-Z0-9_]*)(\([^)]*\))?\s+/\1=/g' > ./values.txt
|
||||
if ! fmpp -q -C conf.fmpp -S ../ftl/processors/conf/mcuconf_stm32f401xx
|
||||
then
|
||||
echo
|
||||
echo "aborted"
|
||||
exit 1
|
||||
fi
|
||||
cp ./mcuconf.h $1
|
||||
rm ./mcuconf.h ./values.txt
|
||||
fi
|
||||
else
|
||||
echo "Usage: update_mcuconf_stm32f401xx.sh [rootpath <root path>]"
|
||||
echo " update_mcuconf_stm32f401xx.sh <configuration file>]"
|
||||
fi
|
||||
Loading…
Reference in New Issue