diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld_type1.h b/os/hal/ports/STM32/STM32H7xx/hal_lld_type1.h
index 6b843943f..b66950b7f 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld_type1.h
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld_type1.h
@@ -1067,7 +1067,7 @@
  * @brief   FMC clock source.
  */
 #if !defined(STM32_FMCSEL) || defined(__DOXYGEN__)
-#define STM32_FMCSEL                        STM32_QSPISEL_HCLK
+#define STM32_FMCSEL                        STM32_FMCSEL_HCLK
 #endif
 
 /**
diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h b/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h
index d290c48cf..81f94731f 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h
@@ -1001,7 +1001,7 @@
 #endif
 
 /**
- * @brief   QSPI clock source.
+ * @brief   OCTOSPI clock source.
  */
 #if !defined(STM32_OCTOSPISEL) || defined(__DOXYGEN__)
 #define STM32_OCTOSPISEL                    STM32_OCTOSPISEL_HCLK
@@ -1011,7 +1011,7 @@
  * @brief   FMC clock source.
  */
 #if !defined(STM32_FMCSEL) || defined(__DOXYGEN__)
-#define STM32_FMCSEL                        STM32_QSPISEL_HCLK
+#define STM32_FMCSEL                        STM32_FMCSEL_HCLK
 #endif
 
 /**
@@ -2755,11 +2755,11 @@
  */
 #define STM32_OCTOSPICLK            STM32_HCLK
 
-#elif STM32_OCTOSPISEL == STM32_QSPISEL_PLL1_Q_CK
+#elif STM32_OCTOSPISEL == STM32_OCTOSPISEL_PLL1_Q_CK
 #define STM32_OCTOSPICLK            STM32_PLL1_Q_CK
-#elif STM32_OCTOSPISEL == STM32_QSPISEL_PLL2_R_CK
+#elif STM32_OCTOSPISEL == STM32_OCTOSPISEL_PLL2_R_CK
 #define STM32_OCTOSPICLK            STM32_PLL2_R_CK
-#elif STM32_OCTOSPISEL == STM32_QSPISEL_PER_CK
+#elif STM32_OCTOSPISEL == STM32_OCTOSPISEL_PER_CK
 #define STM32_OCTOSPICLK            STM32_PER_CK
 #else
 #error "invalid source selected for STM32_OCTOSPISEL clock"
diff --git a/testhal/STM32/multi/WSPI-MFS/cfg/stm32h735ig_discovery/mcuconf.h b/testhal/STM32/multi/WSPI-MFS/cfg/stm32h735ig_discovery/mcuconf.h
index de90a3cbc..cd0c559cb 100644
--- a/testhal/STM32/multi/WSPI-MFS/cfg/stm32h735ig_discovery/mcuconf.h
+++ b/testhal/STM32/multi/WSPI-MFS/cfg/stm32h735ig_discovery/mcuconf.h
@@ -95,11 +95,11 @@
 #define STM32_PLL2_Q_ENABLED                TRUE
 #define STM32_PLL2_R_ENABLED                TRUE
 #define STM32_PLL2_DIVM_VALUE               10
-#define STM32_PLL2_DIVN_VALUE               200
+#define STM32_PLL2_DIVN_VALUE               160
 #define STM32_PLL2_FRACN_VALUE              0
 #define STM32_PLL2_DIVP_VALUE               40
 #define STM32_PLL2_DIVQ_VALUE               8
-#define STM32_PLL2_DIVR_VALUE               10
+#define STM32_PLL2_DIVR_VALUE               2
 #define STM32_PLL3_ENABLED                  TRUE
 #define STM32_PLL3_P_ENABLED                TRUE
 #define STM32_PLL3_Q_ENABLED                TRUE
@@ -139,7 +139,7 @@
 #define STM32_RTCPRE_VALUE                  8
 #define STM32_CKPERSEL                      STM32_CKPERSEL_HSE_CK
 #define STM32_SDMMCSEL                      STM32_SDMMCSEL_PLL2_R_CK
-#define STM32_OCTOSPISEL                    STM32_OCTOSPISEL_HCLK
+#define STM32_OCTOSPISEL                    STM32_OCTOSPISEL_PLL2_R_CK
 #define STM32_FMCSEL                        STM32_FMCSEL_HCLK
 #define STM32_SWPSEL                        STM32_SWPSEL_PCLK1
 #define STM32_FDCANSEL                      STM32_FDCANSEL_HSE_CK
@@ -490,8 +490,8 @@
  */
 #define STM32_WSPI_USE_OCTOSPI1             TRUE
 #define STM32_WSPI_USE_OCTOSPI2             TRUE
-#define STM32_WSPI_OCTOSPI1_PRESCALER_VALUE 2
-#define STM32_WSPI_OCTOSPI2_PRESCALER_VALUE 2
+#define STM32_WSPI_OCTOSPI1_PRESCALER_VALUE 4
+#define STM32_WSPI_OCTOSPI2_PRESCALER_VALUE 4
 #define STM32_WSPI_OCTOSPI1_MDMA_CHANNEL    STM32_MDMA_CHANNEL_ID_ANY
 #define STM32_WSPI_OCTOSPI2_MDMA_CHANNEL    STM32_MDMA_CHANNEL_ID_ANY
 #define STM32_WSPI_OCTOSPI1_MDMA_PRIORITY   1