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Removed switch for "advanced" mode in PWM implementation. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14283 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-04-24 07:03:00 +00:00
parent 6332cccc4b
commit b86ec467d0
2 changed files with 33 additions and 56 deletions
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54
os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c
View File

@ -450,6 +450,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD1); pwmObjectInit(&PWMD1);
PWMD1.channels = STM32_TIM1_CHANNELS; PWMD1.channels = STM32_TIM1_CHANNELS;
PWMD1.tim = STM32_TIM1; PWMD1.tim = STM32_TIM1;
PWMD1.has_bdtr = true;
#endif #endif
#if STM32_PWM_USE_TIM2 #if STM32_PWM_USE_TIM2
@ -457,6 +458,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD2); pwmObjectInit(&PWMD2);
PWMD2.channels = STM32_TIM2_CHANNELS; PWMD2.channels = STM32_TIM2_CHANNELS;
PWMD2.tim = STM32_TIM2; PWMD2.tim = STM32_TIM2;
PWMD2.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM3 #if STM32_PWM_USE_TIM3
@ -464,6 +466,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD3); pwmObjectInit(&PWMD3);
PWMD3.channels = STM32_TIM3_CHANNELS; PWMD3.channels = STM32_TIM3_CHANNELS;
PWMD3.tim = STM32_TIM3; PWMD3.tim = STM32_TIM3;
PWMD3.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM4 #if STM32_PWM_USE_TIM4
@ -471,6 +474,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD4); pwmObjectInit(&PWMD4);
PWMD4.channels = STM32_TIM4_CHANNELS; PWMD4.channels = STM32_TIM4_CHANNELS;
PWMD4.tim = STM32_TIM4; PWMD4.tim = STM32_TIM4;
PWMD4.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM5 #if STM32_PWM_USE_TIM5
@ -478,6 +482,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD5); pwmObjectInit(&PWMD5);
PWMD5.channels = STM32_TIM5_CHANNELS; PWMD5.channels = STM32_TIM5_CHANNELS;
PWMD5.tim = STM32_TIM5; PWMD5.tim = STM32_TIM5;
PWMD5.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM8 #if STM32_PWM_USE_TIM8
@ -485,6 +490,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD8); pwmObjectInit(&PWMD8);
PWMD8.channels = STM32_TIM8_CHANNELS; PWMD8.channels = STM32_TIM8_CHANNELS;
PWMD8.tim = STM32_TIM8; PWMD8.tim = STM32_TIM8;
PWMD8.has_bdtr = true;
#endif #endif
#if STM32_PWM_USE_TIM9 #if STM32_PWM_USE_TIM9
@ -492,6 +498,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD9); pwmObjectInit(&PWMD9);
PWMD9.channels = STM32_TIM9_CHANNELS; PWMD9.channels = STM32_TIM9_CHANNELS;
PWMD9.tim = STM32_TIM9; PWMD9.tim = STM32_TIM9;
PWMD9.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM10 #if STM32_PWM_USE_TIM10
@ -499,6 +506,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD10); pwmObjectInit(&PWMD10);
PWMD10.channels = STM32_TIM10_CHANNELS; PWMD10.channels = STM32_TIM10_CHANNELS;
PWMD10.tim = STM32_TIM10; PWMD10.tim = STM32_TIM10;
PWMD10.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM11 #if STM32_PWM_USE_TIM11
@ -506,6 +514,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD11); pwmObjectInit(&PWMD11);
PWMD11.channels = STM32_TIM11_CHANNELS; PWMD11.channels = STM32_TIM11_CHANNELS;
PWMD11.tim = STM32_TIM11; PWMD11.tim = STM32_TIM11;
PWMD11.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM12 #if STM32_PWM_USE_TIM12
@ -513,6 +522,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD12); pwmObjectInit(&PWMD12);
PWMD12.channels = STM32_TIM12_CHANNELS; PWMD12.channels = STM32_TIM12_CHANNELS;
PWMD12.tim = STM32_TIM12; PWMD12.tim = STM32_TIM12;
PWMD12.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM13 #if STM32_PWM_USE_TIM13
@ -520,6 +530,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD13); pwmObjectInit(&PWMD13);
PWMD13.channels = STM32_TIM13_CHANNELS; PWMD13.channels = STM32_TIM13_CHANNELS;
PWMD13.tim = STM32_TIM13; PWMD13.tim = STM32_TIM13;
PWMD13.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM14 #if STM32_PWM_USE_TIM14
@ -527,6 +538,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD14); pwmObjectInit(&PWMD14);
PWMD14.channels = STM32_TIM14_CHANNELS; PWMD14.channels = STM32_TIM14_CHANNELS;
PWMD14.tim = STM32_TIM14; PWMD14.tim = STM32_TIM14;
PWMD14.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM15 #if STM32_PWM_USE_TIM15
@ -534,6 +546,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD15); pwmObjectInit(&PWMD15);
PWMD15.channels = STM32_TIM15_CHANNELS; PWMD15.channels = STM32_TIM15_CHANNELS;
PWMD15.tim = STM32_TIM15; PWMD15.tim = STM32_TIM15;
PWMD15.has_bdtr = true;
#endif #endif
#if STM32_PWM_USE_TIM16 #if STM32_PWM_USE_TIM16
@ -541,6 +554,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD16); pwmObjectInit(&PWMD16);
PWMD16.channels = STM32_TIM16_CHANNELS; PWMD16.channels = STM32_TIM16_CHANNELS;
PWMD16.tim = STM32_TIM16; PWMD16.tim = STM32_TIM16;
PWMD16.has_bdtr = true;
#endif #endif
#if STM32_PWM_USE_TIM17 #if STM32_PWM_USE_TIM17
@ -548,6 +562,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD17); pwmObjectInit(&PWMD17);
PWMD17.channels = STM32_TIM17_CHANNELS; PWMD17.channels = STM32_TIM17_CHANNELS;
PWMD17.tim = STM32_TIM17; PWMD17.tim = STM32_TIM17;
PWMD17.has_bdtr = true;
#endif #endif
#if STM32_PWM_USE_TIM20 #if STM32_PWM_USE_TIM20
@ -555,6 +570,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD20); pwmObjectInit(&PWMD20);
PWMD20.channels = STM32_TIM20_CHANNELS; PWMD20.channels = STM32_TIM20_CHANNELS;
PWMD20.tim = STM32_TIM20; PWMD20.tim = STM32_TIM20;
PWMD20.has_bdtr = true;
#endif #endif
#if STM32_PWM_USE_TIM21 #if STM32_PWM_USE_TIM21
@ -562,6 +578,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD21); pwmObjectInit(&PWMD21);
PWMD21.channels = STM32_TIM21_CHANNELS; PWMD21.channels = STM32_TIM21_CHANNELS;
PWMD21.tim = STM32_TIM21; PWMD21.tim = STM32_TIM21;
PWMD21.has_bdtr = false;
#endif #endif
#if STM32_PWM_USE_TIM22 #if STM32_PWM_USE_TIM22
@ -569,6 +586,7 @@ void pwm_lld_init(void) {
pwmObjectInit(&PWMD22); pwmObjectInit(&PWMD22);
PWMD22.channels = STM32_TIM22_CHANNELS; PWMD22.channels = STM32_TIM22_CHANNELS;
PWMD22.tim = STM32_TIM22; PWMD22.tim = STM32_TIM22;
PWMD22.has_bdtr = false;
#endif #endif
} }
@ -901,28 +919,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
default: default:
; ;
} }
#if STM32_PWM_USE_ADVANCED if (pwmp->has_bdtr) {
#if STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM8 && !STM32_PWM_USE_TIM20
if (&PWMD1 == pwmp) {
#endif
#if !STM32_PWM_USE_TIM1 && STM32_PWM_USE_TIM8 && !STM32_PWM_USE_TIM20
if (&PWMD8 == pwmp) {
#endif
#if STM32_PWM_USE_TIM1 && STM32_PWM_USE_TIM8 && !STM32_PWM_USE_TIM20
if ((&PWMD1 == pwmp) || (&PWMD8 == pwmp)) {
#endif
#if !STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM8 && STM32_PWM_USE_TIM20
if (&PWMD20 == pwmp) {
#endif
#if STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM8 && STM32_PWM_USE_TIM20
if ((&PWMD1 == pwmp) || (&PWMD20 == pwmp)) {
#endif
#if !STM32_PWM_USE_TIM1 && STM32_PWM_USE_TIM8 && STM32_PWM_USE_TIM20
if ((&PWMD8 == pwmp) || (&PWMD20 == pwmp)) {
#endif
#if STM32_PWM_USE_TIM1 && STM32_PWM_USE_TIM8 && STM32_PWM_USE_TIM20
if ((&PWMD1 == pwmp) || (&PWMD8 == pwmp) || (&PWMD20 == pwmp)) {
#endif
switch (pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) { switch (pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) {
case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW: case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW:
ccer |= STM32_TIM_CCER_CC1NP; ccer |= STM32_TIM_CCER_CC1NP;
@ -964,20 +961,15 @@ void pwm_lld_start(PWMDriver *pwmp) {
; ;
} }
} }
#endif /* STM32_PWM_USE_ADVANCED*/
pwmp->tim->CCER = ccer; pwmp->tim->CCER = ccer;
pwmp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */ pwmp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */
pwmp->tim->SR = 0; /* Clear pending IRQs. */ pwmp->tim->SR = 0; /* Clear pending IRQs. */
pwmp->tim->DIER = pwmp->config->dier & /* DMA-related DIER settings. */ pwmp->tim->DIER = pwmp->config->dier & /* DMA-related DIER settings. */
~STM32_TIM_DIER_IRQ_MASK; ~STM32_TIM_DIER_IRQ_MASK;
#if STM32_PWM_USE_TIM1 || STM32_PWM_USE_TIM8 || STM32_PWM_USE_TIM20 if (pwmp->has_bdtr) {
#if STM32_PWM_USE_ADVANCED
pwmp->tim->BDTR = pwmp->config->bdtr | STM32_TIM_BDTR_MOE; pwmp->tim->BDTR = pwmp->config->bdtr | STM32_TIM_BDTR_MOE;
#else }
pwmp->tim->BDTR = STM32_TIM_BDTR_MOE;
#endif
#endif
/* Timer configured and started.*/ /* Timer configured and started.*/
pwmp->tim->CR1 = STM32_TIM_CR1_ARPE | STM32_TIM_CR1_URS | pwmp->tim->CR1 = STM32_TIM_CR1_ARPE | STM32_TIM_CR1_URS |
STM32_TIM_CR1_CEN; STM32_TIM_CR1_CEN;
@ -997,9 +989,9 @@ void pwm_lld_stop(PWMDriver *pwmp) {
pwmp->tim->CR1 = 0; /* Timer disabled. */ pwmp->tim->CR1 = 0; /* Timer disabled. */
pwmp->tim->DIER = 0; /* All IRQs disabled. */ pwmp->tim->DIER = 0; /* All IRQs disabled. */
pwmp->tim->SR = 0; /* Clear eventual pending IRQs. */ pwmp->tim->SR = 0; /* Clear eventual pending IRQs. */
#if STM32_PWM_USE_TIM1 || STM32_PWM_USE_TIM8 || STM32_PWM_USE_TIM20 if (pwmp->has_bdtr) {
pwmp->tim->BDTR = 0; pwmp->tim->BDTR = 0;
#endif }
#if STM32_PWM_USE_TIM1 #if STM32_PWM_USE_TIM1
if (&PWMD1 == pwmp) { if (&PWMD1 == pwmp) {

31
os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h
View File

@ -57,18 +57,16 @@
/** /**
* @brief Complementary output, active is logic level one. * @brief Complementary output, active is logic level one.
* @note This is an STM32-specific setting. * @note This is an STM32-specific setting.
* @note This setting is only available if the configuration option * @note This setting is only available if the timer supports the
* @p STM32_PWM_USE_ADVANCED is set to TRUE and only for advanced * BDTR register.
* timers TIM1 and TIM8.
*/ */
#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH 0x10 #define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH 0x10
/** /**
* @brief Complementary output, active is logic level zero. * @brief Complementary output, active is logic level zero.
* @note This is an STM32-specific setting. * @note This is an STM32-specific setting.
* @note This setting is only available if the configuration option * @note This setting is only available if the timer supports the
* @p STM32_PWM_USE_ADVANCED is set to TRUE and only for advanced * BDTR register.
* timers TIM1 and TIM8.
*/ */
#define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW 0x20 #define PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW 0x20
/** @} */ /** @} */
@ -81,16 +79,6 @@
* @name Configuration options * @name Configuration options
* @{ * @{
*/ */
/**
* @brief If advanced timer features switch.
* @details If set to @p TRUE the advanced features for TIM1 and TIM8 are
* enabled.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_ADVANCED) || defined(__DOXYGEN__)
#define STM32_PWM_USE_ADVANCED FALSE
#endif
/** /**
* @brief PWMD1 driver enable switch. * @brief PWMD1 driver enable switch.
* @details If set to @p TRUE the support for PWMD1 is included. * @details If set to @p TRUE the support for PWMD1 is included.
@ -540,11 +528,6 @@
#error "PWM driver activated but no TIM peripheral assigned" #error "PWM driver activated but no TIM peripheral assigned"
#endif #endif
#if STM32_PWM_USE_ADVANCED && !STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM8 && \
!STM32_PWM_USE_TIM20
#error "advanced mode selected but no advanced timer assigned"
#endif
/* Checks on allocation of TIMx units.*/ /* Checks on allocation of TIMx units.*/
#if STM32_PWM_USE_TIM1 #if STM32_PWM_USE_TIM1
#if defined(STM32_TIM1_IS_USED) #if defined(STM32_TIM1_IS_USED)
@ -854,13 +837,11 @@ typedef struct {
* @note The value of this field should normally be equal to zero. * @note The value of this field should normally be equal to zero.
*/ */
uint32_t cr2; uint32_t cr2;
#if STM32_PWM_USE_ADVANCED || defined(__DOXYGEN__)
/** /**
* @brief TIM BDTR (break & dead-time) register initialization data. * @brief TIM BDTR (break & dead-time) register initialization data.
* @note The value of this field should normally be equal to zero. * @note The value of this field should normally be equal to zero.
*/ \ */ \
uint32_t bdtr; uint32_t bdtr;
#endif
/** /**
* @brief TIM DIER register initialization data. * @brief TIM DIER register initialization data.
* @note The value of this field should normally be equal to zero. * @note The value of this field should normally be equal to zero.
@ -901,6 +882,10 @@ struct PWMDriver {
* @brief Timer base clock. * @brief Timer base clock.
*/ */
uint32_t clock; uint32_t clock;
/**
* @brief Presence of BDTR register.
*/
bool has_bdtr;
/** /**
* @brief Pointer to the TIMx registers block. * @brief Pointer to the TIMx registers block.
*/ */