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STM32WLxx port: added pin count to NUCLEO board and demo name, merged stm32wl ld files. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14263 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
vrepetenko 2021-04-23 06:52:31 +00:00
parent 0a758cdf71
commit b9c0908faf
13 changed files with 44 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
demos/STM32/RT-STM32WL55JC-NUCLEO/Makefile → demos/STM32/RT-STM32WL55JC-NUCLEO64/Makefile
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@ -101,7 +101,7 @@ include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32wlxx.m
# HAL-OSAL files (optional).
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/hal/ports/STM32/STM32WLxx/platform.mk
include $(CHIBIOS)/os/hal/boards/ST_NUCLEO_WL55JC/board.mk
include $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_WL55JC/board.mk
include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
# RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk
@ -114,7 +114,7 @@ include $(CHIBIOS)/test/rt/rt_test.mk
include $(CHIBIOS)/test/oslib/oslib_test.mk
# Define linker script file here
LDSCRIPT= $(STARTUPLD)/STM32WLxxC.ld
LDSCRIPT= $(STARTUPLD)/STM32WLxxxC.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.

0
demos/STM32/RT-STM32WL55JC-NUCLEO/cfg/chconf.h → demos/STM32/RT-STM32WL55JC-NUCLEO64/cfg/chconf.h
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0
demos/STM32/RT-STM32WL55JC-NUCLEO/cfg/halconf.h → demos/STM32/RT-STM32WL55JC-NUCLEO64/cfg/halconf.h
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12
demos/STM32/RT-STM32WL55JC-NUCLEO/cfg/mcuconf.h → demos/STM32/RT-STM32WL55JC-NUCLEO64/cfg/mcuconf.h
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@ -94,6 +94,10 @@
#define STM32_IRQ_EXTI4_PRIORITY 6
#define STM32_IRQ_EXTI5_9_PRIORITY 6
#define STM32_IRQ_EXTI10_15_PRIORITY 6
#define STM32_IRQ_EXTI17_PRIORITY 6
#define STM32_IRQ_EXTI18_PRIORITY 6
#define STM32_IRQ_EXTI19_PRIORITY 6
#define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI16_34_PRIORITY 6
#define STM32_IRQ_EXTI45_PRIORITY 6
@ -181,17 +185,17 @@
/*
* RTC driver system settings.
*/
#define STM32_RTC_PRESA_VALUE 4
#define STM32_RTC_PRESS_VALUE 4
#define STM32_RTC_PRESA_VALUE 128
#define STM32_RTC_PRESS_VALUE 256
#define STM32_RTC_CR_INIT 0
#define STM32_RTC_TAMPCR_INIT 0
/*
* SERIAL driver system settings.
*/
#define STM32_SERIAL_USE_USART1 TRUE
#define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 FALSE
#define STM32_SERIAL_USE_LPUART1 FALSE
#define STM32_SERIAL_USE_LPUART1 TRUE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_LPUART1_PRIORITY 12

2
demos/STM32/RT-STM32WL55JC-NUCLEO/main.c → demos/STM32/RT-STM32WL55JC-NUCLEO64/main.c
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@ -68,7 +68,7 @@ int main(void) {
chSysInit();
/*
* Activates the serial driver 1 using the driver default configuration.
* Activates the serial driver using the driver default configuration.
*/
sdStart(&LPSD1, NULL);
sdWrite(&LPSD1, (uint8_t*)"Initialized\r\n", 13);

2
os/common/startup/ARMCMx/compilers/GCC/ld/STM32WLExx8.ld → os/common/startup/ARMCMx/compilers/GCC/ld/STM32WLxxx8.ld
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@ -15,7 +15,7 @@
*/
/*
* STM32WLExx8 memory setup.
* STM32WLxxx8 memory setup.
*/
MEMORY
{

2
os/common/startup/ARMCMx/compilers/GCC/ld/STM32WLExxB.ld → os/common/startup/ARMCMx/compilers/GCC/ld/STM32WLxxxB.ld
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@ -15,7 +15,7 @@
*/
/*
* STM32WLExxB memory setup.
* STM32WLxxxB memory setup.
*/
MEMORY
{

2
os/common/startup/ARMCMx/compilers/GCC/ld/STM32WLExxC.ld → os/common/startup/ARMCMx/compilers/GCC/ld/STM32WLxxxC.ld
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@ -15,7 +15,7 @@
*/
/*
* STM32WLExC memory setup.
* STM32WLxxC memory setup.
*/
MEMORY
{

0
os/hal/boards/ST_NUCLEO_WL55JC/board.c → os/hal/boards/ST_NUCLEO64_WL55JC/board.c
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48
os/hal/boards/ST_NUCLEO_WL55JC/board.h → os/hal/boards/ST_NUCLEO64_WL55JC/board.h
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@ -27,13 +27,13 @@
/*===========================================================================*/
/*
* Setup for STMicroelectronics STM32 Nucleo-WL5JC board.
* Setup for STMicroelectronics STM32 Nucleo-WL55JC board.
*/
/*
* Board identifier.
*/
#define BOARD_ST_NUCLEO_WL55JC
#define BOARD_ST_NUCLEO64_WL55JC
#define BOARD_NAME "STMicroelectronics STM32 Nucleo-WL55JC"
/*
@ -65,8 +65,8 @@
*/
#define GPIOA_BUTTON_1 0U
#define GPIOA_BUTTON_2 1U
#define GPIOA_LPUART1_TX 2U
#define GPIOA_LPUART1_RX 3U
#define GPIOA_USART2_TX 2U
#define GPIOA_USART2_RX 3U
#define GPIOA_ARD_D10 4U
#define GPIOA_ARD_D13 5U
#define GPIOA_ARD_D12 6U
@ -170,8 +170,8 @@
*/
#define LINE_BUTTON_1 PAL_LINE(GPIOA, 0U)
#define LINE_BUTTON_2 PAL_LINE(GPIOA, 1U)
#define LINE_LPUART1_TX PAL_LINE(GPIOA, 2U)
#define LINE_LPUART1_RX PAL_LINE(GPIOA, 3U)
#define LINE_USART2_TX PAL_LINE(GPIOA, 2U)
#define LINE_USART2_RX PAL_LINE(GPIOA, 3U)
#define LINE_ARD_D10 PAL_LINE(GPIOA, 4U)
#define LINE_ARD_D13 PAL_LINE(GPIOA, 5U)
#define LINE_ARD_D12 PAL_LINE(GPIOA, 6U)
@ -258,8 +258,8 @@
*
* PA0 - BUTTON_1 (input pullup).
* PA1 - BUTTON_2 (input pullup).
* PA2 - LPUART1_TX (alternate 8).
* PA3 - LPUART1_RX (alternate 8).
* PA2 - USART2_TX (alternate 7).
* PA3 - USART2_RX (alternate 7).
* PA4 - ARD_D10 (input floating).
* PA5 - ARD_D13 (input floating).
* PA6 - ARD_D12 (input floating).
@ -275,8 +275,8 @@
*/
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON_1) | \
PIN_MODE_INPUT(GPIOA_BUTTON_2) | \
PIN_MODE_ALTERNATE(GPIOA_LPUART1_TX) | \
PIN_MODE_ALTERNATE(GPIOA_LPUART1_RX) | \
PIN_MODE_ALTERNATE(GPIOA_USART2_TX) | \
PIN_MODE_ALTERNATE(GPIOA_USART2_RX) | \
PIN_MODE_INPUT(GPIOA_ARD_D10) | \
PIN_MODE_INPUT(GPIOA_ARD_D13) | \
PIN_MODE_INPUT(GPIOA_ARD_D12) | \
@ -291,8 +291,8 @@
PIN_MODE_INPUT(GPIOA_JTDI))
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON_1) | \
PIN_OTYPE_PUSHPULL(GPIOA_BUTTON_2) | \
PIN_OTYPE_PUSHPULL(GPIOA_LPUART1_TX) | \
PIN_OTYPE_PUSHPULL(GPIOA_LPUART1_RX) | \
PIN_OTYPE_PUSHPULL(GPIOA_USART2_TX) | \
PIN_OTYPE_PUSHPULL(GPIOA_USART2_RX) | \
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D10) | \
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D13) | \
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D12) | \
@ -307,8 +307,8 @@
PIN_OTYPE_PUSHPULL(GPIOA_JTDI))
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_BUTTON_1) | \
PIN_OSPEED_HIGH(GPIOA_BUTTON_2) | \
PIN_OSPEED_HIGH(GPIOA_LPUART1_TX) | \
PIN_OSPEED_HIGH(GPIOA_LPUART1_RX) | \
PIN_OSPEED_HIGH(GPIOA_USART2_TX) | \
PIN_OSPEED_HIGH(GPIOA_USART2_RX) | \
PIN_OSPEED_HIGH(GPIOA_ARD_D10) | \
PIN_OSPEED_HIGH(GPIOA_ARD_D13) | \
PIN_OSPEED_HIGH(GPIOA_ARD_D12) | \
@ -323,8 +323,8 @@
PIN_OSPEED_HIGH(GPIOA_JTDI))
#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_BUTTON_1) | \
PIN_PUPDR_PULLUP(GPIOA_BUTTON_2) | \
PIN_PUPDR_FLOATING(GPIOA_LPUART1_TX) | \
PIN_PUPDR_FLOATING(GPIOA_LPUART1_RX) | \
PIN_PUPDR_FLOATING(GPIOA_USART2_TX) | \
PIN_PUPDR_FLOATING(GPIOA_USART2_RX) | \
PIN_PUPDR_FLOATING(GPIOA_ARD_D10) | \
PIN_PUPDR_FLOATING(GPIOA_ARD_D13) | \
PIN_PUPDR_FLOATING(GPIOA_ARD_D12) | \
@ -339,8 +339,8 @@
PIN_PUPDR_FLOATING(GPIOA_JTDI))
#define VAL_GPIOA_ODR (PIN_ODR_LOW(GPIOA_BUTTON_1) | \
PIN_ODR_HIGH(GPIOA_BUTTON_2) | \
PIN_ODR_HIGH(GPIOA_LPUART1_TX) | \
PIN_ODR_HIGH(GPIOA_LPUART1_RX) | \
PIN_ODR_HIGH(GPIOA_USART2_TX) | \
PIN_ODR_HIGH(GPIOA_USART2_RX) | \
PIN_ODR_HIGH(GPIOA_ARD_D10) | \
PIN_ODR_HIGH(GPIOA_ARD_D13) | \
PIN_ODR_HIGH(GPIOA_ARD_D12) | \
@ -355,8 +355,8 @@
PIN_ODR_HIGH(GPIOA_JTDI))
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON_1, 0U) | \
PIN_AFIO_AF(GPIOA_BUTTON_2, 0U) | \
PIN_AFIO_AF(GPIOA_LPUART1_TX, 8U) | \
PIN_AFIO_AF(GPIOA_LPUART1_RX, 8U) | \
PIN_AFIO_AF(GPIOA_USART2_TX, 7U) | \
PIN_AFIO_AF(GPIOA_USART2_RX, 7U) | \
PIN_AFIO_AF(GPIOA_ARD_D10, 0U) | \
PIN_AFIO_AF(GPIOA_ARD_D13, 0U) | \
PIN_AFIO_AF(GPIOA_ARD_D12, 0U) | \
@ -371,8 +371,8 @@
PIN_AFIO_AF(GPIOA_JTDI, 0U))
#define VAL_GPIOA_ASCR (PIN_ASCR_DISABLED(GPIOA_BUTTON_1) | \
PIN_ASCR_DISABLED(GPIOA_BUTTON_2) | \
PIN_ASCR_DISABLED(GPIOA_LPUART1_TX) | \
PIN_ASCR_DISABLED(GPIOA_LPUART1_RX) | \
PIN_ASCR_DISABLED(GPIOA_USART2_TX) | \
PIN_ASCR_DISABLED(GPIOA_USART2_RX) | \
PIN_ASCR_DISABLED(GPIOA_ARD_D10) | \
PIN_ASCR_DISABLED(GPIOA_ARD_D13) | \
PIN_ASCR_DISABLED(GPIOA_ARD_D12) | \
@ -387,8 +387,8 @@
PIN_ASCR_DISABLED(GPIOA_JTDI))
#define VAL_GPIOA_LOCKR (PIN_LOCKR_DISABLED(GPIOA_BUTTON_1) | \
PIN_LOCKR_DISABLED(GPIOA_BUTTON_2) | \
PIN_LOCKR_DISABLED(GPIOA_LPUART1_TX) | \
PIN_LOCKR_DISABLED(GPIOA_LPUART1_RX) | \
PIN_LOCKR_DISABLED(GPIOA_USART2_TX) | \
PIN_LOCKR_DISABLED(GPIOA_USART2_RX) | \
PIN_LOCKR_DISABLED(GPIOA_ARD_D10) | \
PIN_LOCKR_DISABLED(GPIOA_ARD_D13) | \
PIN_LOCKR_DISABLED(GPIOA_ARD_D12) | \

4
os/hal/boards/ST_NUCLEO_WL55JC/board.mk → os/hal/boards/ST_NUCLEO64_WL55JC/board.mk
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@ -1,8 +1,8 @@
# List of all the board related files.
BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO_WL55JC/board.c
BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_WL55JC/board.c
# Required include directories
BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO_WL55JC
BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_WL55JC
# Shared variables
ALLCSRC += $(BOARDSRC)

6
os/hal/boards/ST_NUCLEO_WL55JC/cfg/board.chcfg → os/hal/boards/ST_NUCLEO64_WL55JC/cfg/board.chcfg
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@ -4,12 +4,12 @@
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32wlxx_board.xsd">
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32l4xx/templates</templates_path>
<templates_path>resources/gencfg/processors/boards/stm32wlxx/templates</templates_path>
<output_path>..</output_path>
<hal_version>5.0.x</hal_version>
</configuration_settings>
<board_name>STMicroelectronics STM32 Nucleo-WL5JC</board_name>
<board_id>ST_NUCLEO_WL5JC</board_id>
<board_name>STMicroelectronics STM32 Nucleo-WL55JC</board_name>
<board_id>ST_NUCLEO64_WL55JC</board_id>
<board_functions></board_functions>
<subtype>STM32WL55xx</subtype>
<clocks

2
os/hal/boards/ST_NUCLEO_WL55JC/cfg/board.fmpp → os/hal/boards/ST_NUCLEO64_WL55JC/cfg/board.fmpp
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@ -1,4 +1,4 @@
sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l4xx/templates
sourceRoot: ../../../../../tools/ftl/processors/boards/stm32wlxx/templates
outputRoot: ..
dataRoot: .