mirror of https://github.com/rusefi/ChibiOS.git
Removed MPU-related changes.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14145 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio
parent
54e5352a0e
commit
ba74711891
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@ -81,8 +81,7 @@
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* @brief Working Areas alignment constant.
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* @brief Working Areas alignment constant.
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* @note It is the alignment to be enforced for thread working areas.
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* @note It is the alignment to be enforced for thread working areas.
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*/
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*/
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#define PORT_WORKING_AREA_ALIGN ((PORT_ENABLE_GUARD_PAGES == TRUE) ?\
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#define PORT_WORKING_AREA_ALIGN PORT_STACK_ALIGN
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32U : PORT_STACK_ALIGN)
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/**
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/**
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* @brief Number of cores supported.
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* @brief Number of cores supported.
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@ -148,26 +147,6 @@
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/* Module pre-compile time settings. */
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/* Module pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/**
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* @brief Enables stack overflow guard pages using MPU.
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* @note This option can only be enabled if also option
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* @p CH_DBG_ENABLE_STACK_CHECK is enabled.
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* @note The use of this option has an overhead of 32 bytes for each
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* thread.
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*/
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#if !defined(PORT_ENABLE_GUARD_PAGES) || defined(__DOXYGEN__)
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#define PORT_ENABLE_GUARD_PAGES FALSE
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#endif
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/**
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* @brief MPU region to be used to stack guards.
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* @note Make sure this region is not included in the
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* @p PORT_SWITCHED_REGIONS_NUMBER regions range.
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*/
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#if !defined(PORT_USE_GUARD_MPU_REGION) || defined(__DOXYGEN__)
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#define PORT_USE_GUARD_MPU_REGION MPU_REGION_7
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#endif
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/**
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/**
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* @brief Stack size for the system idle thread.
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* @brief Stack size for the system idle thread.
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* @details This size depends on the idle thread implementation, usually
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* @details This size depends on the idle thread implementation, usually
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@ -284,11 +263,7 @@
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#define PORT_CORE_VARIANT_NAME "Cortex-M0"
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#define PORT_CORE_VARIANT_NAME "Cortex-M0"
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#elif (CORTEX_MODEL == 0) && defined(__CORE_CM0PLUS_H_DEPENDANT)
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#elif (CORTEX_MODEL == 0) && defined(__CORE_CM0PLUS_H_DEPENDANT)
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#if (PORT_ENABLE_GUARD_PAGES == FALSE) || defined(__DOXYGEN__)
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#define PORT_CORE_VARIANT_NAME "Cortex-M0+"
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#define PORT_CORE_VARIANT_NAME "Cortex-M0+"
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#else
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#define PORT_CORE_VARIANT_NAME "Cortex-M0+ (MPU)"
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#endif
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#else
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#else
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#error "unknown ARMv6-M variant"
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#error "unknown ARMv6-M variant"
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@ -313,29 +288,14 @@
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#define CORTEX_MAX_KERNEL_PRIORITY 0
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#define CORTEX_MAX_KERNEL_PRIORITY 0
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#endif
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#endif
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/* The following code is not processed when the file is included from an
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asm module.*/
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#if !defined(_FROM_ASM_)
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/**
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* @brief MPU guard page size.
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*/
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#if (PORT_ENABLE_GUARD_PAGES == TRUE) || defined(__DOXYGEN__)
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#if CH_DBG_ENABLE_STACK_CHECK == FALSE
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#error "PORT_ENABLE_GUARD_PAGES requires CH_DBG_ENABLE_STACK_CHECK"
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#endif
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#if __MPU_PRESENT == 0
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#error "MPU not present in current device"
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#endif
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#define PORT_GUARD_PAGE_SIZE 32U
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#else
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#define PORT_GUARD_PAGE_SIZE 0U
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module data structures and types. */
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/* Module data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* The following code is not processed when the file is included from an
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asm module.*/
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#if !defined(_FROM_ASM_)
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/**
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/**
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* @brief Type of a core identifier.
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* @brief Type of a core identifier.
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* @note Core identifiers have ranges from 0 to @p PORT_CORES_NUMBER - 1.
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* @note Core identifiers have ranges from 0 to @p PORT_CORES_NUMBER - 1.
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@ -437,11 +397,9 @@ struct port_data {
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* @brief Computes the thread working area global size.
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* @brief Computes the thread working area global size.
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* @note There is no need to perform alignments in this macro.
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* @note There is no need to perform alignments in this macro.
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*/
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*/
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#define PORT_WA_SIZE(n) ((size_t)PORT_GUARD_PAGE_SIZE + \
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#define PORT_WA_SIZE(n) (sizeof (struct port_intctx) + \
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sizeof (struct port_intctx) + \
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sizeof (struct port_extctx) + \
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sizeof (struct port_extctx) + \
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(size_t)(n) + \
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((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
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(size_t)PORT_INT_REQUIRED_STACK)
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/**
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/**
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* @brief Static working area allocation.
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* @brief Static working area allocation.
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@ -451,14 +409,8 @@ struct port_data {
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* @param[in] s the name to be assigned to the stack array
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* @param[in] s the name to be assigned to the stack array
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* @param[in] n the stack size to be assigned to the thread
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* @param[in] n the stack size to be assigned to the thread
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*/
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*/
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#if (PORT_ENABLE_GUARD_PAGES == FALSE) || defined(__DOXYGEN__)
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#define PORT_WORKING_AREA(s, n) \
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#define PORT_WORKING_AREA(s, n) \
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stkalign_t s[THD_WORKING_AREA_SIZE(n) / sizeof (stkalign_t)]
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stkalign_t s[THD_WORKING_AREA_SIZE(n) / sizeof (stkalign_t)]
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#else
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#define PORT_WORKING_AREA(s, n) \
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ALIGNED_VAR(32) stkalign_t s[THD_WORKING_AREA_SIZE(n) / sizeof (stkalign_t)]
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#endif
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/**
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/**
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* @brief IRQ prologue code.
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* @brief IRQ prologue code.
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@ -517,26 +469,14 @@ struct port_data {
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*/
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*/
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#if (CH_DBG_ENABLE_STACK_CHECK == FALSE) || defined(__DOXYGEN__)
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#if (CH_DBG_ENABLE_STACK_CHECK == FALSE) || defined(__DOXYGEN__)
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#define port_switch(ntp, otp) __port_switch(ntp, otp)
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#define port_switch(ntp, otp) __port_switch(ntp, otp)
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#else
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#else
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#if PORT_ENABLE_GUARD_PAGES == FALSE
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#define port_switch(ntp, otp) do { \
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#define port_switch(ntp, otp) do { \
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struct port_intctx *r13 = (struct port_intctx *)__get_PSP(); \
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struct port_intctx *r13 = (struct port_intctx *)__get_PSP(); \
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if ((stkalign_t *)(r13 - 1) < (otp)->wabase) { \
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if ((stkalign_t *)(r13 - 1) < (otp)->wabase) { \
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chSysHalt("stack overflow"); \
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chSysHalt("stack overflow"); \
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} \
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} \
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__port_switch(ntp, otp); \
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__port_switch(ntp, otp); \
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} while (0)
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} while (0)
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#else
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#define port_switch(ntp, otp) do { \
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__port_switch(ntp, otp); \
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\
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/* Setting up the guard page for the switched-in thread.*/ \
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mpuSetRegionAddress(PORT_USE_GUARD_MPU_REGION, \
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chThdGetSelfX()->wabase); \
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} while (0)
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#endif
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#endif
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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