diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_hse.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_hse.inc index 1e89e5206..12f69f04e 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_hse.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_hse.inc @@ -31,8 +31,8 @@ /*===========================================================================*/ /* Registry checks for robustness.*/ -#if !defined(STM32_HAS_HSE) -#error "STM32_HAS_HSE not defined in stm32_registry.h" +#if !defined(STM32_RCC_HAS_HSE) +#error "STM32_RCC_HAS_HSE not defined in stm32_registry.h" #endif /* Checks on configurations.*/ diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_hsi16.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_hsi16.inc index def15a376..1538b3305 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_hsi16.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_hsi16.inc @@ -36,8 +36,8 @@ /*===========================================================================*/ /* Registry checks for robustness.*/ -#if !defined(STM32_HAS_HSI16) -#error "STM32_HAS_HSI16 not defined in stm32_registry.h" +#if !defined(STM32_RCC_HAS_HSI16) +#error "STM32_RCC_HAS_HSI16 not defined in stm32_registry.h" #endif /* Checks on configurations.*/ diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_hsi48.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_hsi48.inc index 0a4f07b7c..dc60a2fe1 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_hsi48.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_hsi48.inc @@ -36,8 +36,8 @@ /*===========================================================================*/ /* Registry checks for robustness.*/ -#if !defined(STM32_HAS_HSI48) -#error "STM32_HAS_HSI48 not defined in stm32_registry.h" +#if !defined(STM32_RCC_HAS_HSI48) +#error "STM32_RCC_HAS_HSI48 not defined in stm32_registry.h" #endif /* Checks on configurations.*/ @@ -45,6 +45,10 @@ #error "STM32_HSI48_ENABLED not defined in mcuconf.h" #endif +#if (STM32_RCC_HAS_HSI48 == FALSE) && (STM32_HSI48_ENABLED == TRUE) +#error "HSI48 not present on this device" +#endif + /*===========================================================================*/ /* Driver exported variables. */ /*===========================================================================*/ diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_lse.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_lse.inc index 3c657d5bb..48ba08e6d 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_lse.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_lse.inc @@ -31,8 +31,8 @@ /*===========================================================================*/ /* Registry checks for robustness.*/ -#if !defined(STM32_HAS_LSE) -#error "STM32_HAS_LSE not defined in stm32_registry.h" +#if !defined(STM32_RCC_HAS_LSE) +#error "STM32_RCC_HAS_LSE not defined in stm32_registry.h" #endif /* Checks on configurations.*/ diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_lsi.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_lsi.inc index d9aba2bfb..44ac01c5e 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_lsi.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_lsi.inc @@ -36,8 +36,8 @@ /*===========================================================================*/ /* Registry checks for robustness.*/ -#if !defined(STM32_HAS_LSI) -#error "STM32_HAS_LSI not defined in stm32_registry.h" +#if !defined(STM32_RCC_HAS_LSI) +#error "STM32_RCC_HAS_LSI not defined in stm32_registry.h" #endif /* Checks on configurations.*/ diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_msi.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_msi.inc index 435139290..b7492e97f 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_msi.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_msi.inc @@ -61,8 +61,8 @@ /*===========================================================================*/ /* Registry checks for robustness.*/ -#if !defined(STM32_HAS_MSI) -#error "STM32_HAS_MSI not defined in stm32_registry.h" +#if !defined(STM32_RCC_HAS_MSI) +#error "STM32_RCC_HAS_MSI not defined in stm32_registry.h" #endif /* Checks on configurations.*/ diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_pll.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_pll.inc index 71357a46e..1fa1f4058 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_pll.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_pll.inc @@ -31,11 +31,11 @@ /*===========================================================================*/ /* Registry checks for robustness.*/ -#if !defined(STM32_HAS_PLL) -#define STM32_HAS_PLL FALSE +#if !defined(STM32_RCC_HAS_PLL) +#define STM32_RCC_HAS_PLL FALSE #endif -#if STM32_HAS_PLL +#if STM32_RCC_HAS_PLL /* Checks on configurations.*/ #if !defined(STM32_PLLSRC) @@ -54,15 +54,15 @@ #error "STM32_PLLPDIV_VALUE not defined in mcuconf.h" #endif -#if STM32_PLL_HAS_P && !defined(STM32_PLLP_VALUE) +#if STM32_RCC_PLL_HAS_P && !defined(STM32_PLLP_VALUE) #error "STM32_PLLP_VALUE not defined in mcuconf.h" #endif -#if STM32_PLL_HAS_Q && !defined(STM32_PLLQ_VALUE) +#if STM32_RCC_PLL_HAS_Q && !defined(STM32_PLLQ_VALUE) #error "STM32_PLLQ_VALUE not defined in mcuconf.h" #endif -#if STM32_PLL_HAS_R && !defined(STM32_PLLR_VALUE) +#if STM32_RCC_PLL_HAS_R && !defined(STM32_PLLR_VALUE) #error "STM32_PLLR_VALUE not defined in mcuconf.h" #endif @@ -112,15 +112,15 @@ #error "STM32_ACTIVATE_PLL not defined in hal_lld.h" #endif -#if STM32_PLL_HAS_P && !defined(STM32_PLLPEN) +#if STM32_RCC_PLL_HAS_P && !defined(STM32_PLLPEN) #error "STM32_PLLPEN not defined in hal_lld.h" #endif -#if STM32_PLL_HAS_Q && !defined(STM32_PLLQEN) +#if STM32_RCC_PLL_HAS_Q && !defined(STM32_PLLQEN) #error "STM32_PLLQEN not defined in hal_lld.h" #endif -#if STM32_PLL_HAS_R && !defined(STM32_PLLREN) +#if STM32_RCC_PLL_HAS_R && !defined(STM32_PLLREN) #error "STM32_PLLREN not defined in hal_lld.h" #endif @@ -167,7 +167,7 @@ /*---------------------------------------------------------------------------*/ /* P output, if present. */ /*---------------------------------------------------------------------------*/ -#if STM32_PLL_HAS_P || defined(__DOXYGEN__) +#if STM32_RCC_PLL_HAS_P || defined(__DOXYGEN__) /** * @brief STM32_PLLP field. */ @@ -210,15 +210,15 @@ #error "STM32_PLL_P_CLKOUT outside acceptable range (STM32_PLLP_MIN...STM32_PLLP_MAX)" #endif -#else /* !STM32_PLL_HAS_P */ +#else /* !STM32_RCC_PLL_HAS_P */ #define STM32_PLLP 0 #define STM32_PLLPEN 0 -#endif /* !STM32_PLL_HAS_P */ +#endif /* !STM32_RCC_PLL_HAS_P */ /*---------------------------------------------------------------------------*/ /* Q output, if present. */ /*---------------------------------------------------------------------------*/ -#if STM32_PLL_HAS_Q || defined(__DOXYGEN__) +#if STM32_RCC_PLL_HAS_Q || defined(__DOXYGEN__) /** * @brief STM32_PLLQ field. */ @@ -251,15 +251,15 @@ #error "STM32_PLL_Q_CLKOUT outside acceptable range (STM32_PLLQ_MIN...STM32_PLLQ_MAX)" #endif -#else /* !STM32_PLL_HAS_Q */ +#else /* !STM32_RCC_PLL_HAS_Q */ #define STM32_PLLQ 0 #define STM32_PLLQEN 0 -#endif /* !STM32_PLL_HAS_Q */ +#endif /* !STM32_RCC_PLL_HAS_Q */ /*---------------------------------------------------------------------------*/ /* R output, if present. */ /*---------------------------------------------------------------------------*/ -#if STM32_PLL_HAS_R || defined(__DOXYGEN__) +#if STM32_RCC_PLL_HAS_R || defined(__DOXYGEN__) /** * @brief STM32_PLLR field. */ @@ -292,10 +292,10 @@ #error "STM32_PLL_R_CLKOUT outside acceptable range (STM32_PLLR_MIN...STM32_PLLR_MAX)" #endif -#else /* !STM32_PLL_HAS_R */ +#else /* !STM32_RCC_PLL_HAS_R */ #define STM32_PLLR 0 #define STM32_PLLREN 0 -#endif /* !STM32_PLL_HAS_R */ +#endif /* !STM32_RCC_PLL_HAS_R */ /*===========================================================================*/ /* Driver exported variables. */ @@ -340,6 +340,6 @@ static inline void pll_deinit(void) { /* Driver exported functions. */ /*===========================================================================*/ -#endif /* STM32_HAS_PLL */ +#endif /* STM32_RCC_HAS_PLL */ /** @} */ diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_pllsai1.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_pllsai1.inc index 2fa09fa2f..035307bd0 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_pllsai1.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_pllsai1.inc @@ -31,11 +31,11 @@ /*===========================================================================*/ /* Registry checks for robustness.*/ -#if !defined(STM32_HAS_PLLSAI1) -#define STM32_HAS_PLLSAI1 FALSE +#if !defined(STM32_RCC_HAS_PLLSAI1) +#define STM32_RCC_HAS_PLLSAI1 FALSE #endif -#if STM32_HAS_PLLSAI1 +#if STM32_RCC_HAS_PLLSAI1 /* Checks on configurations.*/ #if !defined(STM32_PLLSRC) @@ -54,15 +54,15 @@ #error "STM32_PLLSAI1PDIV_VALUE not defined in mcuconf.h" #endif -#if STM32_PLLSAI1_HAS_P && !defined(STM32_PLLSAI1P_VALUE) +#if STM32_RCC_PLLSAI1_HAS_P && !defined(STM32_PLLSAI1P_VALUE) #error "STM32_PLLSAI1P_VALUE not defined in mcuconf.h" #endif -#if STM32_PLLSAI1_HAS_Q && !defined(STM32_PLLSAI1Q_VALUE) +#if STM32_RCC_PLLSAI1_HAS_Q && !defined(STM32_PLLSAI1Q_VALUE) #error "STM32_PLLSAI1Q_VALUE not defined in mcuconf.h" #endif -#if STM32_PLLSAI1_HAS_R && !defined(STM32_PLLSAI1R_VALUE) +#if STM32_RCC_PLLSAI1_HAS_R && !defined(STM32_PLLSAI1R_VALUE) #error "STM32_PLLSAI1R_VALUE not defined in mcuconf.h" #endif @@ -113,15 +113,15 @@ #endif -#if STM32_PLLSAI1_HAS_P && !defined(STM32_PLLSAI1PEN) +#if STM32_RCC_PLLSAI1_HAS_P && !defined(STM32_PLLSAI1PEN) #error "STM32_PLLSAI1PEN not defined in hal_lld.h" #endif -#if STM32_PLLSAI1_HAS_Q && !defined(STM32_PLLSAI1QEN) +#if STM32_RCC_PLLSAI1_HAS_Q && !defined(STM32_PLLSAI1QEN) #error "STM32_PLLSAI1QEN not defined in hal_lld.h" #endif -#if STM32_PLLSAI1_HAS_R && !defined(STM32_PLLSAI1REN) +#if STM32_RCC_PLLSAI1_HAS_R && !defined(STM32_PLLSAI1REN) #error "STM32_PLLSAI1REN not defined in hal_lld.h" #endif @@ -168,7 +168,7 @@ /*---------------------------------------------------------------------------*/ /* P output, if present. */ /*---------------------------------------------------------------------------*/ -#if STM32_PLLSAI1_HAS_P || defined(__DOXYGEN__) +#if STM32_RCC_PLLSAI1_HAS_P || defined(__DOXYGEN__) /** * @brief STM32_PLLSAI1P field. */ @@ -209,15 +209,15 @@ #error "STM32_PLLSAI1_P_CLKOUT outside acceptable range (STM32_PLLP_MIN...STM32_PLLP_MAX)" #endif -#else /* !STM32_PLLSAI1_HAS_P */ +#else /* !STM32_RCC_PLLSAI1_HAS_P */ #define STM32_PLLSAI1P 0 #define STM32_PLLSAI1PEN 0 -#endif /* !STM32_PLLSAI1_HAS_P */ +#endif /* !STM32_RCC_PLLSAI1_HAS_P */ /*---------------------------------------------------------------------------*/ /* Q output, if present. */ /*---------------------------------------------------------------------------*/ -#if STM32_PLLSAI1_HAS_Q || defined(__DOXYGEN__) +#if STM32_RCC_PLLSAI1_HAS_Q || defined(__DOXYGEN__) /** * @brief STM32_PLLSAI1Q field. */ @@ -250,15 +250,15 @@ #error "STM32_PLLSAI1_Q_CLKOUT outside acceptable range (STM32_PLLQ_MIN...STM32_PLLQ_MAX)" #endif -#else /* !STM32_PLLSAI1_HAS_Q */ +#else /* !STM32_RCC_PLLSAI1_HAS_Q */ #define STM32_PLLSAI1Q 0 #define STM32_PLLSAI1QEN 0 -#endif /* !STM32_PLLSAI1_HAS_Q */ +#endif /* !STM32_RCC_PLLSAI1_HAS_Q */ /*---------------------------------------------------------------------------*/ /* R output, if present. */ /*---------------------------------------------------------------------------*/ -#if STM32_PLLSAI1_HAS_R || defined(__DOXYGEN__) +#if STM32_RCC_PLLSAI1_HAS_R || defined(__DOXYGEN__) /** * @brief STM32_PLLSAI1R field. */ @@ -291,10 +291,10 @@ #error "STM32_PLLSAI1_R_CLKOUT outside acceptable range (STM32_PLLR_MIN...STM32_PLLR_MAX)" #endif -#else /* !STM32_PLLSAI1_HAS_R */ +#else /* !STM32_RCC_PLLSAI1_HAS_R */ #define STM32_PLLSAI1R 0 #define STM32_PLLSAI1REN 0 -#endif /* !STM32_PLLSAI1_HAS_R */ +#endif /* !STM32_RCC_PLLSAI1_HAS_R */ /*===========================================================================*/ /* Driver exported variables. */ @@ -339,6 +339,6 @@ static inline void pllsai1_deinit(void) { /* Driver exported functions. */ /*===========================================================================*/ -#endif /* STM32_HAS_PLLSAI1 */ +#endif /* STM32_RCC_HAS_PLLSAI1 */ /** @} */ diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_pllsai2.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_pllsai2.inc index d4ad04c5c..2207aa7c3 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_pllsai2.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_pllsai2.inc @@ -31,11 +31,11 @@ /*===========================================================================*/ /* Registry checks for robustness.*/ -#if !defined(STM32_HAS_PLLSAI2) -#define STM32_HAS_PLLSAI2 FALSE +#if !defined(STM32_RCC_HAS_PLLSAI2) +#define STM32_RCC_HAS_PLLSAI2 FALSE #endif -#if STM32_HAS_PLLSAI2 +#if STM32_RCC_HAS_PLLSAI2 /* Checks on configurations.*/ #if !defined(STM32_PLLSRC) @@ -54,15 +54,15 @@ #error "STM32_PLLSAI2PDIV_VALUE not defined in mcuconf.h" #endif -#if STM32_PLLSAI2_HAS_P && !defined(STM32_PLLSAI2P_VALUE) +#if STM32_RCC_PLLSAI2_HAS_P && !defined(STM32_PLLSAI2P_VALUE) #error "STM32_PLLSAI2P_VALUE not defined in mcuconf.h" #endif -#if STM32_PLLSAI2_HAS_Q && !defined(STM32_PLLSAI2Q_VALUE) +#if STM32_RCC_PLLSAI2_HAS_Q && !defined(STM32_PLLSAI2Q_VALUE) #error "STM32_PLLSAI2Q_VALUE not defined in mcuconf.h" #endif -#if STM32_PLLSAI2_HAS_R && !defined(STM32_PLLSAI2R_VALUE) +#if STM32_RCC_PLLSAI2_HAS_R && !defined(STM32_PLLSAI2R_VALUE) #error "STM32_PLLSAI2R_VALUE not defined in mcuconf.h" #endif @@ -113,15 +113,15 @@ #endif -#if STM32_PLLSAI2_HAS_P && !defined(STM32_PLLSAI2PEN) +#if STM32_RCC_PLLSAI2_HAS_P && !defined(STM32_PLLSAI2PEN) #error "STM32_PLLSAI2PEN not defined in hal_lld.h" #endif -#if STM32_PLLSAI2_HAS_Q && !defined(STM32_PLLSAI2QEN) +#if STM32_RCC_PLLSAI2_HAS_Q && !defined(STM32_PLLSAI2QEN) #error "STM32_PLLSAI2QEN not defined in hal_lld.h" #endif -#if STM32_PLLSAI2_HAS_R && !defined(STM32_PLLSAI2REN) +#if STM32_RCC_PLLSAI2_HAS_R && !defined(STM32_PLLSAI2REN) #error "STM32_PLLSAI2REN not defined in hal_lld.h" #endif @@ -168,7 +168,7 @@ /*---------------------------------------------------------------------------*/ /* P output, if present. */ /*---------------------------------------------------------------------------*/ -#if STM32_PLLSAI2_HAS_P || defined(__DOXYGEN__) +#if STM32_RCC_PLLSAI2_HAS_P || defined(__DOXYGEN__) /** * @brief STM32_PLLSAI2P field. */ @@ -209,15 +209,15 @@ #error "STM32_PLLSAI2_P_CLKOUT outside acceptable range (STM32_PLLP_MIN...STM32_PLLP_MAX)" #endif -#else /* !STM32_PLLSAI2_HAS_P */ +#else /* !STM32_RCC_PLLSAI2_HAS_P */ #define STM32_PLLSAI2P 0 #define STM32_PLLSAI2PEN 0 -#endif /* !STM32_PLLSAI2_HAS_P */ +#endif /* !STM32_RCC_PLLSAI2_HAS_P */ /*---------------------------------------------------------------------------*/ /* Q output, if present. */ /*---------------------------------------------------------------------------*/ -#if STM32_PLLSAI2_HAS_Q || defined(__DOXYGEN__) +#if STM32_RCC_PLLSAI2_HAS_Q || defined(__DOXYGEN__) /** * @brief STM32_PLLSAI2Q field. */ @@ -250,15 +250,15 @@ #error "STM32_PLLSAI2_Q_CLKOUT outside acceptable range (STM32_PLLQ_MIN...STM32_PLLQ_MAX)" #endif -#else /* !STM32_PLLSAI2_HAS_Q */ +#else /* !STM32_RCC_PLLSAI2_HAS_Q */ #define STM32_PLLSAI2Q 0 #define STM32_PLLSAI2QEN 0 -#endif /* !STM32_PLLSAI2_HAS_Q */ +#endif /* !STM32_RCC_PLLSAI2_HAS_Q */ /*---------------------------------------------------------------------------*/ /* R output, if present. */ /*---------------------------------------------------------------------------*/ -#if STM32_PLLSAI2_HAS_R || defined(__DOXYGEN__) +#if STM32_RCC_PLLSAI2_HAS_R || defined(__DOXYGEN__) /** * @brief STM32_PLLSAI2R field. */ @@ -291,10 +291,10 @@ #error "STM32_PLLSAI2_R_CLKOUT outside acceptable range (STM32_PLLR_MIN...STM32_PLLR_MAX)" #endif -#else /* !STM32_PLLSAI2_HAS_R */ +#else /* !STM32_RCC_PLLSAI2_HAS_R */ #define STM32_PLLSAI2R 0 #define STM32_PLLSAI2REN 0 -#endif /* !STM32_PLLSAI2_HAS_R */ +#endif /* !STM32_RCC_PLLSAI2_HAS_R */ /*===========================================================================*/ /* Driver exported variables. */ @@ -339,6 +339,6 @@ static inline void pllsai2_deinit(void) { /* Driver exported functions. */ /*===========================================================================*/ -#endif /* STM32_HAS_PLLSAI2 */ +#endif /* STM32_RCC_HAS_PLLSAI2 */ /** @} */ diff --git a/os/hal/ports/STM32/STM32G4xx/stm32_registry.h b/os/hal/ports/STM32/STM32G4xx/stm32_registry.h index f8b564f5e..9a2cf81e2 100644 --- a/os/hal/ports/STM32/STM32G4xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32G4xx/stm32_registry.h @@ -95,20 +95,20 @@ #endif /* RCC attributes.*/ -#define STM32_HAS_HSI16 TRUE -#define STM32_HAS_HSI48 TRUE -#define STM32_HAS_MSI FALSE -#define STM32_HAS_LSI TRUE -#define STM32_HAS_LSE TRUE -#define STM32_HAS_HSE TRUE +#define STM32_RCC_HAS_HSI16 TRUE +#define STM32_RCC_HAS_HSI48 TRUE +#define STM32_RCC_HAS_MSI FALSE +#define STM32_RCC_HAS_LSI TRUE +#define STM32_RCC_HAS_LSE TRUE +#define STM32_RCC_HAS_HSE TRUE -#define STM32_HAS_PLL TRUE -#define STM32_PLL_HAS_P TRUE -#define STM32_PLL_HAS_Q TRUE -#define STM32_PLL_HAS_R TRUE +#define STM32_RCC_HAS_PLL TRUE +#define STM32_RCC_PLL_HAS_P TRUE +#define STM32_RCC_PLL_HAS_Q TRUE +#define STM32_RCC_PLL_HAS_R TRUE -#define STM32_HAS_PLLSAI1 FALSE -#define STM32_HAS_PLLSAI2 FALSE +#define STM32_RCC_HAS_PLLSAI1 FALSE +#define STM32_RCC_HAS_PLLSAI2 FALSE /* SPI attributes. */ #define STM32_HAS_SPIR FALSE diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h index 3ec96d63a..1642a0ec0 100644 --- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h @@ -246,7 +246,7 @@ #define STM32_SAI2SEL_OFF 0xFFFFFFFFU /**< SAI2 clock is not required.*/ #define STM32_CLK48SEL_MASK (3 << 26) /**< CLK48SEL mask. */ -#if !STM32_CLOCK_HAS_HSI48 +#if !STM32_RCC_HAS_HSI48 #define STM32_CLK48SEL_NOCLK (0 << 26) /**< CLK48 disabled. */ #else #define STM32_CLK48SEL_HSI48 (0 << 26) /**< CLK48 source is HSI48. */ @@ -1043,7 +1043,7 @@ #endif /* !STM32_HSI16_ENABLED */ -#if STM32_CLOCK_HAS_HSI48 +#if STM32_RCC_HAS_HSI48 #if STM32_HSI48_ENABLED #else /* !STM32_HSI48_ENABLED */ @@ -1055,7 +1055,7 @@ #error "HSI48 not enabled, required by STM32_CLK48SEL" #endif #endif /* !STM32_HSI48_ENABLED */ -#endif /* STM32_CLOCK_HAS_HSI48 */ +#endif /* STM32_RCC_HAS_HSI48 */ /* * HSE related checks. @@ -1620,7 +1620,7 @@ /** * @brief 48MHz clock frequency. */ -#if !STM32_CLOCK_HAS_HSI48 || defined(__DOXYGEN__) +#if !STM32_RCC_HAS_HSI48 || defined(__DOXYGEN__) #if (STM32_CLK48SEL == STM32_CLK48SEL_NOCLK) || defined(__DOXYGEN__) #define STM32_48CLK 0 @@ -1634,7 +1634,7 @@ #error "invalid source selected for 48CLK clock" #endif -#else /* STM32_CLOCK_HAS_HSI48 */ +#else /* STM32_RCC_HAS_HSI48 */ #if (STM32_CLK48SEL == STM32_CLK48SEL_HSI48) || defined(__DOXYGEN__) #define STM32_48CLK STM32_HSI48CLK @@ -1648,7 +1648,7 @@ #error "invalid source selected for 48CLK clock" #endif -#endif /* STM32_CLOCK_HAS_HSI48 */ +#endif /* STM32_RCC_HAS_HSI48 */ /** * @brief SAI1 clock frequency. diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h index 2d72414ed..fc209f204 100644 --- a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h @@ -35,27 +35,27 @@ */ /* RCC attributes.*/ -#define STM32_HAS_HSI16 TRUE -#define STM32_HAS_HSI48 TRUE -#define STM32_HAS_MSI TRUE -#define STM32_HAS_LSI TRUE -#define STM32_HAS_LSE TRUE -#define STM32_HAS_HSE TRUE +#define STM32_RCC_HAS_HSI16 TRUE +/*#define STM32_RCC_HAS_HSI48 TRUE*/ /* See below, it changes.*/ +#define STM32_RCC_HAS_MSI TRUE +#define STM32_RCC_HAS_LSI TRUE +#define STM32_RCC_HAS_LSE TRUE +#define STM32_RCC_HAS_HSE TRUE -#define STM32_HAS_PLL TRUE -#define STM32_PLL_HAS_P TRUE -#define STM32_PLL_HAS_Q TRUE -#define STM32_PLL_HAS_R TRUE +#define STM32_RCC_HAS_PLL TRUE +#define STM32_RCC_PLL_HAS_P TRUE +#define STM32_RCC_PLL_HAS_Q TRUE +#define STM32_RCC_PLL_HAS_R TRUE -#define STM32_HAS_PLLSAI1 TRUE -#define STM32_PLLSAI1_HAS_P TRUE -#define STM32_PLLSAI1_HAS_Q TRUE -#define STM32_PLLSAI1_HAS_R TRUE +#define STM32_RCC_HAS_PLLSAI1 TRUE +#define STM32_RCC_PLLSAI1_HAS_P TRUE +#define STM32_RCC_PLLSAI1_HAS_Q TRUE +#define STM32_RCC_PLLSAI1_HAS_R TRUE -#define STM32_HAS_PLLSAI2 TRUE -#define STM32_PLLSAI2_HAS_P TRUE -#define STM32_PLLSAI2_HAS_Q FALSE -#define STM32_PLLSAI2_HAS_R TRUE +#define STM32_RCC_HAS_PLLSAI2 TRUE +#define STM32_RCC_PLLSAI2_HAS_P TRUE +#define STM32_RCC_PLLSAI2_HAS_Q FALSE +#define STM32_RCC_PLLSAI2_HAS_R TRUE /*===========================================================================*/ /* Common. */ @@ -103,8 +103,8 @@ #if defined(STM32L432xx) || defined(STM32L433xx) || defined(__DOXYGEN__) -/* Clock attributes.*/ -#define STM32_CLOCK_HAS_HSI48 TRUE +/* RCC attributes.*/ +#define STM32_RCC_HAS_HSI48 TRUE /* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE @@ -325,8 +325,8 @@ #if defined(STM32L443xx) || defined(__DOXYGEN__) -/* Clock attributes.*/ -#define STM32_CLOCK_HAS_HSI48 TRUE +/* RCC attributes.*/ +#define STM32_RCC_HAS_HSI48 TRUE /* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE @@ -568,8 +568,8 @@ #if defined(STM32L452xx) || defined(__DOXYGEN__) -/* Clock attributes.*/ -#define STM32_CLOCK_HAS_HSI48 TRUE +/* RCC attributes.*/ +#define STM32_RCC_HAS_HSI48 TRUE /* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE @@ -812,8 +812,8 @@ #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L486xx) -/* Clock attributes.*/ -#define STM32_CLOCK_HAS_HSI48 FALSE +/* RCC attributes.*/ +#define STM32_RCC_HAS_HSI48 FALSE /* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE @@ -1092,8 +1092,8 @@ #if defined(STM32L496xx) || defined(STM32L4A6xx) -/* Clock attributes.*/ -#define STM32_CLOCK_HAS_HSI48 FALSE +/* RCC attributes.*/ +#define STM32_RCC_HAS_HSI48 FALSE /* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE