mirror of https://github.com/rusefi/ChibiOS.git
Fixed bug #956.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12126 110e8d01-0319-4d1e-a829-52ad28d1bb01
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@ -935,6 +935,16 @@
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*/
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#define STM32_USART6CLK STM32_PCLK
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/**
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* @brief USART7 frequency.
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*/
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#define STM32_UART7CLK STM32_PCLK
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/**
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* @brief USART8 frequency.
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*/
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#define STM32_UART8CLK STM32_PCLK
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/**
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* @brief Timers clock.
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*/
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@ -805,6 +805,52 @@
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* @api
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*/
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#define rccResetUSART6() rccResetAPB2(RCC_APB2RSTR_USART6RST)
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/**
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* @brief Enables the UART7 peripheral clock.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableUART7(lp) rccEnableAPB2(RCC_APB2ENR_USART7EN, lp)
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/**
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* @brief Disables the UART7 peripheral clock.
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*
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* @api
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*/
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#define rccDisableUART7() rccDisableAPB2(RCC_APB2ENR_USART7EN)
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/**
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* @brief Resets the UART7 peripheral.
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*
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* @api
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*/
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#define rccResetUART7() rccResetAPB2(RCC_APB2RSTR_USART7RST)
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/**
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* @brief Enables the UART8 peripheral clock.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableUART8(lp) rccEnableAPB2(RCC_APB2ENR_USART8EN, lp)
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/**
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* @brief Disables the UART8 peripheral clock.
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*
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* @api
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*/
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#define rccDisableUART8() rccDisableAPB2(RCC_APB2ENR_USART8EN)
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/**
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* @brief Resets the UART8 peripheral.
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*
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* @api
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*/
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#define rccResetUART8() rccResetAPB2(RCC_APB2RSTR_USART8RST)
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/** @} */
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/**
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@ -138,6 +138,8 @@
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- EX: Updated LIS302DL to 1.1.0 (backported to 18.2.1).
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- EX: Updated LPS25H to 1.1.0 (backported to 18.2.1).
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- EX: Updated LSM303DLHC to 1.1.0 (backported to 18.2.1).
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- HAL: Fixed missing USART7/8 definitions in STM32F0 HAL (bug #956)(backported
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to 18.2.2).
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- LIB: Fixed heap allocation issue (bug #955)(backported to 18.2.2 and 17.6.5).
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- HAL: Fixed win32 simulator HAL broken because a typo (bug #954)(backported
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to 18.2.2).
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