git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3758 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2012-01-07 13:34:43 +00:00
parent 036d20f034
commit ceabd20101
3 changed files with 434 additions and 423 deletions

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@ -73,7 +73,7 @@
* @brief Enables the I2C subsystem. * @brief Enables the I2C subsystem.
*/ */
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C TRUE #define HAL_USE_I2C FALSE
#endif #endif
/** /**

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@ -304,6 +304,7 @@
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state> <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2</state> <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx</state> <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx</state>
<state>$PROJ_DIR$\..\..\..\os\various</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY</state> <state>$PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY</state>
<state>$PROJ_DIR$\..\..\..\test</state> <state>$PROJ_DIR$\..\..\..\test</state>
</option> </option>
@ -1224,6 +1225,7 @@
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state> <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\DMAv1</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2</state> <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2</state>
<state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx</state> <state>$PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx</state>
<state>$PROJ_DIR$\..\..\..\os\various</state>
<state>$PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY</state> <state>$PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY</state>
<state>$PROJ_DIR$\..\..\..\test</state> <state>$PROJ_DIR$\..\..\..\test</state>
</option> </option>
@ -2195,6 +2197,15 @@
<name>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\nvic.h</name> <name>$PROJ_DIR$\..\..\..\os\ports\common\ARMCMx\nvic.h</name>
</file> </file>
</group> </group>
<group>
<name>various</name>
<file>
<name>$PROJ_DIR$\..\..\..\os\various\chprintf.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\os\various\lis302dl.c</name>
</file>
</group>
</group> </group>
<group> <group>
<name>test</name> <name>test</name>

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@ -1,422 +1,422 @@
/* /*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011 Giovanni Di Sirio. 2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT. This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or the Free Software Foundation; either version 3 of the License, or
(at your option) any later version. (at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful, ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
/* /*
Concepts and parts of this file have been contributed by Uladzimir Pylinsky Concepts and parts of this file have been contributed by Uladzimir Pylinsky
aka barthess. aka barthess.
*/ */
/** /**
* @file STM32/i2c_lld.h * @file STM32/i2c_lld.h
* @brief STM32 I2C subsystem low level driver header. * @brief STM32 I2C subsystem low level driver header.
* *
* @addtogroup I2C * @addtogroup I2C
* @{ * @{
*/ */
#ifndef _I2C_LLD_H_ #ifndef _I2C_LLD_H_
#define _I2C_LLD_H_ #define _I2C_LLD_H_
#if HAL_USE_I2C || defined(__DOXYGEN__) #if HAL_USE_I2C || defined(__DOXYGEN__)
/*===========================================================================*/ /*===========================================================================*/
/* Driver constants. */ /* Driver constants. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Peripheral clock frequency. * @brief Peripheral clock frequency.
*/ */
#define I2C_CLK_FREQ ((STM32_PCLK1) / 1000000) #define I2C_CLK_FREQ ((STM32_PCLK1) / 1000000)
/*===========================================================================*/ /*===========================================================================*/
/* Driver pre-compile time settings. */ /* Driver pre-compile time settings. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @name Configuration options * @name Configuration options
* @{ * @{
*/ */
/** /**
* @brief I2C1 driver enable switch. * @brief I2C1 driver enable switch.
* @details If set to @p TRUE the support for I2C1 is included. * @details If set to @p TRUE the support for I2C1 is included.
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(STM32_I2C_USE_I2C1) || defined(__DOXYGEN__) #if !defined(STM32_I2C_USE_I2C1) || defined(__DOXYGEN__)
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#endif #endif
/** /**
* @brief I2C2 driver enable switch. * @brief I2C2 driver enable switch.
* @details If set to @p TRUE the support for I2C2 is included. * @details If set to @p TRUE the support for I2C2 is included.
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(STM32_I2C_USE_I2C2) || defined(__DOXYGEN__) #if !defined(STM32_I2C_USE_I2C2) || defined(__DOXYGEN__)
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#endif #endif
/** /**
* @brief I2C3 driver enable switch. * @brief I2C3 driver enable switch.
* @details If set to @p TRUE the support for I2C3 is included. * @details If set to @p TRUE the support for I2C3 is included.
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(STM32_I2C_USE_I2C3) || defined(__DOXYGEN__) #if !defined(STM32_I2C_USE_I2C3) || defined(__DOXYGEN__)
#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_USE_I2C3 FALSE
#endif #endif
/** /**
* @brief I2C1 interrupt priority level setting. * @brief I2C1 interrupt priority level setting.
*/ */
#if !defined(STM32_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__) #if !defined(STM32_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_I2C_I2C1_IRQ_PRIORITY 10 #define STM32_I2C_I2C1_IRQ_PRIORITY 10
#endif #endif
/** /**
* @brief I2C2 interrupt priority level setting. * @brief I2C2 interrupt priority level setting.
*/ */
#if !defined(STM32_I2C_I2C2_IRQ_PRIORITY) || defined(__DOXYGEN__) #if !defined(STM32_I2C_I2C2_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_I2C_I2C2_IRQ_PRIORITY 10 #define STM32_I2C_I2C2_IRQ_PRIORITY 10
#endif #endif
/** /**
* @brief I2C3 interrupt priority level setting. * @brief I2C3 interrupt priority level setting.
*/ */
#if !defined(STM32_I2C_I2C3_IRQ_PRIORITY) || defined(__DOXYGEN__) #if !defined(STM32_I2C_I2C3_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_I2C_I2C3_IRQ_PRIORITY 10 #define STM32_I2C_I2C3_IRQ_PRIORITY 10
#endif #endif
/** /**
* @brief I2C1 DMA error hook. * @brief I2C1 DMA error hook.
* @note The default action for DMA errors is a system halt because DMA * @note The default action for DMA errors is a system halt because DMA
* error can only happen because programming errors. * error can only happen because programming errors.
*/ */
#if !defined(STM32_I2C_DMA_ERROR_HOOK) || defined(__DOXYGEN__) #if !defined(STM32_I2C_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() #define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt()
#endif #endif
#if STM32_ADVANCED_DMA || defined(__DOXYGEN__) #if STM32_ADVANCED_DMA || defined(__DOXYGEN__)
/** /**
* @brief DMA stream used for I2C1 RX operations. * @brief DMA stream used for I2C1 RX operations.
* @note This option is only available on platforms with enhanced DMA. * @note This option is only available on platforms with enhanced DMA.
*/ */
#if !defined(STM32_I2C_I2C1_RX_DMA_STREAM) || defined(__DOXYGEN__) #if !defined(STM32_I2C_I2C1_RX_DMA_STREAM) || defined(__DOXYGEN__)
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
#endif #endif
/** /**
* @brief DMA stream used for I2C1 TX operations. * @brief DMA stream used for I2C1 TX operations.
* @note This option is only available on platforms with enhanced DMA. * @note This option is only available on platforms with enhanced DMA.
*/ */
#if !defined(STM32_I2C_I2C1_TX_DMA_STREAM) || defined(__DOXYGEN__) #if !defined(STM32_I2C_I2C1_TX_DMA_STREAM) || defined(__DOXYGEN__)
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
#endif #endif
/** /**
* @brief DMA stream used for I2C2 RX operations. * @brief DMA stream used for I2C2 RX operations.
* @note This option is only available on platforms with enhanced DMA. * @note This option is only available on platforms with enhanced DMA.
*/ */
#if !defined(STM32_I2C_I2C2_RX_DMA_STREAM) || defined(__DOXYGEN__) #if !defined(STM32_I2C_I2C2_RX_DMA_STREAM) || defined(__DOXYGEN__)
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#endif #endif
/** /**
* @brief DMA stream used for I2C2 TX operations. * @brief DMA stream used for I2C2 TX operations.
* @note This option is only available on platforms with enhanced DMA. * @note This option is only available on platforms with enhanced DMA.
*/ */
#if !defined(STM32_I2C_I2C2_TX_DMA_STREAM) || defined(__DOXYGEN__) #if !defined(STM32_I2C_I2C2_TX_DMA_STREAM) || defined(__DOXYGEN__)
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#endif #endif
/** /**
* @brief DMA stream used for I2C3 RX operations. * @brief DMA stream used for I2C3 RX operations.
* @note This option is only available on platforms with enhanced DMA. * @note This option is only available on platforms with enhanced DMA.
*/ */
#if !defined(STM32_I2C_I2C3_RX_DMA_STREAM) || defined(__DOXYGEN__) #if !defined(STM32_I2C_I2C3_RX_DMA_STREAM) || defined(__DOXYGEN__)
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#endif #endif
/** /**
* @brief DMA stream used for I2C3 TX operations. * @brief DMA stream used for I2C3 TX operations.
* @note This option is only available on platforms with enhanced DMA. * @note This option is only available on platforms with enhanced DMA.
*/ */
#if !defined(STM32_I2C_I2C3_TX_DMA_STREAM) || defined(__DOXYGEN__) #if !defined(STM32_I2C_I2C3_TX_DMA_STREAM) || defined(__DOXYGEN__)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#endif #endif
#else /* !STM32_ADVANCED_DMA */ #else /* !STM32_ADVANCED_DMA */
/* Fixed streams for platforms using the old DMA peripheral, the values are /* Fixed streams for platforms using the old DMA peripheral, the values are
valid for both STM32F1xx and STM32L1xx.*/ valid for both STM32F1xx and STM32L1xx.*/
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#endif /* !STM32_ADVANCED_DMA*/ #endif /* !STM32_ADVANCED_DMA*/
/** @} */ /** @} */
/*===========================================================================*/ /*===========================================================================*/
/* Derived constants and error checks. */ /* Derived constants and error checks. */
/*===========================================================================*/ /*===========================================================================*/
/** @brief error checks */ /** @brief error checks */
#if STM32_I2C_USE_I2C1 && !STM32_HAS_I2C1 #if STM32_I2C_USE_I2C1 && !STM32_HAS_I2C1
#error "I2C1 not present in the selected device" #error "I2C1 not present in the selected device"
#endif #endif
#if STM32_I2C_USE_I2C2 && !STM32_HAS_I2C2 #if STM32_I2C_USE_I2C2 && !STM32_HAS_I2C2
#error "I2C2 not present in the selected device" #error "I2C2 not present in the selected device"
#endif #endif
#if STM32_I2C_USE_I2C3 && !STM32_HAS_I2C3 #if STM32_I2C_USE_I2C3 && !STM32_HAS_I2C3
#error "I2C3 not present in the selected device" #error "I2C3 not present in the selected device"
#endif #endif
#if !STM32_I2C_USE_I2C1 && !STM32_I2C_USE_I2C2 && \ #if !STM32_I2C_USE_I2C1 && !STM32_I2C_USE_I2C2 && \
!STM32_I2C_USE_I2C3 !STM32_I2C_USE_I2C3
#error "I2C driver activated but no I2C peripheral assigned" #error "I2C driver activated but no I2C peripheral assigned"
#endif #endif
#if STM32_I2C_USE_I2C1 && \ #if STM32_I2C_USE_I2C1 && \
!STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_RX_DMA_STREAM, \ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_RX_DMA_STREAM, \
STM32_I2C1_RX_DMA_MSK) STM32_I2C1_RX_DMA_MSK)
#error "invalid DMA stream associated to I2C1 RX" #error "invalid DMA stream associated to I2C1 RX"
#endif #endif
#if STM32_I2C_USE_I2C1 && \ #if STM32_I2C_USE_I2C1 && \
!STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_TX_DMA_STREAM, \ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_TX_DMA_STREAM, \
STM32_I2C1_TX_DMA_MSK) STM32_I2C1_TX_DMA_MSK)
#error "invalid DMA stream associated to I2C1 TX" #error "invalid DMA stream associated to I2C1 TX"
#endif #endif
#if STM32_I2C_USE_I2C2 && \ #if STM32_I2C_USE_I2C2 && \
!STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_RX_DMA_STREAM, \ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_RX_DMA_STREAM, \
STM32_I2C2_RX_DMA_MSK) STM32_I2C2_RX_DMA_MSK)
#error "invalid DMA stream associated to I2C2 RX" #error "invalid DMA stream associated to I2C2 RX"
#endif #endif
#if STM32_I2C_USE_I2C2 && \ #if STM32_I2C_USE_I2C2 && \
!STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_TX_DMA_STREAM, \ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_TX_DMA_STREAM, \
STM32_I2C2_TX_DMA_MSK) STM32_I2C2_TX_DMA_MSK)
#error "invalid DMA stream associated to I2C2 TX" #error "invalid DMA stream associated to I2C2 TX"
#endif #endif
#if STM32_I2C_USE_I2C3 && \ #if STM32_I2C_USE_I2C3 && \
!STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_RX_DMA_STREAM, \ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_RX_DMA_STREAM, \
STM32_I2C3_RX_DMA_MSK) STM32_I2C3_RX_DMA_MSK)
#error "invalid DMA stream associated to I2C3 RX" #error "invalid DMA stream associated to I2C3 RX"
#endif #endif
#if STM32_I2C_USE_I2C3 && \ #if STM32_I2C_USE_I2C3 && \
!STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_TX_DMA_STREAM, \ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_TX_DMA_STREAM, \
STM32_I2C3_TX_DMA_MSK) STM32_I2C3_TX_DMA_MSK)
#error "invalid DMA stream associated to I2C3 TX" #error "invalid DMA stream associated to I2C3 TX"
#endif #endif
#if !defined(STM32_DMA_REQUIRED) #if !defined(STM32_DMA_REQUIRED)
#define STM32_DMA_REQUIRED #define STM32_DMA_REQUIRED
#endif #endif
/* Check clock range. */ /* Check clock range. */
#if defined(STM32F4XX) #if defined(STM32F4XX)
#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 42) #if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 42)
#error "I2C peripheral clock frequency out of range." #error "I2C peripheral clock frequency out of range."
#endif #endif
#elif defined(STM32L1XX_MD) #elif defined(STM32L1XX_MD)
#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 32) #if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 32)
#error "I2C peripheral clock frequency out of range." #error "I2C peripheral clock frequency out of range."
#endif #endif
#elif defined(STM32F2XX) #elif defined(STM32F2XX)
#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 30) #if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 30)
#error "I2C peripheral clock frequency out of range." #error "I2C peripheral clock frequency out of range."
#endif #endif
#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \ #elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \
defined(STM32F10X_HD_VL) defined(STM32F10X_HD_VL)
#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 24) #if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 24)
#error "I2C peripheral clock frequency out of range." #error "I2C peripheral clock frequency out of range."
#endif #endif
#elif defined(STM32F10X_LD) || defined(STM32F10X_MD) || \ #elif defined(STM32F10X_LD) || defined(STM32F10X_MD) || \
defined(STM32F10X_HD) || defined(STM32F10X_XL) || \ defined(STM32F10X_HD) || defined(STM32F10X_XL) || \
defined(STM32F10X_CL) defined(STM32F10X_CL)
#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 36) #if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 36)
#error "I2C peripheral clock frequency out of range." #error "I2C peripheral clock frequency out of range."
#endif #endif
#else #else
#error "unspecified, unsupported or invalid STM32 platform" #error "unspecified, unsupported or invalid STM32 platform"
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
/* Driver data structures and types. */ /* Driver data structures and types. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Type representing I2C address. * @brief Type representing I2C address.
*/ */
typedef uint16_t i2caddr_t; typedef uint16_t i2caddr_t;
/** /**
* @brief I2C Driver condition flags type. * @brief I2C Driver condition flags type.
*/ */
typedef uint32_t i2cflags_t; typedef uint32_t i2cflags_t;
/** /**
* @brief Supported modes for the I2C bus. * @brief Supported modes for the I2C bus.
*/ */
typedef enum { typedef enum {
OPMODE_I2C = 1, OPMODE_I2C = 1,
OPMODE_SMBUS_DEVICE = 2, OPMODE_SMBUS_DEVICE = 2,
OPMODE_SMBUS_HOST = 3, OPMODE_SMBUS_HOST = 3,
} i2copmode_t; } i2copmode_t;
/** /**
* @brief Supported duty cycle modes for the I2C bus. * @brief Supported duty cycle modes for the I2C bus.
*/ */
typedef enum { typedef enum {
STD_DUTY_CYCLE = 1, STD_DUTY_CYCLE = 1,
FAST_DUTY_CYCLE_2 = 2, FAST_DUTY_CYCLE_2 = 2,
FAST_DUTY_CYCLE_16_9 = 3, FAST_DUTY_CYCLE_16_9 = 3,
} i2cdutycycle_t; } i2cdutycycle_t;
/** /**
* @brief Driver configuration structure. * @brief Driver configuration structure.
*/ */
typedef struct { typedef struct {
i2copmode_t op_mode; /**< @brief Specifies the I2C mode. */ i2copmode_t op_mode; /**< @brief Specifies the I2C mode. */
uint32_t clock_speed; /**< @brief Specifies the clock frequency. uint32_t clock_speed; /**< @brief Specifies the clock frequency.
@note Must be set to a value lower @note Must be set to a value lower
than 400kHz. */ than 400kHz. */
i2cdutycycle_t duty_cycle; /**< @brief Specifies the I2C fast mode i2cdutycycle_t duty_cycle; /**< @brief Specifies the I2C fast mode
duty cycle. */ duty cycle. */
} I2CConfig; } I2CConfig;
/** /**
* @brief Type of a structure representing an I2C driver. * @brief Type of a structure representing an I2C driver.
*/ */
typedef struct I2CDriver I2CDriver; typedef struct I2CDriver I2CDriver;
/** /**
* @brief Structure representing an I2C driver. * @brief Structure representing an I2C driver.
*/ */
struct I2CDriver{ struct I2CDriver{
/** /**
* @brief Driver state. * @brief Driver state.
*/ */
i2cstate_t state; i2cstate_t state;
/** /**
* @brief Current configuration data. * @brief Current configuration data.
*/ */
const I2CConfig *config; const I2CConfig *config;
/** /**
* @brief Error flags. * @brief Error flags.
*/ */
i2cflags_t errors; i2cflags_t errors;
#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if CH_USE_MUTEXES || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__)
/** /**
* @brief Mutex protecting the bus. * @brief Mutex protecting the bus.
*/ */
Mutex mutex; Mutex mutex;
#elif CH_USE_SEMAPHORES #elif CH_USE_SEMAPHORES
Semaphore semaphore; Semaphore semaphore;
#endif #endif
#endif /* I2C_USE_MUTUAL_EXCLUSION */ #endif /* I2C_USE_MUTUAL_EXCLUSION */
/* End of the mandatory fields.*/ /* End of the mandatory fields.*/
/** /**
* @brief Thread waiting for I/O completion. * @brief Thread waiting for I/O completion.
*/ */
Thread *thread; Thread *thread;
/** /**
* @brief Current slave address without R/W bit. * @brief Current slave address without R/W bit.
*/ */
i2caddr_t addr; i2caddr_t addr;
/** /**
* @brief DMA mode bit mask. * @brief DMA mode bit mask.
*/ */
uint32_t dmamode; uint32_t dmamode;
/** /**
* @brief Receive DMA channel. * @brief Receive DMA channel.
*/ */
const stm32_dma_stream_t *dmarx; const stm32_dma_stream_t *dmarx;
/** /**
* @brief Transmit DMA channel. * @brief Transmit DMA channel.
*/ */
const stm32_dma_stream_t *dmatx; const stm32_dma_stream_t *dmatx;
/** /**
* @brief Pointer to the I2Cx registers block. * @brief Pointer to the I2Cx registers block.
*/ */
I2C_TypeDef *i2c; I2C_TypeDef *i2c;
}; };
/*===========================================================================*/ /*===========================================================================*/
/* Driver macros. */ /* Driver macros. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Get errors from I2C driver. * @brief Get errors from I2C driver.
* *
* @param[in] i2cp pointer to the @p I2CDriver object * @param[in] i2cp pointer to the @p I2CDriver object
* *
* @notapi * @notapi
*/ */
#define i2c_lld_get_errors(i2cp) ((i2cp)->errors) #define i2c_lld_get_errors(i2cp) ((i2cp)->errors)
/*===========================================================================*/ /*===========================================================================*/
/* External declarations. */ /* External declarations. */
/*===========================================================================*/ /*===========================================================================*/
#if !defined(__DOXYGEN__) #if !defined(__DOXYGEN__)
#if STM32_I2C_USE_I2C1 #if STM32_I2C_USE_I2C1
extern I2CDriver I2CD1; extern I2CDriver I2CD1;
#endif #endif
#if STM32_I2C_USE_I2C2 #if STM32_I2C_USE_I2C2
extern I2CDriver I2CD2; extern I2CDriver I2CD2;
#endif #endif
#if STM32_I2C_USE_I2C3 #if STM32_I2C_USE_I2C3
extern I2CDriver I2CD3; extern I2CDriver I2CD3;
#endif #endif
#endif /* !defined(__DOXYGEN__) */ #endif /* !defined(__DOXYGEN__) */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
void i2c_lld_init(void); void i2c_lld_init(void);
void i2c_lld_start(I2CDriver *i2cp); void i2c_lld_start(I2CDriver *i2cp);
void i2c_lld_stop(I2CDriver *i2cp); void i2c_lld_stop(I2CDriver *i2cp);
msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
const uint8_t *txbuf, size_t txbytes, const uint8_t *txbuf, size_t txbytes,
uint8_t *rxbuf, size_t rxbytes, uint8_t *rxbuf, size_t rxbytes,
systime_t timeout); systime_t timeout);
msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
uint8_t *rxbuf, size_t rxbytes, uint8_t *rxbuf, size_t rxbytes,
systime_t timeout); systime_t timeout);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* HAL_USE_I2C */ #endif /* HAL_USE_I2C */
#endif /* _I2C_LLD_H_ */ #endif /* _I2C_LLD_H_ */
/** @} */ /** @} */