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Alternate preemption mode added to IAR port too. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3016 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2011-06-02 14:49:16 +00:00
parent 24734a32ef
commit d08ed6e93c
4 changed files with 53 additions and 12 deletions
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2
demos/ARMCM0-LPC1114-LPCXPRESSO/iar/ch.ewp
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@ -523,6 +523,7 @@
</option>
<option>
<name>AUserIncludes</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\LPC11xx</state>
<state>$PROJ_DIR$\..\..\..\boards\EA_LPCXPRESSO_BB_1114</state>
</option>
@ -1387,6 +1388,7 @@
</option>
<option>
<name>AUserIncludes</name>
<state>$PROJ_DIR$\..\</state>
<state>$PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\LPC11xx</state>
<state>$PROJ_DIR$\..\..\..\boards\EA_LPCXPRESSO_BB_1114</state>
</option>

18
os/ports/IAR/ARMCMx/chcore_v6m.h
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@ -45,6 +45,15 @@
/* Port configurable parameters. */
/*===========================================================================*/
/**
* @brief Alternate preemption method.
* @details Activating this option will make the Kernel use the PendSV
* handler for preemption instead of the NMI handler.
*/
#ifndef CORTEX_ALTERNATE_SWITCH
#define CORTEX_ALTERNATE_SWITCH FALSE
#endif
/*===========================================================================*/
/* Port derived parameters. */
/*===========================================================================*/
@ -72,6 +81,15 @@
#define CH_CORE_VARIANT_NAME "Cortex-M1"
#endif
/**
* @brief Port-specific information string.
*/
#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
#define CH_PORT_INFO "Preemption through NMI"
#else
#define CH_PORT_INFO "Preemption through PendSV"
#endif
/*===========================================================================*/
/* Port implementation part. */
/*===========================================================================*/

41
os/ports/IAR/ARMCMx/chcoreasm_v6m.s
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@ -24,12 +24,11 @@
PRESERVE8
/*
* Imports the Cortex-Mx parameters header and performs the same calculations
* done in chcore.h.
* Imports the Cortex-Mx configuration headers.
*/
#include "cmparams.h"
#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
#define _FROM_ASM_
#include "chconf.h"
#include "chcore.h"
EXTCTX_SIZE SET 32
CONTEXT_OFFSET SET 12
@ -81,13 +80,29 @@ _port_thread_start:
* The NMI vector is used for exception mode re-entering after a context
* switch.
*/
PUBLIC NMIVector
#if !CORTEX_ALTERNATE_SWITCH
PUBLIC NMIVector
NMIVector:
mrs r3, PSP
adds r3, r3, #32
msr PSP, r3
cpsie i
bx lr
#endif
/*
* PendSV vector.
* The PendSV vector is used for exception mode re-entering after a context
* switch.
*/
#if CORTEX_ALTERNATE_SWITCH
PUBLIC PendSVVector
PendSVVector:
mrs r3, PSP
adds r3, r3, #32
msr PSP, r3
bx lr
#endif
/*
* Post-IRQ switch code.
@ -96,12 +111,18 @@ NMIVector:
PUBLIC _port_switch_from_isr
_port_switch_from_isr:
bl chSchDoRescheduleI
movs r3, #128
lsls r3, r3, #24
ldr r2, =SCB_ICSR
movs r3, #128
#if CORTEX_ALTERNATE_SWITCH
lsls r3, r3, #21
str r3, [r2, #0]
_waitnmi:
b _waitnmi
cpsie i
#else
lsls r3, r3, #24
str r3, [r2, #0]
#endif
waithere:
b waithere
/*
* Reschedule verification and setup after an IRQ.

4
os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
View File

@ -89,8 +89,8 @@ NMIVector PROC
#endif
/*
* NMI vector.
* The NMI vector is used for exception mode re-entering after a context
* PendSV vector.
* The PendSV vector is used for exception mode re-entering after a context
* switch.
*/
#if CORTEX_ALTERNATE_SWITCH