mirror of https://github.com/rusefi/ChibiOS.git
Removed QSPI driver and demos.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12331 110e8d01-0319-4d1e-a829-52ad28d1bb01
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@ -1,836 +0,0 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
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This file is part of ChibiOS.
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ChibiOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file m25q.c
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* @brief Micron serial flash driver code.
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*
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* @addtogroup M25Q
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* @ingroup EX_MICRON
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* @{
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*/
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#include <string.h>
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#include "hal.h"
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#include "m25q.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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#define PAGE_SIZE 256U
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#define PAGE_MASK (PAGE_SIZE - 1U)
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#if M25Q_USE_SUB_SECTORS == TRUE
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#define SECTOR_SIZE 0x00001000U
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#define CMD_SECTOR_ERASE M25Q_CMD_SUBSECTOR_ERASE
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#else
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#define SECTOR_SIZE 0x00010000U
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#define CMD_SECTOR_ERASE M25Q_CMD_SECTOR_ERASE
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#endif
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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static const flash_descriptor_t *m25q_get_descriptor(void *instance);
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static flash_error_t m25q_read(void *instance, flash_offset_t offset,
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size_t n, uint8_t *rp);
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static flash_error_t m25q_program(void *instance, flash_offset_t offset,
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size_t n, const uint8_t *pp);
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static flash_error_t m25q_start_erase_all(void *instance);
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static flash_error_t m25q_start_erase_sector(void *instance,
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flash_sector_t sector);
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static flash_error_t m25q_query_erase(void *instance, uint32_t *msec);
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static flash_error_t m25q_verify_erase(void *instance, flash_sector_t sector);
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static flash_error_t m25q_read_sfdp(void *instance, flash_offset_t offset,
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size_t n, uint8_t *rp);
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/**
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* @brief Virtual methods table.
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*/
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static const struct M25QDriverVMT m25q_vmt = {
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(size_t)0,
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m25q_get_descriptor, m25q_read, m25q_program,
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m25q_start_erase_all, m25q_start_erase_sector,
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m25q_query_erase, m25q_verify_erase,
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m25q_read_sfdp
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};
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/**
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* @brief N25Q128 descriptor.
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*/
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static flash_descriptor_t m25q_descriptor = {
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.attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_REWRITABLE |
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FLASH_ATTR_SUSPEND_ERASE_CAPABLE,
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.page_size = 256U,
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.sectors_count = 0U, /* It is overwritten.*/
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.sectors = NULL,
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.sectors_size = SECTOR_SIZE,
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.address = 0U
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};
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#if JESD216_BUS_MODE != JESD216_BUS_MODE_SPI
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/* Initial M25Q_CMD_READ_ID command.*/
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static const qspi_command_t m25q_cmd_read_id = {
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.cfg = QSPI_CFG_CMD(M25Q_CMD_READ_ID) |
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#if M25Q_SWITCH_WIDTH == TRUE
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QSPI_CFG_CMD_MODE_ONE_LINE |
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QSPI_CFG_DATA_MODE_ONE_LINE,
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#else
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#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
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QSPI_CFG_CMD_MODE_ONE_LINE |
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QSPI_CFG_DATA_MODE_ONE_LINE,
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#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
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QSPI_CFG_CMD_MODE_TWO_LINES |
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QSPI_CFG_DATA_MODE_TWO_LINES,
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#else
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QSPI_CFG_CMD_MODE_FOUR_LINES |
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QSPI_CFG_DATA_MODE_FOUR_LINES,
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#endif
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#endif
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.addr = 0,
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.alt = 0
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};
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/* Initial M25Q_CMD_WRITE_ENHANCED_V_CONF_REGISTER command.*/
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static const qspi_command_t m25q_cmd_write_evconf = {
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.cfg = QSPI_CFG_CMD(M25Q_CMD_WRITE_ENHANCED_V_CONF_REGISTER) |
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#if M25Q_SWITCH_WIDTH == TRUE
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QSPI_CFG_CMD_MODE_ONE_LINE |
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QSPI_CFG_DATA_MODE_ONE_LINE,
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#else
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#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
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QSPI_CFG_CMD_MODE_ONE_LINE |
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QSPI_CFG_DATA_MODE_ONE_LINE,
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#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
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QSPI_CFG_CMD_MODE_TWO_LINES |
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QSPI_CFG_DATA_MODE_TWO_LINES,
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#else
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QSPI_CFG_CMD_MODE_FOUR_LINES |
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QSPI_CFG_DATA_MODE_FOUR_LINES,
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#endif
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#endif
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.addr = 0,
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.alt = 0
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};
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/* Initial M25Q_CMD_WRITE_ENABLE command.*/
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static const qspi_command_t m25q_cmd_write_enable = {
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.cfg = QSPI_CFG_CMD(M25Q_CMD_WRITE_ENABLE) |
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#if M25Q_SWITCH_WIDTH == TRUE
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QSPI_CFG_CMD_MODE_ONE_LINE,
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#else
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#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
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QSPI_CFG_CMD_MODE_ONE_LINE,
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#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
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QSPI_CFG_CMD_MODE_TWO_LINES,
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#else
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QSPI_CFG_CMD_MODE_FOUR_LINES,
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#endif
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#endif
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.addr = 0,
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.alt = 0
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};
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/* Bus width initialization.*/
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#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
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static const uint8_t m25q_evconf_value[1] = {0xCF};
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#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
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static const uint8_t m25q_evconf_value[1] = {0x8F};
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#else
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static const uint8_t m25q_evconf_value[1] = {0x4F};
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#endif
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#endif /* JESD216_BUS_MODE != JESD216_BUS_MODE_SPI */
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static const uint8_t m25q_manufacturer_ids[] = M25Q_SUPPORTED_MANUFACTURE_IDS;
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static const uint8_t m25q_memory_type_ids[] = M25Q_SUPPORTED_MEMORY_TYPE_IDS;
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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static bool m25q_find_id(const uint8_t *set, size_t size, uint8_t element) {
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size_t i;
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for (i = 0; i < size; i++) {
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if (set[i] == element) {
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return true;
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}
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}
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return false;
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}
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#if (JESD216_BUS_MODE != JESD216_BUS_MODE_SPI) || defined(__DOXYGEN__)
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void m25q_reset_xip(M25QDriver *devp) {
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static const uint8_t flash_conf[1] = {
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(M25Q_READ_DUMMY_CYCLES << 4U) | 0x0FU
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};
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qspi_command_t cmd;
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uint8_t buf[1];
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/* Resetting XIP mode by reading one byte without XIP confirmation bit.*/
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cmd.alt = 0xFF;
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cmd.addr = 0;
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cmd.cfg = QSPI_CFG_CMD_MODE_NONE |
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QSPI_CFG_ADDR_SIZE_24 |
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#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
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QSPI_CFG_ADDR_MODE_ONE_LINE |
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QSPI_CFG_DATA_MODE_ONE_LINE |
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#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
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QSPI_CFG_ADDR_MODE_TWO_LINES |
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QSPI_CFG_DATA_MODE_TWO_LINES |
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#else
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QSPI_CFG_ADDR_MODE_FOUR_LINES |
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QSPI_CFG_DATA_MODE_FOUR_LINES |
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#endif
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QSPI_CFG_ALT_MODE_FOUR_LINES | /* Always 4 lines, note.*/
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QSPI_CFG_ALT_SIZE_8 |
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QSPI_CFG_DUMMY_CYCLES(M25Q_READ_DUMMY_CYCLES - 2);
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qspiReceive(devp->config->busp, &cmd, 1, buf);
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/* Enabling write operation.*/
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jesd216_cmd(devp->config->busp, M25Q_CMD_WRITE_ENABLE);
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/* Rewriting volatile configuration register.*/
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jesd216_cmd_send(devp->config->busp, M25Q_CMD_WRITE_V_CONF_REGISTER,
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1, flash_conf);
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}
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void m25q_reset_memory(M25QDriver *devp) {
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/* 1x M25Q_CMD_RESET_ENABLE command.*/
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static const qspi_command_t cmd_reset_enable_1 = {
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.cfg = QSPI_CFG_CMD(M25Q_CMD_RESET_ENABLE) |
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QSPI_CFG_CMD_MODE_ONE_LINE,
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.addr = 0,
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.alt = 0
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};
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/* 1x M25Q_CMD_RESET_MEMORY command.*/
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static const qspi_command_t cmd_reset_memory_1 = {
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.cfg = QSPI_CFG_CMD(M25Q_CMD_RESET_MEMORY) |
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QSPI_CFG_CMD_MODE_ONE_LINE,
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.addr = 0,
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.alt = 0
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};
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/* If the device is in one bit mode then the following commands are
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rejected because shorter than 8 bits. If the device is in multiple
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bits mode then the commands are accepted and the device is reset to
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one bit mode.*/
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#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI4L
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/* 4x M25Q_CMD_RESET_ENABLE command.*/
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static const qspi_command_t cmd_reset_enable_4 = {
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.cfg = QSPI_CFG_CMD(M25Q_CMD_RESET_ENABLE) |
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QSPI_CFG_CMD_MODE_FOUR_LINES,
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.addr = 0,
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.alt = 0
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};
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/* 4x M25Q_CMD_RESET_MEMORY command.*/
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static const qspi_command_t cmd_reset_memory_4 = {
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.cfg = QSPI_CFG_CMD(M25Q_CMD_RESET_MEMORY) |
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QSPI_CFG_CMD_MODE_FOUR_LINES,
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.addr = 0,
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.alt = 0
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};
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qspiCommand(devp->config->busp, &cmd_reset_enable_4);
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qspiCommand(devp->config->busp, &cmd_reset_memory_4);
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#else
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/* 2x M25Q_CMD_RESET_ENABLE command.*/
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static const qspi_command_t cmd_reset_enable_2 = {
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.cfg = QSPI_CFG_CMD(M25Q_CMD_RESET_ENABLE) |
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QSPI_CFG_CMD_MODE_TWO_LINES,
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.addr = 0,
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.alt = 0
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};
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/* 2x M25Q_CMD_RESET_MEMORY command.*/
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static const qspi_command_t cmd_reset_memory_2 = {
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.cfg = QSPI_CFG_CMD(M25Q_CMD_RESET_MEMORY) |
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QSPI_CFG_CMD_MODE_TWO_LINES,
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.addr = 0,
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.alt = 0
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};
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qspiCommand(devp->config->busp, &cmd_reset_enable_2);
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qspiCommand(devp->config->busp, &cmd_reset_memory_2);
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#endif
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/* Now the device should be in one bit mode for sure and we perform a
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device reset.*/
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qspiCommand(devp->config->busp, &cmd_reset_enable_1);
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qspiCommand(devp->config->busp, &cmd_reset_memory_1);
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}
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#endif /* JESD216_BUS_MODE != JESD216_BUS_MODE_SPI */
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static flash_error_t m25q_poll_status(M25QDriver *devp) {
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uint8_t sts;
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do {
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#if M25Q_NICE_WAITING == TRUE
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osalThreadSleepMilliseconds(1);
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#endif
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/* Read status command.*/
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jesd216_cmd_receive(devp->config->busp, M25Q_CMD_READ_FLAG_STATUS_REGISTER,
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1, &sts);
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} while ((sts & M25Q_FLAGS_PROGRAM_ERASE) == 0U);
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/* Checking for errors.*/
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if ((sts & M25Q_FLAGS_ALL_ERRORS) != 0U) {
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/* Clearing status register.*/
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jesd216_cmd(devp->config->busp, M25Q_CMD_CLEAR_FLAG_STATUS_REGISTER);
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/* Program operation failed.*/
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return FLASH_ERROR_PROGRAM;
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}
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return FLASH_NO_ERROR;
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}
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static const flash_descriptor_t *m25q_get_descriptor(void *instance) {
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M25QDriver *devp = (M25QDriver *)instance;
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osalDbgCheck(instance != NULL);
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osalDbgAssert((devp->state != FLASH_UNINIT) && (devp->state != FLASH_STOP),
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"invalid state");
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return &m25q_descriptor;
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}
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static flash_error_t m25q_read(void *instance, flash_offset_t offset,
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size_t n, uint8_t *rp) {
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M25QDriver *devp = (M25QDriver *)instance;
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osalDbgCheck((instance != NULL) && (rp != NULL) && (n > 0U));
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osalDbgCheck((size_t)offset + n <= (size_t)m25q_descriptor.sectors_count *
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(size_t)m25q_descriptor.sectors_size);
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osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
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"invalid state");
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if (devp->state == FLASH_ERASE) {
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return FLASH_BUSY_ERASING;
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}
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/* Bus acquired.*/
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jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
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/* FLASH_READY state while the operation is performed.*/
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devp->state = FLASH_READ;
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#if JESD216_BUS_MODE != JESD216_BUS_MODE_SPI
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/* Fast read command in QSPI mode.*/
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jesd216_cmd_addr_dummy_receive(devp->config->busp, M25Q_CMD_FAST_READ,
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offset, M25Q_READ_DUMMY_CYCLES, n, rp);
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#else
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/* Normal read command in SPI mode.*/
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jesd216_cmd_addr_receive(devp->config->busp, M25Q_CMD_READ,
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offset, n, rp);
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#endif
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/* Ready state again.*/
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devp->state = FLASH_READY;
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/* Bus released.*/
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jesd216_bus_release(devp->config->busp);
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return FLASH_NO_ERROR;
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}
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static flash_error_t m25q_program(void *instance, flash_offset_t offset,
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size_t n, const uint8_t *pp) {
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M25QDriver *devp = (M25QDriver *)instance;
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osalDbgCheck((instance != NULL) && (pp != NULL) && (n > 0U));
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osalDbgCheck((size_t)offset + n <= (size_t)m25q_descriptor.sectors_count *
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(size_t)m25q_descriptor.sectors_size);
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osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
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"invalid state");
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if (devp->state == FLASH_ERASE) {
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return FLASH_BUSY_ERASING;
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}
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/* Bus acquired.*/
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jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
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/* FLASH_PGM state while the operation is performed.*/
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devp->state = FLASH_PGM;
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/* Data is programmed page by page.*/
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while (n > 0U) {
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flash_error_t err;
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/* Data size that can be written in a single program page operation.*/
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size_t chunk = (size_t)(((offset | PAGE_MASK) + 1U) - offset);
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if (chunk > n) {
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chunk = n;
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}
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/* Enabling write operation.*/
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jesd216_cmd(devp->config->busp, M25Q_CMD_WRITE_ENABLE);
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/* Page program command.*/
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jesd216_cmd_addr_send(devp->config->busp, M25Q_CMD_PAGE_PROGRAM, offset,
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chunk, pp);
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/* Wait for status and check errors.*/
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err = m25q_poll_status(devp);
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if (err != FLASH_NO_ERROR) {
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/* Bus released.*/
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jesd216_bus_release(devp->config->busp);
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return err;
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}
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/* Next page.*/
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offset += chunk;
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pp += chunk;
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n -= chunk;
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}
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/* Ready state again.*/
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devp->state = FLASH_READY;
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/* Bus released.*/
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jesd216_bus_release(devp->config->busp);
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return FLASH_NO_ERROR;
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}
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static flash_error_t m25q_start_erase_all(void *instance) {
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M25QDriver *devp = (M25QDriver *)instance;
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osalDbgCheck(instance != NULL);
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osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
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"invalid state");
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|
||||
if (devp->state == FLASH_ERASE) {
|
||||
return FLASH_BUSY_ERASING;
|
||||
}
|
||||
|
||||
/* Bus acquired.*/
|
||||
jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
|
||||
|
||||
/* FLASH_ERASE state while the operation is performed.*/
|
||||
devp->state = FLASH_ERASE;
|
||||
|
||||
/* Enabling write operation.*/
|
||||
jesd216_cmd(devp->config->busp, M25Q_CMD_WRITE_ENABLE);
|
||||
|
||||
/* Bulk erase command.*/
|
||||
jesd216_cmd(devp->config->busp, M25Q_CMD_BULK_ERASE);
|
||||
|
||||
/* Bus released.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
|
||||
return FLASH_NO_ERROR;
|
||||
}
|
||||
|
||||
static flash_error_t m25q_start_erase_sector(void *instance,
|
||||
flash_sector_t sector) {
|
||||
M25QDriver *devp = (M25QDriver *)instance;
|
||||
flash_offset_t offset = (flash_offset_t)(sector * SECTOR_SIZE);
|
||||
|
||||
osalDbgCheck(instance != NULL);
|
||||
osalDbgCheck(sector < m25q_descriptor.sectors_count);
|
||||
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
|
||||
"invalid state");
|
||||
|
||||
if (devp->state == FLASH_ERASE) {
|
||||
return FLASH_BUSY_ERASING;
|
||||
}
|
||||
|
||||
/* Bus acquired.*/
|
||||
jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
|
||||
|
||||
/* FLASH_ERASE state while the operation is performed.*/
|
||||
devp->state = FLASH_ERASE;
|
||||
|
||||
/* Enabling write operation.*/
|
||||
jesd216_cmd(devp->config->busp, M25Q_CMD_WRITE_ENABLE);
|
||||
|
||||
/* Sector erase command.*/
|
||||
jesd216_cmd_addr(devp->config->busp, M25Q_CMD_SECTOR_ERASE, offset);
|
||||
|
||||
/* Bus released.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
|
||||
return FLASH_NO_ERROR;
|
||||
}
|
||||
|
||||
static flash_error_t m25q_verify_erase(void *instance,
|
||||
flash_sector_t sector) {
|
||||
M25QDriver *devp = (M25QDriver *)instance;
|
||||
uint8_t cmpbuf[M25Q_COMPARE_BUFFER_SIZE];
|
||||
flash_offset_t offset;
|
||||
size_t n;
|
||||
|
||||
osalDbgCheck(instance != NULL);
|
||||
osalDbgCheck(sector < m25q_descriptor.sectors_count);
|
||||
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
|
||||
"invalid state");
|
||||
|
||||
if (devp->state == FLASH_ERASE) {
|
||||
return FLASH_BUSY_ERASING;
|
||||
}
|
||||
|
||||
/* Bus acquired.*/
|
||||
jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
|
||||
|
||||
/* FLASH_READY state while the operation is performed.*/
|
||||
devp->state = FLASH_READ;
|
||||
|
||||
/* Read command.*/
|
||||
offset = (flash_offset_t)(sector * SECTOR_SIZE);
|
||||
n = SECTOR_SIZE;
|
||||
while (n > 0U) {
|
||||
uint8_t *p;
|
||||
|
||||
#if JESD216_BUS_MODE != JESD216_BUS_MODE_SPI
|
||||
jesd216_cmd_addr_dummy_receive(devp->config->busp, M25Q_CMD_FAST_READ,
|
||||
offset, M25Q_READ_DUMMY_CYCLES,
|
||||
sizeof cmpbuf, cmpbuf);
|
||||
#else
|
||||
/* Normal read command in SPI mode.*/
|
||||
jesd216_cmd_addr_receive(devp->config->busp, M25Q_CMD_READ,
|
||||
offset, sizeof cmpbuf, cmpbuf);
|
||||
#endif
|
||||
|
||||
/* Checking for erased state of current buffer.*/
|
||||
for (p = cmpbuf; p < &cmpbuf[M25Q_COMPARE_BUFFER_SIZE]; p++) {
|
||||
if (*p != 0xFFU) {
|
||||
/* Ready state again.*/
|
||||
devp->state = FLASH_READY;
|
||||
|
||||
/* Bus released.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
|
||||
return FLASH_ERROR_VERIFY;
|
||||
}
|
||||
}
|
||||
|
||||
offset += sizeof cmpbuf;
|
||||
n -= sizeof cmpbuf;
|
||||
}
|
||||
|
||||
/* Ready state again.*/
|
||||
devp->state = FLASH_READY;
|
||||
|
||||
/* Bus released.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
|
||||
return FLASH_NO_ERROR;
|
||||
}
|
||||
|
||||
static flash_error_t m25q_query_erase(void *instance, uint32_t *msec) {
|
||||
M25QDriver *devp = (M25QDriver *)instance;
|
||||
uint8_t sts;
|
||||
|
||||
osalDbgCheck(instance != NULL);
|
||||
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
|
||||
"invalid state");
|
||||
|
||||
/* If there is an erase in progress then the device must be checked.*/
|
||||
if (devp->state == FLASH_ERASE) {
|
||||
|
||||
/* Bus acquired.*/
|
||||
jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
|
||||
|
||||
/* Read status command.*/
|
||||
jesd216_cmd_receive(devp->config->busp, M25Q_CMD_READ_FLAG_STATUS_REGISTER,
|
||||
1, &sts);
|
||||
|
||||
/* If the P/E bit is zero (busy) or the flash in a suspended state then
|
||||
report that the operation is still in progress.*/
|
||||
if (((sts & M25Q_FLAGS_PROGRAM_ERASE) == 0U) ||
|
||||
((sts & M25Q_FLAGS_ERASE_SUSPEND) != 0U)) {
|
||||
|
||||
/* Bus released.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
|
||||
/* Recommended time before polling again, this is a simplified
|
||||
implementation.*/
|
||||
if (msec != NULL) {
|
||||
*msec = 1U;
|
||||
}
|
||||
|
||||
return FLASH_BUSY_ERASING;
|
||||
}
|
||||
|
||||
/* The device is ready to accept commands.*/
|
||||
devp->state = FLASH_READY;
|
||||
|
||||
/* Checking for errors.*/
|
||||
if ((sts & M25Q_FLAGS_ALL_ERRORS) != 0U) {
|
||||
|
||||
/* Clearing status register.*/
|
||||
jesd216_cmd(devp->config->busp, M25Q_CMD_CLEAR_FLAG_STATUS_REGISTER);
|
||||
|
||||
/* Erase operation failed.*/
|
||||
return FLASH_ERROR_ERASE;
|
||||
}
|
||||
|
||||
/* Bus released.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
}
|
||||
|
||||
return FLASH_NO_ERROR;
|
||||
}
|
||||
|
||||
static flash_error_t m25q_read_sfdp(void *instance, flash_offset_t offset,
|
||||
size_t n, uint8_t *rp) {
|
||||
|
||||
(void)instance;
|
||||
(void)rp;
|
||||
(void)offset;
|
||||
(void)n;
|
||||
|
||||
return FLASH_NO_ERROR;
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Initializes an instance.
|
||||
*
|
||||
* @param[out] devp pointer to the @p M25QDriver object
|
||||
*
|
||||
* @init
|
||||
*/
|
||||
void m25qObjectInit(M25QDriver *devp) {
|
||||
|
||||
osalDbgCheck(devp != NULL);
|
||||
|
||||
devp->vmt = &m25q_vmt;
|
||||
devp->state = FLASH_STOP;
|
||||
devp->config = NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and activates N25Q128 driver.
|
||||
*
|
||||
* @param[in] devp pointer to the @p M25QDriver object
|
||||
* @param[in] config pointer to the configuration
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void m25qStart(M25QDriver *devp, const M25QConfig *config) {
|
||||
|
||||
osalDbgCheck((devp != NULL) && (config != NULL));
|
||||
osalDbgAssert(devp->state != FLASH_UNINIT, "invalid state");
|
||||
|
||||
devp->config = config;
|
||||
|
||||
if (devp->state == FLASH_STOP) {
|
||||
|
||||
/* Bus acquisition.*/
|
||||
jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
|
||||
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_SPI
|
||||
/* Reading device ID.*/
|
||||
jesd216_cmd_receive(devp->config->busp, M25Q_CMD_READ_ID,
|
||||
sizeof devp->device_id, devp->device_id);
|
||||
|
||||
#else /* JESD216_BUS_MODE != JESD216_BUS_MODE_SPI */
|
||||
/* Attempting a reset of the XIP mode, it could be in an unexpected state
|
||||
because a CPU reset does not reset the memory too.*/
|
||||
m25q_reset_xip(devp);
|
||||
|
||||
/* Attempting a eeset of the device, it could be in an unexpected state
|
||||
because a CPU reset does not reset the memory too.*/
|
||||
m25q_reset_memory(devp);
|
||||
|
||||
/* Reading device ID and unique ID.*/
|
||||
qspiReceive(devp->config->busp, &m25q_cmd_read_id,
|
||||
sizeof devp->device_id, devp->device_id);
|
||||
#endif /* JESD216_BUS_MODE != JESD216_BUS_MODE_SPI */
|
||||
|
||||
/* Checking if the device is white listed.*/
|
||||
osalDbgAssert(m25q_find_id(m25q_manufacturer_ids,
|
||||
sizeof m25q_manufacturer_ids,
|
||||
devp->device_id[0]),
|
||||
"invalid manufacturer id");
|
||||
osalDbgAssert(m25q_find_id(m25q_memory_type_ids,
|
||||
sizeof m25q_memory_type_ids,
|
||||
devp->device_id[1]),
|
||||
"invalid memory type id");
|
||||
|
||||
#if (JESD216_BUS_MODE != JESD216_BUS_MODE_SPI) && (M25Q_SWITCH_WIDTH == TRUE)
|
||||
/* Setting up final bus width.*/
|
||||
qspiCommand(devp->config->busp, &m25q_cmd_write_enable);
|
||||
qspiSend(devp->config->busp, &m25q_cmd_write_evconf, 1, m25q_evconf_value);
|
||||
|
||||
{
|
||||
uint8_t id[3];
|
||||
|
||||
/* Reading ID again for confirmation.*/
|
||||
jesd216_cmd_receive(devp->config->busp, M25Q_CMD_MULTIPLE_IO_READ_ID,
|
||||
3, id);
|
||||
|
||||
/* Checking if the device is white listed.*/
|
||||
osalDbgAssert(memcmp(id, devp->device_id, 3) == 0,
|
||||
"id confirmation failed");
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Setting up the device size.*/
|
||||
m25q_descriptor.sectors_count = (1U << (size_t)devp->device_id[2]) /
|
||||
SECTOR_SIZE;
|
||||
|
||||
#if (JESD216_BUS_MODE != JESD216_BUS_MODE_SPI)
|
||||
{
|
||||
static const uint8_t flash_conf[1] = {
|
||||
(M25Q_READ_DUMMY_CYCLES << 4U) | 0x0FU
|
||||
};
|
||||
|
||||
/* Setting up the dummy cycles to be used for fast read operations.*/
|
||||
jesd216_cmd(devp->config->busp, M25Q_CMD_WRITE_ENABLE);
|
||||
jesd216_cmd_send(devp->config->busp, M25Q_CMD_WRITE_V_CONF_REGISTER,
|
||||
1, flash_conf);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Driver in ready state.*/
|
||||
devp->state = FLASH_READY;
|
||||
|
||||
/* Bus release.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the N25Q128 driver.
|
||||
*
|
||||
* @param[in] devp pointer to the @p M25QDriver object
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void m25qStop(M25QDriver *devp) {
|
||||
|
||||
osalDbgCheck(devp != NULL);
|
||||
osalDbgAssert(devp->state != FLASH_UNINIT, "invalid state");
|
||||
|
||||
if (devp->state != FLASH_STOP) {
|
||||
|
||||
/* Bus acquisition.*/
|
||||
jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
|
||||
|
||||
/* Stopping bus device.*/
|
||||
jesd216_stop(devp->config->busp);
|
||||
|
||||
/* Deleting current configuration.*/
|
||||
devp->config = NULL;
|
||||
|
||||
/* Driver stopped.*/
|
||||
devp->state = FLASH_STOP;
|
||||
|
||||
/* Bus release.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
}
|
||||
}
|
||||
|
||||
#if (JESD216_BUS_MODE != JESD216_BUS_MODE_SPI) || defined(__DOXYGEN__)
|
||||
#if (QSPI_SUPPORTS_MEMMAP == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Enters the memory Mapping mode.
|
||||
* @details The memory mapping mode is only available when the QSPI mode
|
||||
* is selected and the underlying QSPI controller supports the
|
||||
* feature.
|
||||
*
|
||||
* @param[in] devp pointer to the @p M25QDriver object
|
||||
* @param[out] addrp pointer to the memory start address of the mapped
|
||||
* flash or @p NULL
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void m25qMemoryMap(M25QDriver *devp, uint8_t **addrp) {
|
||||
static const uint8_t flash_status_xip[1] = {
|
||||
(M25Q_READ_DUMMY_CYCLES << 4U) | 0x07U
|
||||
};
|
||||
qspi_command_t cmd;
|
||||
|
||||
/* Bus acquisition.*/
|
||||
jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
|
||||
|
||||
/* Activating XIP mode in the device.*/
|
||||
jesd216_cmd(devp->config->busp, M25Q_CMD_WRITE_ENABLE);
|
||||
jesd216_cmd_send(devp->config->busp, M25Q_CMD_WRITE_V_CONF_REGISTER,
|
||||
1, flash_status_xip);
|
||||
|
||||
/* Putting the QSPI driver in memory mapped mode.*/
|
||||
cmd.cfg = QSPI_CFG_CMD(M25Q_CMD_FAST_READ) |
|
||||
QSPI_CFG_ADDR_SIZE_24 |
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
|
||||
QSPI_CFG_CMD_MODE_ONE_LINE |
|
||||
QSPI_CFG_ADDR_MODE_ONE_LINE |
|
||||
QSPI_CFG_DATA_MODE_ONE_LINE |
|
||||
#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
|
||||
QSPI_CFG_CMD_MODE_TWO_LINES |
|
||||
QSPI_CFG_ADDR_MODE_TWO_LINES |
|
||||
QSPI_CFG_DATA_MODE_TWO_LINES |
|
||||
#else
|
||||
QSPI_CFG_CMD_MODE_FOUR_LINES |
|
||||
QSPI_CFG_ADDR_MODE_FOUR_LINES |
|
||||
QSPI_CFG_DATA_MODE_FOUR_LINES |
|
||||
#endif
|
||||
QSPI_CFG_ALT_MODE_FOUR_LINES | /* Always 4 lines, note.*/
|
||||
QSPI_CFG_ALT_SIZE_8 |
|
||||
QSPI_CFG_SIOO |
|
||||
QSPI_CFG_DUMMY_CYCLES(M25Q_READ_DUMMY_CYCLES - 2);
|
||||
|
||||
qspiMapFlash(devp->config->busp, &cmd, addrp);
|
||||
|
||||
/* Bus release.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Leaves the memory Mapping mode.
|
||||
*
|
||||
* @param[in] devp pointer to the @p M25QDriver object
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void m25qMemoryUnmap(M25QDriver *devp) {
|
||||
|
||||
/* Bus acquisition.*/
|
||||
jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
|
||||
|
||||
qspiUnmapFlash(devp->config->busp);
|
||||
|
||||
m25q_reset_xip(devp);
|
||||
|
||||
/* Bus release.*/
|
||||
jesd216_bus_release(devp->config->busp);
|
||||
}
|
||||
#endif /* QSPI_SUPPORTS_MEMMAP == TRUE */
|
||||
#endif /* JESD216_BUS_MODE != JESD216_BUS_MODE_SPI */
|
||||
|
||||
/** @} */
|
|
@ -1,274 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS.
|
||||
|
||||
ChibiOS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file m25q.h
|
||||
* @brief Micron serial flash driver header.
|
||||
*
|
||||
* @addtogroup M25Q
|
||||
* @ingroup EX_MICRON
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef M25Q_H
|
||||
#define M25Q_H
|
||||
|
||||
#include "hal_jesd216_flash.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Version identification
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief M25Q driver version string.
|
||||
*/
|
||||
#define EX_M25Q_VERSION "1.0.0"
|
||||
|
||||
/**
|
||||
* @brief M25Q driver version major number.
|
||||
*/
|
||||
#define EX_M25Q_MAJOR 1
|
||||
|
||||
/**
|
||||
* @brief M25Q driver version minor number.
|
||||
*/
|
||||
#define EX_M25Q_MINOR 0
|
||||
|
||||
/**
|
||||
* @brief M25Q driver version patch number.
|
||||
*/
|
||||
#define EX_M25Q_PATCH 0
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Command codes
|
||||
* @{
|
||||
*/
|
||||
#define M25Q_CMD_RESET_ENABLE 0x66
|
||||
#define M25Q_CMD_RESET_MEMORY 0x99
|
||||
#define M25Q_CMD_READ_ID 0x9F
|
||||
#define M25Q_CMD_MULTIPLE_IO_READ_ID 0xAF
|
||||
#define M25Q_CMD_READ_DISCOVERY_PARAMETER 0x5A
|
||||
#define M25Q_CMD_READ 0x03
|
||||
#define M25Q_CMD_FAST_READ 0x0B
|
||||
#define M25Q_CMD_WRITE_ENABLE 0x06
|
||||
#define M25Q_CMD_WRITE_DISABLE 0x04
|
||||
#define M25Q_CMD_READ_STATUS_REGISTER 0x05
|
||||
#define M25Q_CMD_WRITE_STATUS_REGISTER 0x01
|
||||
#define M25Q_CMD_READ_LOCK_REGISTER 0xE8
|
||||
#define M25Q_CMD_WRITE_LOCK_REGISTER 0xE5
|
||||
#define M25Q_CMD_READ_FLAG_STATUS_REGISTER 0x70
|
||||
#define M25Q_CMD_CLEAR_FLAG_STATUS_REGISTER 0x50
|
||||
#define M25Q_CMD_READ_NV_CONFIGURATION_REGISTER 0xB5
|
||||
#define M25Q_CMD_WRITE_NV_CONFIGURATION_REGISTER 0xB1
|
||||
#define M25Q_CMD_READ_V_CONF_REGISTER 0x85
|
||||
#define M25Q_CMD_WRITE_V_CONF_REGISTER 0x81
|
||||
#define M25Q_CMD_READ_ENHANCED_V_CONF_REGISTER 0x65
|
||||
#define M25Q_CMD_WRITE_ENHANCED_V_CONF_REGISTER 0x61
|
||||
#define M25Q_CMD_PAGE_PROGRAM 0x02
|
||||
#define M25Q_CMD_SUBSECTOR_ERASE 0x20
|
||||
#define M25Q_CMD_SECTOR_ERASE 0xD8
|
||||
#define M25Q_CMD_BULK_ERASE 0xC7
|
||||
#define M25Q_CMD_PROGRAM_ERASE_RESUME 0x7A
|
||||
#define M25Q_CMD_PROGRAM_ERASE_SUSPEND 0x75
|
||||
#define M25Q_CMD_READ_OTP_ARRAY 0x4B
|
||||
#define M25Q_CMD_PROGRAM_OTP_ARRAY 0x42
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Flags status register bits
|
||||
* @{
|
||||
*/
|
||||
#define M25Q_FLAGS_PROGRAM_ERASE 0x80U
|
||||
#define M25Q_FLAGS_ERASE_SUSPEND 0x40U
|
||||
#define M25Q_FLAGS_ERASE_ERROR 0x20U
|
||||
#define M25Q_FLAGS_PROGRAM_ERROR 0x10U
|
||||
#define M25Q_FLAGS_VPP_ERROR 0x08U
|
||||
#define M25Q_FLAGS_PROGRAM_SUSPEND 0x04U
|
||||
#define M25Q_FLAGS_PROTECTION_ERROR 0x02U
|
||||
#define M25Q_FLAGS_RESERVED 0x01U
|
||||
#define M25Q_FLAGS_ALL_ERRORS (M25Q_FLAGS_ERASE_ERROR | \
|
||||
M25Q_FLAGS_PROGRAM_ERROR | \
|
||||
M25Q_FLAGS_VPP_ERROR | \
|
||||
M25Q_FLAGS_PROTECTION_ERROR)
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Number of dummy cycles for fast read (1..15).
|
||||
* @details This is the number of dummy cycles to be used for fast read
|
||||
* operations.
|
||||
*/
|
||||
#if !defined(M25Q_READ_DUMMY_CYCLES) || defined(__DOXYGEN__)
|
||||
#define M25Q_READ_DUMMY_CYCLES 8
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Switch QSPI bus width on initialization.
|
||||
* @details A bus width initialization is performed by writing the
|
||||
* Enhanced Volatile Configuration Register. If the flash
|
||||
* device is configured using the Non Volatile Configuration
|
||||
* Register then this option is not required.
|
||||
* @note This option is only valid in QSPI bus modes.
|
||||
*/
|
||||
#if !defined(M25Q_SWITCH_WIDTH) || defined(__DOXYGEN__)
|
||||
#define M25Q_SWITCH_WIDTH TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the flash waiting
|
||||
* routines releasing some extra CPU time for threads with lower
|
||||
* priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(M25Q_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define M25Q_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Uses 4kB sub-sectors rather than 64kB sectors.
|
||||
*/
|
||||
#if !defined(M25Q_USE_SUB_SECTORS) || defined(__DOXYGEN__)
|
||||
#define M25Q_USE_SUB_SECTORS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Supported JEDEC manufacturer identifiers.
|
||||
*/
|
||||
#if !defined(M25Q_SUPPORTED_MANUFACTURE_IDS) || defined(__DOXYGEN__)
|
||||
#define M25Q_SUPPORTED_MANUFACTURE_IDS {0x20}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Supported memory type identifiers.
|
||||
*/
|
||||
#if !defined(M25Q_SUPPORTED_MEMORY_TYPE_IDS) || defined(__DOXYGEN__)
|
||||
#define M25Q_SUPPORTED_MEMORY_TYPE_IDS {0xBA, 0xBB}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Size of the compare buffer.
|
||||
* @details This buffer is allocated in the stack frame of the function
|
||||
* @p flashVerifyErase() and its size must be a power of two.
|
||||
* Larger buffers lead to better verify performance but increase
|
||||
* stack usage for that function.
|
||||
*/
|
||||
#if !defined(M25Q_COMPARE_BUFFER_SIZE) || defined(__DOXYGEN__)
|
||||
#define M25Q_COMPARE_BUFFER_SIZE 32
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (M25Q_READ_DUMMY_CYCLES < 1) || (M25Q_READ_DUMMY_CYCLES > 15)
|
||||
#error "invalid M25Q_READ_DUMMY_CYCLES value (1..15)"
|
||||
#endif
|
||||
|
||||
#if (M25Q_COMPARE_BUFFER_SIZE & (M25Q_COMPARE_BUFFER_SIZE - 1)) != 0
|
||||
#error "invalid M25Q_COMPARE_BUFFER_SIZE value"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Type of a M25Q configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
_jesd216_config
|
||||
} M25QConfig;
|
||||
|
||||
/**
|
||||
* @brief @p M25Q specific methods.
|
||||
*/
|
||||
#define _m25q_methods \
|
||||
_jesd216_flash_methods
|
||||
|
||||
/**
|
||||
* @extends JESD216FlashVMT
|
||||
*
|
||||
* @brief @p M25Q virtual methods table.
|
||||
*/
|
||||
struct M25QDriverVMT {
|
||||
_m25q_methods
|
||||
};
|
||||
|
||||
/**
|
||||
* @extends JESD216Flash
|
||||
*
|
||||
* @brief Type of M25Q flash class.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief M25QDriver Virtual Methods Table.
|
||||
*/
|
||||
const struct M25QDriverVMT *vmt;
|
||||
_jesd216_flash_data
|
||||
/**
|
||||
* @brief Current configuration data.
|
||||
*/
|
||||
const M25QConfig *config;
|
||||
/**
|
||||
* @brief Device ID and unique ID.
|
||||
*/
|
||||
uint8_t device_id[20];
|
||||
} M25QDriver;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void m25qObjectInit(M25QDriver *devp);
|
||||
void m25qStart(M25QDriver *devp, const M25QConfig *config);
|
||||
void m25qStop(M25QDriver *devp);
|
||||
#if (JESD216_BUS_MODE != JESD216_BUS_MODE_SPI) || defined(__DOXYGEN__)
|
||||
#if (QSPI_SUPPORTS_MEMMAP == TRUE) || defined(__DOXYGEN__)
|
||||
void m25qMemoryMap(M25QDriver *devp, uint8_t ** addrp);
|
||||
void m25qMemoryUnmap(M25QDriver *devp);
|
||||
#endif /* QSPI_SUPPORTS_MEMMAP == TRUE */
|
||||
#endif /* JESD216_BUS_MODE != JESD216_BUS_MODE_SPI */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* M25Q_H */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -1,12 +0,0 @@
|
|||
# List of all the m25Q device files.
|
||||
M25QSRC := $(CHIBIOS)/os/hal/lib/peripherals/flash/hal_flash.c \
|
||||
$(CHIBIOS)/os/hal/lib/peripherals/flash/hal_jesd216_flash.c \
|
||||
$(CHIBIOS)/os/ex/Micron/m25q.c
|
||||
|
||||
# Required include directories
|
||||
M25QINC := $(CHIBIOS)/os/hal/lib/peripherals/flash \
|
||||
$(CHIBIOS)/os/ex/Micron
|
||||
|
||||
# Shared variables
|
||||
ALLCSRC += $(M25QSRC)
|
||||
ALLINC += $(M25QINC)
|
|
@ -1,26 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup QSPI QSPI Driver
|
||||
* @brief Generic QSPI Driver
|
||||
* @details This module defines an abstract interface for a Quad SPI
|
||||
* communication interface.
|
||||
* @pre In order to use the QSPI driver the @p HAL_USE_QSPI option
|
||||
* must be enabled in @p halconf.h.
|
||||
*
|
||||
* @ingroup HAL_NORMAL_DRIVERS
|
||||
*/
|
|
@ -53,9 +53,6 @@ endif
|
|||
ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),)
|
||||
HALSRC += $(CHIBIOS)/os/hal/src/hal_pwm.c
|
||||
endif
|
||||
ifneq ($(findstring HAL_USE_QSPI TRUE,$(HALCONF)),)
|
||||
HALSRC += $(CHIBIOS)/os/hal/src/hal_qspi.c
|
||||
endif
|
||||
ifneq ($(findstring HAL_USE_RTC TRUE,$(HALCONF)),)
|
||||
HALSRC += $(CHIBIOS)/os/hal/src/hal_rtc.c
|
||||
endif
|
||||
|
@ -107,7 +104,6 @@ HALSRC = $(CHIBIOS)/os/hal/src/hal.c \
|
|||
$(CHIBIOS)/os/hal/src/hal_mmc_spi.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_pal.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_pwm.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_qspi.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_rtc.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_sdc.c \
|
||||
$(CHIBIOS)/os/hal/src/hal_serial.c \
|
||||
|
|
|
@ -78,10 +78,6 @@
|
|||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
#if !defined(HAL_USE_QSPI)
|
||||
#define HAL_USE_QSPI FALSE
|
||||
#endif
|
||||
|
||||
#if !defined(HAL_USE_RTC)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
@ -150,7 +146,6 @@
|
|||
#include "hal_icu.h"
|
||||
#include "hal_mac.h"
|
||||
#include "hal_pwm.h"
|
||||
#include "hal_qspi.h"
|
||||
#include "hal_rtc.h"
|
||||
#include "hal_serial.h"
|
||||
#include "hal_sdc.h"
|
||||
|
|
|
@ -1,321 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file hal_qspi.h
|
||||
* @brief QSPI Driver macros and structures.
|
||||
*
|
||||
* @addtogroup QSPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef HAL_QSPI_H
|
||||
#define HAL_QSPI_H
|
||||
|
||||
#if (HAL_USE_QSPI == TRUE) || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Transfer options
|
||||
* @{
|
||||
*/
|
||||
#define QSPI_CFG_CMD_MASK (0xFFLU << 0LU)
|
||||
#define QSPI_CFG_CMD(n) ((n) << 0LU)
|
||||
#define QSPI_CFG_CMD_MODE_MASK (3LU << 8LU)
|
||||
#define QSPI_CFG_CMD_MODE_NONE (0LU << 8LU)
|
||||
#define QSPI_CFG_CMD_MODE_ONE_LINE (1LU << 8LU)
|
||||
#define QSPI_CFG_CMD_MODE_TWO_LINES (2LU << 8LU)
|
||||
#define QSPI_CFG_CMD_MODE_FOUR_LINES (3LU << 8LU)
|
||||
#define QSPI_CFG_ADDR_MODE_MASK (3LU << 10LU)
|
||||
#define QSPI_CFG_ADDR_MODE_NONE (0LU << 10LU)
|
||||
#define QSPI_CFG_ADDR_MODE_ONE_LINE (1LU << 10LU)
|
||||
#define QSPI_CFG_ADDR_MODE_TWO_LINES (2LU << 10LU)
|
||||
#define QSPI_CFG_ADDR_MODE_FOUR_LINES (3LU << 10LU)
|
||||
#define QSPI_CFG_ADDR_SIZE_MASK (3LU << 12LU)
|
||||
#define QSPI_CFG_ADDR_SIZE_8 (0LU << 12LU)
|
||||
#define QSPI_CFG_ADDR_SIZE_16 (1LU << 12LU)
|
||||
#define QSPI_CFG_ADDR_SIZE_24 (2LU << 12LU)
|
||||
#define QSPI_CFG_ADDR_SIZE_32 (3LU << 12LU)
|
||||
#define QSPI_CFG_ALT_MODE_MASK (3LU << 14LU)
|
||||
#define QSPI_CFG_ALT_MODE_NONE (0LU << 14LU)
|
||||
#define QSPI_CFG_ALT_MODE_ONE_LINE (1LU << 14LU)
|
||||
#define QSPI_CFG_ALT_MODE_TWO_LINES (2LU << 14LU)
|
||||
#define QSPI_CFG_ALT_MODE_FOUR_LINES (3LU << 14LU)
|
||||
#define QSPI_CFG_ALT_SIZE_MASK (3LU << 16LU)
|
||||
#define QSPI_CFG_ALT_SIZE_8 (0LU << 16LU)
|
||||
|
||||
#define QSPI_CFG_ALT_SIZE_16 (1LU << 16LU)
|
||||
#define QSPI_CFG_ALT_SIZE_24 (2LU << 16LU)
|
||||
#define QSPI_CFG_ALT_SIZE_32 (3LU << 16LU)
|
||||
#define QSPI_CFG_DUMMY_CYCLES_MASK (0x1FLU << 18LU)
|
||||
#define QSPI_CFG_DUMMY_CYCLES(n) ((n) << 18LU)
|
||||
#define QSPI_CFG_DATA_MODE_MASK (3LU << 24LU)
|
||||
#define QSPI_CFG_DATA_MODE_NONE (0LU << 24LU)
|
||||
#define QSPI_CFG_DATA_MODE_ONE_LINE (1LU << 24LU)
|
||||
#define QSPI_CFG_DATA_MODE_TWO_LINES (2LU << 24LU)
|
||||
#define QSPI_CFG_DATA_MODE_FOUR_LINES (3LU << 24LU)
|
||||
#define QSPI_CFG_SIOO (1LU << 28LU)
|
||||
#define QSPI_CFG_DDRM (1LU << 31LU)
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name QSPI configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(QSPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define QSPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p qspiAcquireBus() and @p qspiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(QSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define QSPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Driver state machine possible states.
|
||||
*/
|
||||
typedef enum {
|
||||
QSPI_UNINIT = 0, /**< Not initialized. */
|
||||
QSPI_STOP = 1, /**< Stopped. */
|
||||
QSPI_READY = 2, /**< Ready. */
|
||||
QSPI_ACTIVE = 3, /**< Exchanging data. */
|
||||
QSPI_COMPLETE = 4, /**< Asynchronous operation complete. */
|
||||
QSPI_MEMMAP = 5 /**< In memory mapped mode. */
|
||||
} qspistate_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a QSPI command descriptor.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t cfg;
|
||||
uint32_t addr;
|
||||
uint32_t alt;
|
||||
} qspi_command_t;
|
||||
|
||||
#include "hal_qspi_lld.h"
|
||||
|
||||
#if !defined(QSPI_SUPPORTS_MEMMAP)
|
||||
#error "low level does not define QSPI_SUPPORTS_MEMMAP"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Macro Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Sends a command without data phase.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
*
|
||||
* @iclass
|
||||
*/
|
||||
#define qspiStartCommandI(qspip, cmdp) { \
|
||||
osalDbgAssert(((cmdp)->cfg & QSPI_CFG_DATA_MODE_MASK) == \
|
||||
QSPI_CFG_DATA_MODE_NONE, \
|
||||
"data mode specified"); \
|
||||
(qspip)->state = QSPI_ACTIVE; \
|
||||
qspi_lld_command(qspip, cmdp); \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends data over the QSPI bus.
|
||||
* @details This asynchronous function starts a transmit operation.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[in] n number of bytes to send or zero if no data phase
|
||||
* @param[in] txbuf the pointer to the transmit buffer
|
||||
*
|
||||
* @iclass
|
||||
*/
|
||||
#define qspiStartSendI(qspip, cmdp, n, txbuf) { \
|
||||
osalDbgAssert(((cmdp)->cfg & QSPI_CFG_DATA_MODE_MASK) != \
|
||||
QSPI_CFG_DATA_MODE_NONE, \
|
||||
"data mode required"); \
|
||||
(qspip)->state = QSPI_ACTIVE; \
|
||||
qspi_lld_send(qspip, cmdp, n, txbuf); \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receives data from the QSPI bus.
|
||||
* @details This asynchronous function starts a receive operation.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[in] n number of bytes to receive or zero if no data phase
|
||||
* @param[out] rxbuf the pointer to the receive buffer
|
||||
*
|
||||
* @iclass
|
||||
*/
|
||||
#define qspiStartReceiveI(qspip, cmdp, n, rxbuf) { \
|
||||
osalDbgAssert(((cmdp)->cfg & QSPI_CFG_DATA_MODE_MASK) != \
|
||||
QSPI_CFG_DATA_MODE_NONE, \
|
||||
"data mode required"); \
|
||||
(qspip)->state = QSPI_ACTIVE; \
|
||||
qspi_lld_receive(qspip, cmdp, n, rxbuf); \
|
||||
}
|
||||
|
||||
#if (QSPI_SUPPORTS_MEMMAP == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Maps in memory space a QSPI flash device.
|
||||
* @pre The memory flash device must be initialized appropriately
|
||||
* before mapping it in memory space.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[out] addrp pointer to the memory start address of the mapped
|
||||
* flash or @p NULL
|
||||
*
|
||||
* @iclass
|
||||
*/
|
||||
#define qspiMapFlashI(qspip, cmdp, addrp) \
|
||||
qspi_lld_map_flash(qspip, cmdp, addrp)
|
||||
|
||||
/**
|
||||
* @brief Maps in memory space a QSPI flash device.
|
||||
* @post The memory flash device must be re-initialized for normal
|
||||
* commands exchange.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @iclass
|
||||
*/
|
||||
#define qspiUnmapFlashI(qspip) \
|
||||
qspi_lld_unmap_flash(qspip)
|
||||
#endif /* QSPI_SUPPORTS_MEMMAP == TRUE */
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Low level driver helper macros
|
||||
* @{
|
||||
*/
|
||||
#if (QSPI_USE_WAIT == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Wakes up the waiting thread.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define _qspi_wakeup_isr(qspip) { \
|
||||
osalSysLockFromISR(); \
|
||||
osalThreadResumeI(&(qspip)->thread, MSG_OK); \
|
||||
osalSysUnlockFromISR(); \
|
||||
}
|
||||
#else /* !QSPI_USE_WAIT */
|
||||
#define _qspi_wakeup_isr(qspip)
|
||||
#endif /* !QSPI_USE_WAIT */
|
||||
|
||||
/**
|
||||
* @brief Common ISR code.
|
||||
* @details This code handles the portable part of the ISR code:
|
||||
* - Callback invocation.
|
||||
* - Waiting thread wakeup, if any.
|
||||
* - Driver state transitions.
|
||||
* .
|
||||
* @note This macro is meant to be used in the low level drivers
|
||||
* implementation only.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define _qspi_isr_code(qspip) { \
|
||||
if ((qspip)->config->end_cb) { \
|
||||
(qspip)->state = QSPI_COMPLETE; \
|
||||
(qspip)->config->end_cb(qspip); \
|
||||
if ((qspip)->state == QSPI_COMPLETE) \
|
||||
(qspip)->state = QSPI_READY; \
|
||||
} \
|
||||
else \
|
||||
(qspip)->state = QSPI_READY; \
|
||||
_qspi_wakeup_isr(qspip); \
|
||||
}
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void qspiInit(void);
|
||||
void qspiObjectInit(QSPIDriver *qspip);
|
||||
void qspiStart(QSPIDriver *qspip, const QSPIConfig *config);
|
||||
void qspiStop(QSPIDriver *qspip);
|
||||
void qspiStartCommand(QSPIDriver *qspip, const qspi_command_t *cmdp);
|
||||
void qspiStartSend(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, const uint8_t *txbuf);
|
||||
void qspiStartReceive(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, uint8_t *rxbuf);
|
||||
#if QSPI_USE_WAIT == TRUE
|
||||
void qspiCommand(QSPIDriver *qspip, const qspi_command_t *cmdp);
|
||||
void qspiSend(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, const uint8_t *txbuf);
|
||||
void qspiReceive(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, uint8_t *rxbuf);
|
||||
#endif
|
||||
#if QSPI_SUPPORTS_MEMMAP == TRUE
|
||||
void qspiMapFlash(QSPIDriver *qspip,
|
||||
const qspi_command_t *cmdp,
|
||||
uint8_t **addrp);
|
||||
void qspiUnmapFlash(QSPIDriver *qspip);
|
||||
#endif
|
||||
#if QSPI_USE_MUTUAL_EXCLUSION == TRUE
|
||||
void qspiAcquireBus(QSPIDriver *qspip);
|
||||
void qspiReleaseBus(QSPIDriver *qspip);
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_QSPI == TRUE */
|
||||
|
||||
#endif /* HAL_QSPI_H */
|
||||
|
||||
/** @} */
|
|
@ -1,368 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file hal_jesd216_flash.c
|
||||
* @brief JESD216 compliant flash driver class code.
|
||||
*
|
||||
* @addtogroup HAL_JESD216_FLASH
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#include "hal_jesd216_flash.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
void jesd216_start(BUSDriver *busp, const BUSConfig *config) {
|
||||
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_SPI
|
||||
spiStart(busp, config);
|
||||
#else
|
||||
qspiStart(busp, config);
|
||||
#endif
|
||||
}
|
||||
|
||||
void jesd216_stop(BUSDriver *busp) {
|
||||
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_SPI
|
||||
spiStop(busp);
|
||||
#else
|
||||
qspiStop(busp);
|
||||
#endif
|
||||
}
|
||||
|
||||
void jesd216_cmd(BUSDriver *busp, uint32_t cmd) {
|
||||
#if JESD216_BUS_MODE != JESD216_BUS_MODE_SPI
|
||||
qspi_command_t mode;
|
||||
|
||||
mode.cfg = QSPI_CFG_CMD(cmd) |
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
|
||||
QSPI_CFG_CMD_MODE_ONE_LINE;
|
||||
#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
|
||||
QSPI_CFG_CMD_MODE_TWO_LINES;
|
||||
#else
|
||||
QSPI_CFG_CMD_MODE_FOUR_LINES;
|
||||
#endif
|
||||
mode.addr = 0U;
|
||||
mode.alt = 0U;
|
||||
qspiCommand(busp, &mode);
|
||||
#else
|
||||
uint8_t buf[1];
|
||||
|
||||
spiSelect(busp);
|
||||
buf[0] = cmd;
|
||||
spiSend(busp, 1, buf);
|
||||
spiUnselect(busp);
|
||||
#endif
|
||||
}
|
||||
|
||||
void jesd216_cmd_receive(BUSDriver *busp,
|
||||
uint32_t cmd,
|
||||
size_t n,
|
||||
uint8_t *p) {
|
||||
#if JESD216_BUS_MODE != JESD216_BUS_MODE_SPI
|
||||
qspi_command_t mode;
|
||||
|
||||
mode.cfg = QSPI_CFG_CMD(cmd) |
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
|
||||
QSPI_CFG_CMD_MODE_ONE_LINE |
|
||||
QSPI_CFG_DATA_MODE_ONE_LINE;
|
||||
#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
|
||||
QSPI_CFG_CMD_MODE_TWO_LINES |
|
||||
QSPI_CFG_DATA_MODE_TWO_LINES;
|
||||
#else
|
||||
QSPI_CFG_CMD_MODE_FOUR_LINES |
|
||||
QSPI_CFG_DATA_MODE_FOUR_LINES;
|
||||
|
||||
#endif
|
||||
mode.addr = 0U;
|
||||
mode.alt = 0U;
|
||||
qspiReceive(busp, &mode, n, p);
|
||||
#else
|
||||
uint8_t buf[1];
|
||||
|
||||
spiSelect(busp);
|
||||
buf[0] = cmd;
|
||||
spiSend(busp, 1, buf);
|
||||
spiReceive(busp, n, p);
|
||||
spiUnselect(busp);
|
||||
#endif
|
||||
}
|
||||
|
||||
void jesd216_cmd_send(BUSDriver *busp,
|
||||
uint32_t cmd,
|
||||
size_t n,
|
||||
const uint8_t *p) {
|
||||
#if JESD216_BUS_MODE != JESD216_BUS_MODE_SPI
|
||||
qspi_command_t mode;
|
||||
|
||||
mode.cfg = QSPI_CFG_CMD(cmd) |
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
|
||||
QSPI_CFG_CMD_MODE_ONE_LINE |
|
||||
QSPI_CFG_DATA_MODE_ONE_LINE;
|
||||
#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
|
||||
QSPI_CFG_CMD_MODE_TWO_LINES |
|
||||
QSPI_CFG_DATA_MODE_TWO_LINES;
|
||||
#else
|
||||
QSPI_CFG_CMD_MODE_FOUR_LINES |
|
||||
QSPI_CFG_DATA_MODE_FOUR_LINES;
|
||||
|
||||
#endif
|
||||
mode.addr = 0U;
|
||||
mode.alt = 0U;
|
||||
qspiSend(busp, &mode, n, p);
|
||||
#else
|
||||
uint8_t buf[1];
|
||||
|
||||
spiSelect(busp);
|
||||
buf[0] = cmd;
|
||||
spiSend(busp, 1, buf);
|
||||
spiSend(busp, n, p);
|
||||
spiUnselect(busp);
|
||||
#endif
|
||||
}
|
||||
|
||||
void jesd216_cmd_addr(BUSDriver *busp,
|
||||
uint32_t cmd,
|
||||
flash_offset_t offset) {
|
||||
#if JESD216_BUS_MODE != JESD216_BUS_MODE_SPI
|
||||
qspi_command_t mode;
|
||||
|
||||
mode.cfg = QSPI_CFG_CMD(cmd) |
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
|
||||
QSPI_CFG_CMD_MODE_ONE_LINE |
|
||||
QSPI_CFG_ADDR_MODE_ONE_LINE |
|
||||
QSPI_CFG_ADDR_SIZE_24;
|
||||
#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
|
||||
QSPI_CFG_CMD_MODE_TWO_LINES |
|
||||
QSPI_CFG_ADDR_MODE_TWO_LINES |
|
||||
QSPI_CFG_ADDR_SIZE_24;
|
||||
#else
|
||||
QSPI_CFG_CMD_MODE_FOUR_LINES |
|
||||
QSPI_CFG_ADDR_MODE_FOUR_LINES |
|
||||
QSPI_CFG_ADDR_SIZE_24;
|
||||
|
||||
#endif
|
||||
mode.addr = offset;
|
||||
mode.alt = 0U;
|
||||
qspiCommand(busp, &mode);
|
||||
#else
|
||||
uint8_t buf[4];
|
||||
|
||||
spiSelect(busp);
|
||||
buf[0] = cmd;
|
||||
buf[1] = (uint8_t)(offset >> 16);
|
||||
buf[2] = (uint8_t)(offset >> 8);
|
||||
buf[3] = (uint8_t)(offset >> 0);
|
||||
spiSend(busp, 4, buf);
|
||||
spiUnselect(busp);
|
||||
#endif
|
||||
}
|
||||
|
||||
void jesd216_cmd_addr_send(BUSDriver *busp,
|
||||
uint32_t cmd,
|
||||
flash_offset_t offset,
|
||||
size_t n,
|
||||
const uint8_t *p) {
|
||||
#if JESD216_BUS_MODE != JESD216_BUS_MODE_SPI
|
||||
qspi_command_t mode;
|
||||
|
||||
mode.cfg = QSPI_CFG_CMD(cmd & 0xFFU) |
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
|
||||
QSPI_CFG_CMD_MODE_ONE_LINE |
|
||||
QSPI_CFG_ADDR_MODE_ONE_LINE |
|
||||
QSPI_CFG_DATA_MODE_ONE_LINE;
|
||||
#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
|
||||
QSPI_CFG_CMD_MODE_TWO_LINES |
|
||||
QSPI_CFG_ADDR_MODE_TWO_LINES |
|
||||
QSPI_CFG_DATA_MODE_TWO_LINES;
|
||||
#else
|
||||
QSPI_CFG_CMD_MODE_FOUR_LINES |
|
||||
QSPI_CFG_ADDR_MODE_FOUR_LINES |
|
||||
QSPI_CFG_DATA_MODE_FOUR_LINES;
|
||||
#endif
|
||||
|
||||
/* Handling 32 bits addressing.*/
|
||||
if ((cmd & JESD216_CMD_EXTENDED_ADDRESSING) == 0) {
|
||||
mode .cfg |= QSPI_CFG_ADDR_SIZE_24;
|
||||
}
|
||||
else {
|
||||
mode .cfg |= QSPI_CFG_ADDR_SIZE_32;
|
||||
}
|
||||
|
||||
mode.addr = offset;
|
||||
mode.alt = 0U;
|
||||
qspiSend(busp, &mode, n, p);
|
||||
#else
|
||||
uint8_t buf[4];
|
||||
|
||||
spiSelect(busp);
|
||||
buf[0] = cmd;
|
||||
buf[1] = (uint8_t)(offset >> 16);
|
||||
buf[2] = (uint8_t)(offset >> 8);
|
||||
buf[3] = (uint8_t)(offset >> 0);
|
||||
spiSend(busp, 4, buf);
|
||||
spiSend(busp, n, p);
|
||||
spiUnselect(busp);
|
||||
#endif
|
||||
}
|
||||
|
||||
void jesd216_cmd_addr_receive(BUSDriver *busp,
|
||||
uint32_t cmd,
|
||||
flash_offset_t offset,
|
||||
size_t n,
|
||||
uint8_t *p) {
|
||||
#if JESD216_BUS_MODE != JESD216_BUS_MODE_SPI
|
||||
qspi_command_t mode;
|
||||
|
||||
mode.cfg = QSPI_CFG_CMD(cmd & 0xFFU) |
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
|
||||
QSPI_CFG_CMD_MODE_ONE_LINE |
|
||||
QSPI_CFG_ADDR_MODE_ONE_LINE |
|
||||
QSPI_CFG_DATA_MODE_ONE_LINE;
|
||||
#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
|
||||
QSPI_CFG_CMD_MODE_TWO_LINES |
|
||||
QSPI_CFG_ADDR_MODE_TWO_LINES |
|
||||
QSPI_CFG_ADDR_SIZE_24 |
|
||||
QSPI_CFG_DATA_MODE_TWO_LINES;
|
||||
#else
|
||||
QSPI_CFG_CMD_MODE_FOUR_LINES |
|
||||
QSPI_CFG_ADDR_MODE_FOUR_LINES |
|
||||
QSPI_CFG_DATA_MODE_FOUR_LINES;
|
||||
#endif
|
||||
|
||||
/* Handling 32 bits addressing.*/
|
||||
if ((cmd & JESD216_CMD_EXTENDED_ADDRESSING) == 0) {
|
||||
mode .cfg |= QSPI_CFG_ADDR_SIZE_24;
|
||||
}
|
||||
else {
|
||||
mode .cfg |= QSPI_CFG_ADDR_SIZE_32;
|
||||
}
|
||||
|
||||
mode.addr = offset;
|
||||
mode.alt = 0U;
|
||||
qspiReceive(busp, &mode, n, p);
|
||||
#else
|
||||
uint8_t buf[4];
|
||||
|
||||
spiSelect(busp);
|
||||
buf[0] = cmd;
|
||||
buf[1] = (uint8_t)(offset >> 16);
|
||||
buf[2] = (uint8_t)(offset >> 8);
|
||||
buf[3] = (uint8_t)(offset >> 0);
|
||||
spiSend(busp, 4, buf);
|
||||
spiReceive(busp, n, p);
|
||||
spiUnselect(busp);
|
||||
#endif
|
||||
}
|
||||
|
||||
#if (JESD216_BUS_MODE != JESD216_BUS_MODE_SPI) || defined(__DOXYGEN__)
|
||||
void jesd216_cmd_addr_dummy_receive(BUSDriver *busp,
|
||||
uint32_t cmd,
|
||||
flash_offset_t offset,
|
||||
uint8_t dummy,
|
||||
size_t n,
|
||||
uint8_t *p) {
|
||||
qspi_command_t mode;
|
||||
|
||||
mode.cfg = QSPI_CFG_CMD(cmd & 0xFFU) |
|
||||
#if JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI1L
|
||||
QSPI_CFG_CMD_MODE_ONE_LINE |
|
||||
QSPI_CFG_ADDR_MODE_ONE_LINE |
|
||||
QSPI_CFG_DUMMY_CYCLES(dummy) |
|
||||
QSPI_CFG_DATA_MODE_ONE_LINE;
|
||||
#elif JESD216_BUS_MODE == JESD216_BUS_MODE_QSPI2L
|
||||
QSPI_CFG_CMD_MODE_TWO_LINES |
|
||||
QSPI_CFG_ADDR_MODE_TWO_LINES |
|
||||
QSPI_CFG_DUMMY_CYCLES(dummy) |
|
||||
QSPI_CFG_DATA_MODE_TWO_LINES;
|
||||
#else
|
||||
QSPI_CFG_CMD_MODE_FOUR_LINES |
|
||||
QSPI_CFG_ADDR_MODE_FOUR_LINES |
|
||||
QSPI_CFG_DUMMY_CYCLES(dummy) |
|
||||
QSPI_CFG_DATA_MODE_FOUR_LINES;
|
||||
#endif
|
||||
|
||||
/* Handling 32 bits addressing.*/
|
||||
if ((cmd & JESD216_CMD_EXTENDED_ADDRESSING) == 0) {
|
||||
mode .cfg |= QSPI_CFG_ADDR_SIZE_24;
|
||||
}
|
||||
else {
|
||||
mode .cfg |= QSPI_CFG_ADDR_SIZE_32;
|
||||
}
|
||||
|
||||
mode.addr = offset;
|
||||
mode.alt = 0U;
|
||||
qspiReceive(busp, &mode, n, p);
|
||||
}
|
||||
#endif /* JESD216_BUS_MODE != JESD216_BUS_MODE_SPI */
|
||||
|
||||
#if ((JESD216_BUS_MODE != JESD216_BUS_MODE_SPI) && \
|
||||
(JESD216_SHARED_BUS == TRUE)) || defined(__DOXYGEN__)
|
||||
void jesd216_bus_acquire(BUSDriver *busp, const BUSConfig *config) {
|
||||
|
||||
(void)config;
|
||||
|
||||
qspiAcquireBus(busp);
|
||||
if (busp->config != config) {
|
||||
qspiStart(busp, config);
|
||||
}
|
||||
}
|
||||
|
||||
void jesd216_bus_release(BUSDriver *busp) {
|
||||
|
||||
qspiReleaseBus(busp);
|
||||
}
|
||||
#elif (JESD216_BUS_MODE == JESD216_BUS_MODE_SPI) && \
|
||||
(JESD216_SHARED_BUS == TRUE)
|
||||
void jesd216_bus_acquire(BUSDriver *busp, const BUSConfig *config) {
|
||||
|
||||
spiAcquireBus(busp);
|
||||
if (busp->config != config) {
|
||||
spiStart(busp, config);
|
||||
}
|
||||
}
|
||||
|
||||
void jesd216_bus_release(BUSDriver *busp) {
|
||||
|
||||
spiReleaseBus(busp);
|
||||
}
|
||||
#else
|
||||
#define jesd216_bus_acquire(busp)
|
||||
#define jesd216_bus_release(busp)
|
||||
#endif
|
||||
|
||||
/** @} */
|
|
@ -1,221 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file hal_jesd216_flash.h
|
||||
* @brief JESD216 compliant flash driver class header.
|
||||
*
|
||||
* @addtogroup HAL_JESD216_FLASH
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef HAL_JESD216_FLASH_H
|
||||
#define HAL_JESD216_FLASH_H
|
||||
|
||||
#include "hal_flash.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Common command codes
|
||||
* @{
|
||||
*/
|
||||
#define JESD216_CMD_READ_ID 0x9FU
|
||||
#define JESD216_CMD_READ 0x03U
|
||||
#define JESD216_CMD_WRITE_ENABLE 0x06U
|
||||
#define JESD216_CMD_WRITE_DISABLE 0x04U
|
||||
#define JESD216_CMD_READ_STATUS_REGISTER 0x05U
|
||||
#define JESD216_CMD_WRITE_STATUS_REGISTER 0x01U
|
||||
#define JESD216_CMD_PAGE_PROGRAM 0x02U
|
||||
#define JESD216_CMD_ERASE_4K 0x20U
|
||||
#define JESD216_CMD_ERASE_BULK 0xC7U
|
||||
#define JESD216_CMD_PROGRAM_ERASE_RESUME 0x7AU
|
||||
#define JESD216_CMD_PROGRAM_ERASE_SUSPEND 0x75U
|
||||
#define JESD216_CMD_READ_OTP_ARRAY 0x4BU
|
||||
#define JESD216_CMD_PROGRAM_OTP_ARRAY 0x42U
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Command options
|
||||
* @{
|
||||
*/
|
||||
#define JESD216_CMD_EXTENDED_ADDRESSING 0x80000000U
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Bus interface.
|
||||
* @{
|
||||
*/
|
||||
#define JESD216_BUS_MODE_SPI 0U
|
||||
#define JESD216_BUS_MODE_QSPI1L 1U
|
||||
#define JESD216_BUS_MODE_QSPI2L 2U
|
||||
#define JESD216_BUS_MODE_QSPI4L 4U
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Physical transport interface.
|
||||
*/
|
||||
#if !defined(JESD216_BUS_MODE) || defined(__DOXYGEN__)
|
||||
#define JESD216_BUS_MODE JESD216_BUS_MODE_QSPI4L
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Shared bus switch.
|
||||
* @details If set to @p TRUE the device acquires bus ownership
|
||||
* on each transaction.
|
||||
* @note Requires @p SPI_USE_MUTUAL_EXCLUSION or
|
||||
* @p SPI_USE_MUTUAL_EXCLUSION.
|
||||
*/
|
||||
#if !defined(JESD216_SHARED_BUS) || defined(__DOXYGEN__)
|
||||
#define JESD216_SHARED_BUS TRUE
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (JESD216_BUS_MODE == JESD216_BUS_MODE_SPI) && (HAL_USE_SPI == FALSE)
|
||||
#error "JESD216_BUS_MODE_SPI requires HAL_USE_SPI"
|
||||
#endif
|
||||
|
||||
#if (JESD216_BUS_MODE != JESD216_BUS_MODE_SPI) && (HAL_USE_QSPI == FALSE)
|
||||
#error "JESD216_BUS_MODE_QSPIxL requires HAL_USE_QSPI"
|
||||
#endif
|
||||
|
||||
#if (JESD216_BUS_MODE == JESD216_BUS_MODE_SPI) && \
|
||||
(JESD216_SHARED_BUS == TRUE) && \
|
||||
(SPI_USE_MUTUAL_EXCLUSION == FALSE)
|
||||
#error "JESD216_SHARED_SPI requires SPI_USE_MUTUAL_EXCLUSION"
|
||||
#endif
|
||||
|
||||
#if (JESD216_BUS_MODE != JESD216_BUS_MODE_SPI) && \
|
||||
(JESD216_BUS_MODE != JESD216_BUS_MODE_QSPI1L) && \
|
||||
(JESD216_BUS_MODE != JESD216_BUS_MODE_QSPI2L) && \
|
||||
(JESD216_BUS_MODE != JESD216_BUS_MODE_QSPI4L)
|
||||
#error "invalid JESD216_BUS_MODE selected"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (JESD216_BUS_MODE != JESD216_BUS_MODE_SPI) || defined(__DOXYGEN__)
|
||||
#define BUSConfig QSPIConfig
|
||||
#define BUSDriver QSPIDriver
|
||||
#else
|
||||
#define BUSConfig SPIConfig
|
||||
#define BUSDriver SPIDriver
|
||||
#endif
|
||||
|
||||
#define _jesd216_config \
|
||||
BUSDriver *busp; \
|
||||
const BUSConfig *buscfg;
|
||||
|
||||
/**
|
||||
* @brief @p JESD215Flash specific methods.
|
||||
*/
|
||||
#define _jesd216_flash_methods_alone \
|
||||
/* Read SFDP.*/ \
|
||||
flash_error_t (*read_sfdp)(void *instance, \
|
||||
flash_offset_t offset, \
|
||||
size_t n, \
|
||||
uint8_t *rp);
|
||||
|
||||
/**
|
||||
* @brief @p JESD215Flash specific methods with inherited ones.
|
||||
*/
|
||||
#define _jesd216_flash_methods \
|
||||
_base_flash_methods \
|
||||
_jesd216_flash_methods_alone
|
||||
|
||||
/**
|
||||
* @brief @p JESD215Flash virtual methods table.
|
||||
*/
|
||||
struct JESD215FlashVMT {
|
||||
_jesd216_flash_methods
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief @p JESD215Flash specific data.
|
||||
*/
|
||||
#define _jesd216_flash_data \
|
||||
_base_flash_data
|
||||
|
||||
/**
|
||||
* @brief Base flash class.
|
||||
*/
|
||||
typedef struct {
|
||||
/** @brief Virtual Methods Table.*/
|
||||
const struct JESD215FlashVMT *vmt;
|
||||
_jesd216_flash_data
|
||||
} JESD215Flash;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Macro Functions (BaseFlash)
|
||||
* @{
|
||||
*/
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void jesd216_start(BUSDriver *busp, const BUSConfig *config);
|
||||
void jesd216_stop(BUSDriver *busp);
|
||||
void jesd216_cmd(BUSDriver *busp, uint32_t cmd);
|
||||
void jesd216_cmd_receive(BUSDriver *busp, uint32_t cmd,
|
||||
size_t n, uint8_t *p);
|
||||
void jesd216_cmd_send(BUSDriver *busp, uint32_t cmd,
|
||||
size_t n, const uint8_t *p);
|
||||
void jesd216_cmd_addr(BUSDriver *busp, uint32_t cmd, flash_offset_t offset);
|
||||
void jesd216_cmd_addr_send(BUSDriver *busp, uint32_t cmd,
|
||||
flash_offset_t offset, size_t n, const uint8_t *p);
|
||||
void jesd216_cmd_addr_receive(BUSDriver *busp, uint32_t cmd,
|
||||
flash_offset_t offset, size_t n, uint8_t *p);
|
||||
#if JESD216_BUS_MODE != JESD216_BUS_MODE_SPI
|
||||
void jesd216_cmd_addr_dummy_receive(BUSDriver *busp, uint32_t cmd,
|
||||
flash_offset_t offset, uint8_t dummy,
|
||||
size_t n, uint8_t *p);
|
||||
#endif /* JESD216_BUS_MODE != JESD216_BUS_MODE_SPI */
|
||||
#if JESD216_SHARED_BUS == TRUE
|
||||
void jesd216_bus_acquire(BUSDriver *busp, const BUSConfig *config);
|
||||
void jesd216_bus_release(BUSDriver *busp);
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_JESD216_FLASH_H */
|
||||
|
||||
/** @} */
|
|
@ -1,12 +1,8 @@
|
|||
ifeq ($(USE_SMART_BUILD),yes)
|
||||
ifneq ($(findstring HAL_USE_QSPI TRUE,$(HALCONF)),)
|
||||
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c
|
||||
endif
|
||||
ifneq ($(findstring HAL_USE_WSPI TRUE,$(HALCONF)),)
|
||||
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.c
|
||||
endif
|
||||
else
|
||||
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c
|
||||
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/hal_wspi_lld.c
|
||||
endif
|
||||
|
||||
|
|
|
@ -1,352 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file QUADSPIv1/hal_qspi_lld.c
|
||||
* @brief STM32 QSPI subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup QSPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_QSPI || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define QUADSPI1_DMA_CHANNEL \
|
||||
STM32_DMA_GETCHANNEL(STM32_QSPI_QUADSPI1_DMA_STREAM, \
|
||||
STM32_QUADSPI1_DMA_CHN)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @brief QUADSPI1 driver identifier.*/
|
||||
#if STM32_QSPI_USE_QUADSPI1 || defined(__DOXYGEN__)
|
||||
QSPIDriver QSPID1;
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Shared service routine.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] flags pre-shifted content of the ISR register
|
||||
*/
|
||||
static void qspi_lld_serve_dma_interrupt(QSPIDriver *qspip, uint32_t flags) {
|
||||
|
||||
(void)qspip;
|
||||
(void)flags;
|
||||
|
||||
/* DMA errors handling.*/
|
||||
#if defined(STM32_QSPI_DMA_ERROR_HOOK)
|
||||
if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0) {
|
||||
STM32_QSPI_DMA_ERROR_HOOK(qspip);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Shared service routine.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*/
|
||||
static void qspi_lld_serve_interrupt(QSPIDriver *qspip) {
|
||||
|
||||
/* Portable QSPI ISR code defined in the high level driver, note, it is
|
||||
a macro.*/
|
||||
_qspi_isr_code(qspip);
|
||||
|
||||
/* Stop everything, we need to give DMA enough time to complete the ongoing
|
||||
operation. Race condition hidden here.*/
|
||||
while (dmaStreamGetTransactionSize(qspip->dma) > 0U)
|
||||
;
|
||||
dmaStreamDisable(qspip->dma);
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if STM32_QSPI_USE_QUADSPI1 || defined(__DOXYGEN__)
|
||||
#if !defined(STM32_QUADSPI1_SUPPRESS_ISR)
|
||||
#if !defined(STM32_QUADSPI1_HANDLER)
|
||||
#error "STM32_QUADSPI1_HANDLER not defined"
|
||||
#endif
|
||||
/**
|
||||
* @brief STM32_QUADSPI1_HANDLER interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(STM32_QUADSPI1_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
QUADSPI->FCR = QUADSPI_FCR_CTEF | QUADSPI_FCR_CTCF |
|
||||
QUADSPI_FCR_CSMF | QUADSPI_FCR_CTOF;
|
||||
|
||||
qspi_lld_serve_interrupt(&QSPID1);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* !defined(STM32_QUADSPI1_SUPPRESS_ISR) */
|
||||
#endif /* STM32_QSPI_USE_QUADSPI1 */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level QSPI driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_init(void) {
|
||||
|
||||
#if STM32_QSPI_USE_QUADSPI1
|
||||
qspiObjectInit(&QSPID1);
|
||||
QSPID1.qspi = QUADSPI;
|
||||
QSPID1.dma = STM32_DMA_STREAM(STM32_QSPI_QUADSPI1_DMA_STREAM);
|
||||
QSPID1.dmamode = STM32_DMA_CR_CHSEL(QUADSPI1_DMA_CHANNEL) |
|
||||
STM32_DMA_CR_PL(STM32_QSPI_QUADSPI1_DMA_PRIORITY) |
|
||||
STM32_DMA_CR_PSIZE_BYTE |
|
||||
STM32_DMA_CR_MSIZE_BYTE |
|
||||
STM32_DMA_CR_MINC |
|
||||
STM32_DMA_CR_DMEIE |
|
||||
STM32_DMA_CR_TEIE;
|
||||
nvicEnableVector(STM32_QUADSPI1_NUMBER, STM32_QSPI_QUADSPI1_IRQ_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and activates the QSPI peripheral.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_start(QSPIDriver *qspip) {
|
||||
|
||||
/* If in stopped state then full initialization.*/
|
||||
if (qspip->state == QSPI_STOP) {
|
||||
#if STM32_QSPI_USE_QUADSPI1
|
||||
if (&QSPID1 == qspip) {
|
||||
bool b = dmaStreamAllocate(qspip->dma,
|
||||
STM32_QSPI_QUADSPI1_DMA_IRQ_PRIORITY,
|
||||
(stm32_dmaisr_t)qspi_lld_serve_dma_interrupt,
|
||||
(void *)qspip);
|
||||
osalDbgAssert(!b, "stream already allocated");
|
||||
rccEnableQUADSPI1(true);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Common initializations.*/
|
||||
dmaStreamSetPeripheral(qspip->dma, &qspip->qspi->DR);
|
||||
}
|
||||
|
||||
/* QSPI setup and enable.*/
|
||||
qspip->qspi->DCR = qspip->config->dcr;
|
||||
qspip->qspi->CR = ((STM32_QSPI_QUADSPI1_PRESCALER_VALUE - 1U) << 24U) |
|
||||
QUADSPI_CR_TCIE | QUADSPI_CR_DMAEN | QUADSPI_CR_EN;
|
||||
qspip->qspi->FCR = QUADSPI_FCR_CTEF | QUADSPI_FCR_CTCF |
|
||||
QUADSPI_FCR_CSMF | QUADSPI_FCR_CTOF;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the QSPI peripheral.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_stop(QSPIDriver *qspip) {
|
||||
|
||||
/* If in ready state then disables the QUADSPI clock.*/
|
||||
if (qspip->state == QSPI_READY) {
|
||||
|
||||
/* QSPI disable.*/
|
||||
qspip->qspi->CR = 0U;
|
||||
|
||||
/* Releasing the DMA.*/
|
||||
dmaStreamRelease(qspip->dma);
|
||||
|
||||
/* Stopping involved clocks.*/
|
||||
#if STM32_QSPI_USE_QUADSPI1
|
||||
if (&QSPID1 == qspip) {
|
||||
rccDisableQUADSPI1();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command without data phase.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmd pointer to the command descriptor
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_command(QSPIDriver *qspip, const qspi_command_t *cmdp) {
|
||||
|
||||
#if STM32_USE_STM32_D1_WORKAROUND == TRUE
|
||||
/* If it is a command without address and alternate phases then the command
|
||||
is sent as an alternate byte, the command phase is suppressed.*/
|
||||
if ((cmdp->cfg & (QSPI_CFG_ADDR_MODE_MASK | QSPI_CFG_ALT_MODE_MASK)) == 0U) {
|
||||
uint32_t cfg;
|
||||
|
||||
/* The command mode field is copied in the alternate mode field. All
|
||||
other fields are not used in this scenario.*/
|
||||
cfg = (cmdp->cfg & QSPI_CFG_CMD_MODE_MASK) << 6U;
|
||||
|
||||
qspip->qspi->DLR = 0U;
|
||||
qspip->qspi->ABR = cmdp->cfg & QSPI_CFG_CMD_MASK;
|
||||
qspip->qspi->CCR = cfg;
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
qspip->qspi->DLR = 0U;
|
||||
qspip->qspi->ABR = cmdp->alt;
|
||||
qspip->qspi->CCR = cmdp->cfg;
|
||||
if ((cmdp->cfg & QSPI_CFG_ADDR_MODE_MASK) != QSPI_CFG_ADDR_MODE_NONE) {
|
||||
qspip->qspi->AR = cmdp->addr;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command with data over the QSPI bus.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmd pointer to the command descriptor
|
||||
* @param[in] n number of bytes to send
|
||||
* @param[in] txbuf the pointer to the transmit buffer
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_send(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, const uint8_t *txbuf) {
|
||||
|
||||
dmaStreamSetMemory0(qspip->dma, txbuf);
|
||||
dmaStreamSetTransactionSize(qspip->dma, n);
|
||||
dmaStreamSetMode(qspip->dma, qspip->dmamode | STM32_DMA_CR_DIR_M2P);
|
||||
|
||||
qspip->qspi->DLR = n - 1;
|
||||
qspip->qspi->ABR = cmdp->alt;
|
||||
qspip->qspi->CCR = cmdp->cfg;
|
||||
if ((cmdp->cfg & QSPI_CFG_ADDR_MODE_MASK) != QSPI_CFG_ADDR_MODE_NONE) {
|
||||
qspip->qspi->AR = cmdp->addr;
|
||||
}
|
||||
|
||||
dmaStreamEnable(qspip->dma);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command then receives data over the QSPI bus.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmd pointer to the command descriptor
|
||||
* @param[in] n number of bytes to send
|
||||
* @param[out] rxbuf the pointer to the receive buffer
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_receive(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, uint8_t *rxbuf) {
|
||||
|
||||
dmaStreamSetMemory0(qspip->dma, rxbuf);
|
||||
dmaStreamSetTransactionSize(qspip->dma, n);
|
||||
dmaStreamSetMode(qspip->dma, qspip->dmamode | STM32_DMA_CR_DIR_P2M);
|
||||
|
||||
qspip->qspi->DLR = n - 1;
|
||||
qspip->qspi->ABR = cmdp->alt;
|
||||
qspip->qspi->CCR = cmdp->cfg | QUADSPI_CCR_FMODE_0;
|
||||
if ((cmdp->cfg & QSPI_CFG_ADDR_MODE_MASK) != QSPI_CFG_ADDR_MODE_NONE) {
|
||||
qspip->qspi->AR = cmdp->addr;
|
||||
}
|
||||
|
||||
dmaStreamEnable(qspip->dma);
|
||||
}
|
||||
|
||||
#if (QSPI_SUPPORTS_MEMMAP == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Maps in memory space a QSPI flash device.
|
||||
* @pre The memory flash device must be initialized appropriately
|
||||
* before mapping it in memory space.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[out] addrp pointer to the memory start address of the mapped
|
||||
* flash or @p NULL
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_map_flash(QSPIDriver *qspip,
|
||||
const qspi_command_t *cmdp,
|
||||
uint8_t **addrp) {
|
||||
|
||||
/* Disabling the DMA request while in memory mapped mode.*/
|
||||
qspip->qspi->CR &= ~QUADSPI_CR_DMAEN;
|
||||
|
||||
/* Starting memory mapped mode using the passed parameters.*/
|
||||
qspip->qspi->DLR = 0;
|
||||
qspip->qspi->ABR = 0;
|
||||
qspip->qspi->AR = 0;
|
||||
qspip->qspi->CCR = cmdp->cfg | QUADSPI_CCR_FMODE_1 | QUADSPI_CCR_FMODE_0;
|
||||
|
||||
/* Mapped flash absolute base address.*/
|
||||
if (addrp != NULL) {
|
||||
*addrp = (uint8_t *)0x90000000;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Unmaps from memory space a QSPI flash device.
|
||||
* @post The memory flash device must be re-initialized for normal
|
||||
* commands exchange.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_unmap_flash(QSPIDriver *qspip) {
|
||||
|
||||
/* Aborting memory mapped mode.*/
|
||||
qspip->qspi->CR |= QUADSPI_CR_ABORT;
|
||||
while ((qspip->qspi->CR & QUADSPI_CR_ABORT) != 0U) {
|
||||
}
|
||||
|
||||
/* Re-enabling DMA request, we are going back to indirect mode.*/
|
||||
qspip->qspi->CR |= QUADSPI_CR_DMAEN;
|
||||
}
|
||||
#endif /* QSPI_SUPPORTS_MEMMAP == TRUE */
|
||||
|
||||
#endif /* HAL_USE_QSPI */
|
||||
|
||||
/** @} */
|
|
@ -1,281 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file QUADSPIv1/hal_qspi_lld.h
|
||||
* @brief STM32 QSPI subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup QSPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef HAL_QSPI_LLD_H
|
||||
#define HAL_QSPI_LLD_H
|
||||
|
||||
#if (HAL_USE_QSPI == TRUE) || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name QSPI capabilities
|
||||
* @{
|
||||
*/
|
||||
#define QSPI_SUPPORTS_MEMMAP TRUE
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name DCR register options
|
||||
* @{
|
||||
*/
|
||||
#define STM32_DCR_CK_MODE (1U << 0U)
|
||||
#define STM32_DCR_CSHT_MASK (7U << 8U)
|
||||
#define STM32_DCR_CSHT(n) ((n) << 8U)
|
||||
#define STM32_DCR_FSIZE_MASK (31U << 16U)
|
||||
#define STM32_DCR_FSIZE(n) ((n) << 16U)
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief QUADSPI1 driver enable switch.
|
||||
* @details If set to @p TRUE the support for QUADSPI1 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(STM32_QSPI_USE_QUADSPI1) || defined(__DOXYGEN__)
|
||||
#define STM32_QSPI_USE_QUADSPI1 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief QUADSPI1 prescaler setting.
|
||||
* @note This is the prescaler divider value 1..256. The maximum frequency
|
||||
* varies depending on the STM32 model and operating conditions,
|
||||
* find the details in the data sheet.
|
||||
*/
|
||||
#if !defined(STM32_QSPI_QUADSPI1_PRESCALER_VALUE) || defined(__DOXYGEN__)
|
||||
#define STM32_QSPI_QUADSPI1_PRESCALER_VALUE 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief QUADSPI1 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(STM32_QSPI_QUADSPI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define STM32_QSPI_QUADSPI1_IRQ_PRIORITY 10
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief QUADSPI1 DMA priority (0..3|lowest..highest).
|
||||
*/
|
||||
#if !defined(STM32_QSPI_QUADSPI1_DMA_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define STM32_QSPI_QUADSPI1_DMA_PRIORITY 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief QUADSPI1 DMA interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(STM32_QSPI_QUADSPI1_DMA_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define STM32_QSPI_QUADSPI1_DMA_IRQ_PRIORITY 10
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief QUADSPI DMA error hook.
|
||||
*/
|
||||
#if !defined(STM32_QSPI_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
|
||||
#define STM32_QSPI_DMA_ERROR_HOOK(qspip) osalSysHalt("DMA failure")
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables a workaround for a STM32L476 QUADSPI errata.
|
||||
* @details The document DM00111498 states: "QUADSPI_BK1_IO1 is always an
|
||||
* input when the command is sent in dual or quad SPI mode".
|
||||
* This workaround makes commands without address or data phases
|
||||
* to be sent as alternate bytes.
|
||||
*/
|
||||
#if !defined(STM32_USE_STM32_D1_WORKAROUND) || defined(__DOXYGEN__)
|
||||
#define STM32_USE_STM32_D1_WORKAROUND TRUE
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if STM32_QSPI_USE_QUADSPI1 && !STM32_HAS_QUADSPI1
|
||||
#error "QUADSPI1 not present in the selected device"
|
||||
#endif
|
||||
|
||||
#if !STM32_QSPI_USE_QUADSPI1
|
||||
#error "QSPI driver activated but no QUADSPI peripheral assigned"
|
||||
#endif
|
||||
|
||||
#if STM32_QSPI_USE_QUADSPI1 && \
|
||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_QSPI_QUADSPI1_IRQ_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to QUADSPI1"
|
||||
#endif
|
||||
|
||||
#if STM32_QSPI_USE_QUADSPI1 && \
|
||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_QSPI_QUADSPI1_DMA_IRQ_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to QUADSPI1 DMA"
|
||||
#endif
|
||||
|
||||
#if STM32_QSPI_USE_QUADSPI1 && \
|
||||
!STM32_DMA_IS_VALID_PRIORITY(STM32_QSPI_QUADSPI1_DMA_PRIORITY)
|
||||
#error "Invalid DMA priority assigned to QUADSPI1"
|
||||
#endif
|
||||
|
||||
#if (STM32_QSPI_QUADSPI1_PRESCALER_VALUE < 1) || \
|
||||
(STM32_QSPI_QUADSPI1_PRESCALER_VALUE > 256)
|
||||
#error "STM32_QSPI_QUADSPI1_PRESCALER_VALUE not within 1..256"
|
||||
#endif
|
||||
|
||||
/* The following checks are only required when there is a DMA able to
|
||||
reassign streams to different channels.*/
|
||||
#if STM32_ADVANCED_DMA
|
||||
/* Check on the presence of the DMA streams settings in mcuconf.h.*/
|
||||
#if STM32_QSPI_USE_QUADSPI1 && !defined(STM32_QSPI_QUADSPI1_DMA_STREAM)
|
||||
#error "QUADSPI1 DMA stream not defined"
|
||||
#endif
|
||||
|
||||
/* Check on the validity of the assigned DMA channels.*/
|
||||
#if STM32_QSPI_USE_QUADSPI1 && \
|
||||
!STM32_DMA_IS_VALID_ID(STM32_QSPI_QUADSPI1_DMA_STREAM, STM32_QUADSPI1_DMA_MSK)
|
||||
#error "invalid DMA stream associated to QUADSPI1"
|
||||
#endif
|
||||
#endif /* STM32_ADVANCED_DMA */
|
||||
|
||||
#if !defined(STM32_DMA_REQUIRED)
|
||||
#define STM32_DMA_REQUIRED
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing an QSPI driver.
|
||||
*/
|
||||
typedef struct QSPIDriver QSPIDriver;
|
||||
|
||||
/**
|
||||
* @brief Type of a QSPI notification callback.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object triggering the
|
||||
* callback
|
||||
*/
|
||||
typedef void (*qspicallback_t)(QSPIDriver *qspip);
|
||||
|
||||
/**
|
||||
* @brief Driver configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Operation complete callback or @p NULL.
|
||||
*/
|
||||
qspicallback_t end_cb;
|
||||
/* End of the mandatory fields.*/
|
||||
/**
|
||||
* @brief DCR register initialization data.
|
||||
*/
|
||||
uint32_t dcr;
|
||||
} QSPIConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing an QSPI driver.
|
||||
*/
|
||||
struct QSPIDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
qspistate_t state;
|
||||
/**
|
||||
* @brief Current configuration data.
|
||||
*/
|
||||
const QSPIConfig *config;
|
||||
#if (QSPI_USE_WAIT == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Waiting thread.
|
||||
*/
|
||||
thread_reference_t thread;
|
||||
#endif /* QSPI_USE_WAIT */
|
||||
#if (QSPI_USE_MUTUAL_EXCLUSION == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Mutex protecting the peripheral.
|
||||
*/
|
||||
mutex_t mutex;
|
||||
#endif /* QSPI_USE_MUTUAL_EXCLUSION */
|
||||
#if defined(QSPI_DRIVER_EXT_FIELDS)
|
||||
QSPI_DRIVER_EXT_FIELDS
|
||||
#endif
|
||||
/* End of the mandatory fields.*/
|
||||
/**
|
||||
* @brief Pointer to the QUADSPIx registers block.
|
||||
*/
|
||||
QUADSPI_TypeDef *qspi;
|
||||
/**
|
||||
* @brief QUADSPI DMA stream.
|
||||
*/
|
||||
const stm32_dma_stream_t *dma;
|
||||
/**
|
||||
* @brief QUADSPI DMA mode bit mask.
|
||||
*/
|
||||
uint32_t dmamode;
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (STM32_QSPI_USE_QUADSPI1 == TRUE) && !defined(__DOXYGEN__)
|
||||
extern QSPIDriver QSPID1;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void qspi_lld_init(void);
|
||||
void qspi_lld_start(QSPIDriver *qspip);
|
||||
void qspi_lld_stop(QSPIDriver *qspip);
|
||||
void qspi_lld_command(QSPIDriver *qspip, const qspi_command_t *cmdp);
|
||||
void qspi_lld_send(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, const uint8_t *txbuf);
|
||||
void qspi_lld_receive(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, uint8_t *rxbuf);
|
||||
#if QSPI_SUPPORTS_MEMMAP == TRUE
|
||||
void qspi_lld_map_flash(QSPIDriver *qspip,
|
||||
const qspi_command_t *cmdp,
|
||||
uint8_t **addrp);
|
||||
void qspi_lld_unmap_flash(QSPIDriver *qspip);
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_QSPI */
|
||||
|
||||
#endif /* HAL_QSPI_LLD_H */
|
||||
|
||||
/** @} */
|
|
@ -101,9 +101,6 @@ void halInit(void) {
|
|||
#if (HAL_USE_PWM == TRUE) || defined(__DOXYGEN__)
|
||||
pwmInit();
|
||||
#endif
|
||||
#if (HAL_USE_QSPI == TRUE) || defined(__DOXYGEN__)
|
||||
qspiInit();
|
||||
#endif
|
||||
#if (HAL_USE_SERIAL == TRUE) || defined(__DOXYGEN__)
|
||||
sdInit();
|
||||
#endif
|
||||
|
|
|
@ -1,392 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file hal_qspi.c
|
||||
* @brief QSPI Driver code.
|
||||
*
|
||||
* @addtogroup QSPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if (HAL_USE_QSPI == TRUE) || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief QSPI Driver initialization.
|
||||
* @note This function is implicitly invoked by @p halInit(), there is
|
||||
* no need to explicitly initialize the driver.
|
||||
*
|
||||
* @init
|
||||
*/
|
||||
void qspiInit(void) {
|
||||
|
||||
qspi_lld_init();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the standard part of a @p QSPIDriver structure.
|
||||
*
|
||||
* @param[out] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @init
|
||||
*/
|
||||
void qspiObjectInit(QSPIDriver *qspip) {
|
||||
|
||||
qspip->state = QSPI_STOP;
|
||||
qspip->config = NULL;
|
||||
#if QSPI_USE_WAIT == TRUE
|
||||
qspip->thread = NULL;
|
||||
#endif
|
||||
#if QSPI_USE_MUTUAL_EXCLUSION == TRUE
|
||||
osalMutexObjectInit(&qspip->mutex);
|
||||
#endif
|
||||
#if defined(QSPI_DRIVER_EXT_INIT_HOOK)
|
||||
QSPI_DRIVER_EXT_INIT_HOOK(qspip);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and activates the QSPI peripheral.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] config pointer to the @p QSPIConfig object
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiStart(QSPIDriver *qspip, const QSPIConfig *config) {
|
||||
|
||||
osalDbgCheck((qspip != NULL) && (config != NULL));
|
||||
|
||||
osalSysLock();
|
||||
|
||||
osalDbgAssert((qspip->state == QSPI_STOP) || (qspip->state == QSPI_READY),
|
||||
"invalid state");
|
||||
|
||||
qspip->config = config;
|
||||
qspi_lld_start(qspip);
|
||||
qspip->state = QSPI_READY;
|
||||
|
||||
osalSysUnlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the QSPI peripheral.
|
||||
* @note Deactivating the peripheral also enforces a release of the slave
|
||||
* select line.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiStop(QSPIDriver *qspip) {
|
||||
|
||||
osalDbgCheck(qspip != NULL);
|
||||
|
||||
osalSysLock();
|
||||
|
||||
osalDbgAssert((qspip->state == QSPI_STOP) || (qspip->state == QSPI_READY),
|
||||
"invalid state");
|
||||
|
||||
qspi_lld_stop(qspip);
|
||||
qspip->config = NULL;
|
||||
qspip->state = QSPI_STOP;
|
||||
|
||||
osalSysUnlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command without data phase.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiStartCommand(QSPIDriver *qspip, const qspi_command_t *cmdp) {
|
||||
|
||||
osalDbgCheck((qspip != NULL) && (cmdp != NULL));
|
||||
|
||||
osalSysLock();
|
||||
|
||||
osalDbgAssert(qspip->state == QSPI_READY, "not ready");
|
||||
|
||||
qspiStartCommandI(qspip, cmdp);
|
||||
|
||||
osalSysUnlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command with data over the QSPI bus.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[in] n number of bytes to send
|
||||
* @param[in] txbuf the pointer to the transmit buffer
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiStartSend(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, const uint8_t *txbuf) {
|
||||
|
||||
osalDbgCheck((qspip != NULL) && (cmdp != NULL));
|
||||
osalDbgCheck((n > 0U) && (txbuf != NULL));
|
||||
|
||||
osalSysLock();
|
||||
|
||||
osalDbgAssert(qspip->state == QSPI_READY, "not ready");
|
||||
|
||||
qspiStartSendI(qspip, cmdp, n, txbuf);
|
||||
|
||||
osalSysUnlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command then receives data over the QSPI bus.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[in] n number of bytes to send
|
||||
* @param[out] rxbuf the pointer to the receive buffer
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiStartReceive(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, uint8_t *rxbuf) {
|
||||
|
||||
osalDbgCheck((qspip != NULL) && (cmdp != NULL));
|
||||
osalDbgCheck((n > 0U) && (rxbuf != NULL));
|
||||
|
||||
osalSysLock();
|
||||
|
||||
osalDbgAssert(qspip->state == QSPI_READY, "not ready");
|
||||
|
||||
qspiStartReceiveI(qspip, cmdp, n, rxbuf);
|
||||
|
||||
osalSysUnlock();
|
||||
}
|
||||
|
||||
#if (QSPI_USE_WAIT == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Sends a command without data phase.
|
||||
* @pre In order to use this function the option @p QSPI_USE_WAIT must be
|
||||
* enabled.
|
||||
* @pre In order to use this function the driver must have been configured
|
||||
* without callbacks (@p end_cb = @p NULL).
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiCommand(QSPIDriver *qspip, const qspi_command_t *cmdp) {
|
||||
|
||||
osalDbgCheck((qspip != NULL) && (cmdp != NULL));
|
||||
osalDbgCheck((cmdp->cfg & QSPI_CFG_DATA_MODE_MASK) == QSPI_CFG_DATA_MODE_NONE);
|
||||
|
||||
osalSysLock();
|
||||
|
||||
osalDbgAssert(qspip->state == QSPI_READY, "not ready");
|
||||
osalDbgAssert(qspip->config->end_cb == NULL, "has callback");
|
||||
|
||||
qspiStartCommandI(qspip, cmdp);
|
||||
(void) osalThreadSuspendS(&qspip->thread);
|
||||
|
||||
osalSysUnlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command with data over the QSPI bus.
|
||||
* @pre In order to use this function the option @p QSPI_USE_WAIT must be
|
||||
* enabled.
|
||||
* @pre In order to use this function the driver must have been configured
|
||||
* without callbacks (@p end_cb = @p NULL).
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[in] n number of bytes to send
|
||||
* @param[in] txbuf the pointer to the transmit buffer
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiSend(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, const uint8_t *txbuf) {
|
||||
|
||||
osalDbgCheck((qspip != NULL) && (cmdp != NULL));
|
||||
osalDbgCheck((n > 0U) && (txbuf != NULL));
|
||||
osalDbgCheck((cmdp->cfg & QSPI_CFG_DATA_MODE_MASK) != QSPI_CFG_DATA_MODE_NONE);
|
||||
|
||||
osalSysLock();
|
||||
|
||||
osalDbgAssert(qspip->state == QSPI_READY, "not ready");
|
||||
osalDbgAssert(qspip->config->end_cb == NULL, "has callback");
|
||||
|
||||
qspiStartSendI(qspip, cmdp, n, txbuf);
|
||||
(void) osalThreadSuspendS(&qspip->thread);
|
||||
|
||||
osalSysUnlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command then receives data over the QSPI bus.
|
||||
* @pre In order to use this function the option @p QSPI_USE_WAIT must be
|
||||
* enabled.
|
||||
* @pre In order to use this function the driver must have been configured
|
||||
* without callbacks (@p end_cb = @p NULL).
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[in] n number of bytes to send
|
||||
* @param[out] rxbuf the pointer to the receive buffer
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiReceive(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, uint8_t *rxbuf) {
|
||||
|
||||
osalDbgCheck((qspip != NULL) && (cmdp != NULL));
|
||||
osalDbgCheck((n > 0U) && (rxbuf != NULL));
|
||||
osalDbgCheck((cmdp->cfg & QSPI_CFG_DATA_MODE_MASK) != QSPI_CFG_DATA_MODE_NONE);
|
||||
|
||||
osalSysLock();
|
||||
|
||||
osalDbgAssert(qspip->state == QSPI_READY, "not ready");
|
||||
osalDbgAssert(qspip->config->end_cb == NULL, "has callback");
|
||||
|
||||
qspiStartReceiveI(qspip, cmdp, n, rxbuf);
|
||||
(void) osalThreadSuspendS(&qspip->thread);
|
||||
|
||||
osalSysUnlock();
|
||||
}
|
||||
#endif /* QSPI_USE_WAIT == TRUE */
|
||||
|
||||
#if (QSPI_SUPPORTS_MEMMAP == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Maps in memory space a QSPI flash device.
|
||||
* @pre The memory flash device must be initialized appropriately
|
||||
* before mapping it in memory space.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[out] addrp pointer to the memory start address of the mapped
|
||||
* flash or @p NULL
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiMapFlash(QSPIDriver *qspip,
|
||||
const qspi_command_t *cmdp,
|
||||
uint8_t **addrp) {
|
||||
|
||||
osalDbgCheck((qspip != NULL) && (cmdp != NULL));
|
||||
osalDbgCheck((cmdp->cfg & QSPI_CFG_DATA_MODE_MASK) != QSPI_CFG_DATA_MODE_NONE);
|
||||
|
||||
osalSysLock();
|
||||
|
||||
osalDbgAssert(qspip->state == QSPI_READY, "not ready");
|
||||
|
||||
qspiMapFlashI(qspip, cmdp, addrp);
|
||||
qspip->state = QSPI_MEMMAP;
|
||||
|
||||
osalSysUnlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Unmaps from memory space a QSPI flash device.
|
||||
* @post The memory flash device must be re-initialized for normal
|
||||
* commands exchange.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiUnmapFlash(QSPIDriver *qspip) {
|
||||
|
||||
osalDbgCheck(qspip != NULL);
|
||||
|
||||
osalSysLock();
|
||||
|
||||
osalDbgAssert(qspip->state == QSPI_MEMMAP, "not ready");
|
||||
|
||||
qspiUnmapFlashI(qspip);
|
||||
qspip->state = QSPI_READY;
|
||||
|
||||
osalSysUnlock();
|
||||
}
|
||||
#endif /* QSPI_SUPPORTS_MEMMAP == TRUE */
|
||||
|
||||
#if (QSPI_USE_MUTUAL_EXCLUSION == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Gains exclusive access to the QSPI bus.
|
||||
* @details This function tries to gain ownership to the QSPI bus, if the bus
|
||||
* is already being used then the invoking thread is queued.
|
||||
* @pre In order to use this function the option @p QSPI_USE_MUTUAL_EXCLUSION
|
||||
* must be enabled.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiAcquireBus(QSPIDriver *qspip) {
|
||||
|
||||
osalDbgCheck(qspip != NULL);
|
||||
|
||||
osalMutexLock(&qspip->mutex);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Releases exclusive access to the QSPI bus.
|
||||
* @pre In order to use this function the option @p QSPI_USE_MUTUAL_EXCLUSION
|
||||
* must be enabled.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @api
|
||||
*/
|
||||
void qspiReleaseBus(QSPIDriver *qspip) {
|
||||
|
||||
osalDbgCheck(qspip != NULL);
|
||||
|
||||
osalMutexUnlock(&qspip->mutex);
|
||||
}
|
||||
#endif /* QSPI_USE_MUTUAL_EXCLUSION == TRUE */
|
||||
|
||||
#endif /* HAL_USE_QSPI == TRUE */
|
||||
|
||||
/** @} */
|
|
@ -1,208 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file hal_qspi_lld.c
|
||||
* @brief PLATFORM QSPI subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup QSPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if (HAL_USE_QSPI == TRUE) || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @brief QSPID1 driver identifier.*/
|
||||
#if (PLATFORM_QSPI_USE_QSPI1 == TRUE) || defined(__DOXYGEN__)
|
||||
QSPIDriver QSPID1;
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level QSPI driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_init(void) {
|
||||
|
||||
#if PLATFORM_QSPI_USE_QSPI1
|
||||
qspiObjectInit(&QSPID1);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and activates the QSPI peripheral.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_start(QSPIDriver *qspip) {
|
||||
|
||||
/* If in stopped state then full initialization.*/
|
||||
if (qspip->state == QSPI_STOP) {
|
||||
#if PLATFORM_QSPI_USE_QSPI1
|
||||
if (&QSPID1 == qspip) {
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Common initializations.*/
|
||||
}
|
||||
|
||||
/* QSPI setup and enable.*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the QSPI peripheral.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_stop(QSPIDriver *qspip) {
|
||||
|
||||
/* If in ready state then disables QSPI.*/
|
||||
if (qspip->state == QSPI_READY) {
|
||||
|
||||
/* QSPI disable.*/
|
||||
|
||||
/* Stopping involved clocks.*/
|
||||
#if PLATFORM_QSPI_USE_QSPI1
|
||||
if (&QSPID1 == qspip) {
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command without data phase.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_command(QSPIDriver *qspip, const qspi_command_t *cmdp) {
|
||||
|
||||
(void)qspip;
|
||||
(void)cmdp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command with data over the QSPI bus.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[in] n number of bytes to send
|
||||
* @param[in] txbuf the pointer to the transmit buffer
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_send(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, const uint8_t *txbuf) {
|
||||
|
||||
(void)qspip;
|
||||
(void)cmdp;
|
||||
(void)n;
|
||||
(void)txbuf;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends a command then receives data over the QSPI bus.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[in] n number of bytes to send
|
||||
* @param[out] rxbuf the pointer to the receive buffer
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_receive(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, uint8_t *rxbuf) {
|
||||
|
||||
(void)qspip;
|
||||
(void)cmdp;
|
||||
(void)n;
|
||||
(void)rxbuf;
|
||||
}
|
||||
|
||||
#if (QSPI_SUPPORTS_MEMMAP == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Maps in memory space a QSPI flash device.
|
||||
* @pre The memory flash device must be initialized appropriately
|
||||
* before mapping it in memory space.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
* @param[in] cmdp pointer to the command descriptor
|
||||
* @param[out] addrp pointer to the memory start address of the mapped
|
||||
* flash or @p NULL
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_map_flash(QSPIDriver *qspip,
|
||||
const qspi_command_t *cmdp,
|
||||
uint8_t **addrp) {
|
||||
|
||||
(void)qspip;
|
||||
(void)cmdp;
|
||||
(void)addrp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Unmaps from memory space a QSPI flash device.
|
||||
* @post The memory flash device must be re-initialized for normal
|
||||
* commands exchange.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void qspi_lld_unmap_flash(QSPIDriver *qspip) {
|
||||
|
||||
(void)qspip;
|
||||
}
|
||||
#endif /* QSPI_SUPPORTS_MEMMAP == TRUE */
|
||||
|
||||
#endif /* HAL_USE_QSPI */
|
||||
|
||||
/** @} */
|
|
@ -1,158 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file hal_qspi_lld.h
|
||||
* @brief PLATFORM QSPI subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup QSPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef HAL_QSPI_LLD_H
|
||||
#define HAL_QSPI_LLD_H
|
||||
|
||||
#if (HAL_USE_QSPI == TRUE) || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name QSPI capabilities
|
||||
* @{
|
||||
*/
|
||||
#define QSPI_SUPPORTS_MEMMAP TRUE
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief QSPID1 driver enable switch.
|
||||
* @details If set to @p TRUE the support for QSPID1 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(PLATFORM_QSPI_USE_QSPI1) || defined(__DOXYGEN__)
|
||||
#define PLATFORM_QSPI_USE_QSPI1 FALSE
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing an QSPI driver.
|
||||
*/
|
||||
typedef struct QSPIDriver QSPIDriver;
|
||||
|
||||
/**
|
||||
* @brief Type of a QSPI notification callback.
|
||||
*
|
||||
* @param[in] qspip pointer to the @p QSPIDriver object triggering the
|
||||
* callback
|
||||
*/
|
||||
typedef void (*qspicallback_t)(QSPIDriver *qspip);
|
||||
|
||||
/**
|
||||
* @brief Driver configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Operation complete callback or @p NULL.
|
||||
*/
|
||||
qspicallback_t end_cb;
|
||||
/* End of the mandatory fields.*/
|
||||
} QSPIConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing an QSPI driver.
|
||||
*/
|
||||
struct QSPIDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
qspistate_t state;
|
||||
/**
|
||||
* @brief Current configuration data.
|
||||
*/
|
||||
const QSPIConfig *config;
|
||||
#if (QSPI_USE_WAIT == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Waiting thread.
|
||||
*/
|
||||
thread_reference_t thread;
|
||||
#endif /* QSPI_USE_WAIT */
|
||||
#if (QSPI_USE_MUTUAL_EXCLUSION == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Mutex protecting the peripheral.
|
||||
*/
|
||||
mutex_t mutex;
|
||||
#endif /* QSPI_USE_MUTUAL_EXCLUSION */
|
||||
#if defined(QSPI_DRIVER_EXT_FIELDS)
|
||||
QSPI_DRIVER_EXT_FIELDS
|
||||
#endif
|
||||
/* End of the mandatory fields.*/
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (PLATFORM_QSPI_USE_QSPI1 == TRUE) && !defined(__DOXYGEN__)
|
||||
extern QSPIDriver QSPID1;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void qspi_lld_init(void);
|
||||
void qspi_lld_start(QSPIDriver *qspip);
|
||||
void qspi_lld_stop(QSPIDriver *qspip);
|
||||
void qspi_lld_command(QSPIDriver *qspip, const qspi_command_t *cmdp);
|
||||
void qspi_lld_send(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, const uint8_t *txbuf);
|
||||
void qspi_lld_receive(QSPIDriver *qspip, const qspi_command_t *cmdp,
|
||||
size_t n, uint8_t *rxbuf);
|
||||
#if QSPI_SUPPORTS_MEMMAP == TRUE
|
||||
void qspi_lld_map_flash(QSPIDriver *qspip,
|
||||
const qspi_command_t *cmdp,
|
||||
uint8_t **addrp);
|
||||
void qspi_lld_unmap_flash(QSPIDriver *qspip);
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_QSPI */
|
||||
|
||||
#endif /* HAL_QSPI_LLD_H */
|
||||
|
||||
/** @} */
|
|
@ -46,9 +46,6 @@ endif
|
|||
ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),)
|
||||
PLATFORMSRC += ${CHIBIOS}/os/hal/templates/hal_pwm_lld.c
|
||||
endif
|
||||
ifneq ($(findstring HAL_USE_QSPI TRUE,$(HALCONF)),)
|
||||
PLATFORMSRC += ${CHIBIOS}/os/hal/templates/hal_qspi_lld.c
|
||||
endif
|
||||
ifneq ($(findstring HAL_USE_RTC TRUE,$(HALCONF)),)
|
||||
PLATFORMSRC += ${CHIBIOS}/os/hal/templates/hal_rtc_lld.c
|
||||
endif
|
||||
|
@ -93,7 +90,6 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/templates/hal_lld.c \
|
|||
${CHIBIOS}/os/hal/templates/hal_mac_lld.c \
|
||||
${CHIBIOS}/os/hal/templates/hal_pal_lld.c \
|
||||
${CHIBIOS}/os/hal/templates/hal_pwm_lld.c \
|
||||
${CHIBIOS}/os/hal/templates/hal_qspi_lld.c \
|
||||
${CHIBIOS}/os/hal/templates/hal_rtc_lld.c \
|
||||
${CHIBIOS}/os/hal/templates/hal_sdc_lld.c \
|
||||
${CHIBIOS}/os/hal/templates/hal_serial_lld.c \
|
||||
|
|
|
@ -75,6 +75,7 @@
|
|||
*****************************************************************************
|
||||
|
||||
*** Next ***
|
||||
- NEW: Removed QSPI driver model, entirely replaced by WSPI.
|
||||
- NEW: Added demos regarding WSPI, serial nor driver and MFS.
|
||||
- NEW: Modified the serial nor driver to work with WSPI instead of QSPI,
|
||||
improved it in several way, simplicity mainly.
|
||||
|
|
|
@ -1,50 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="0.365230168">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.365230168" moduleId="org.eclipse.cdt.core.settings" name="Default">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.365230168" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
|
||||
<folderInfo id="0.365230168." name="/" resourcePath="">
|
||||
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1592595440" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
|
||||
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.1592595440.637356496" name=""/>
|
||||
<builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.1732344953" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1315058086" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.825931904" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1011311385" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.337458123" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.262921049" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.907816742" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.480793473" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="STM32L4xx-QSPI-N25Q128.null.1829068891" name="STM32L4xx-QSPI-N25Q128"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="0.365230168">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="refreshScope"/>
|
||||
</cproject>
|
|
@ -1,90 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>STM32L4xx-QSPI-N25Q128</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
<dictionary>
|
||||
<key>?name?</key>
|
||||
<value></value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.append_environment</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
|
||||
<value>all</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildArguments</key>
|
||||
<value>-j1</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildCommand</key>
|
||||
<value>make</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
|
||||
<value>clean</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.contents</key>
|
||||
<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
|
||||
<value>false</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableFullBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
|
||||
<value>all</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.stopOnError</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>board</name>
|
||||
<type>2</type>
|
||||
<locationURI>CHIBIOS/os/hal/boards/ST_STM32L476_DISCOVERY</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>os</name>
|
||||
<type>2</type>
|
||||
<locationURI>CHIBIOS/os</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
</projectDescription>
|
|
@ -1,215 +0,0 @@
|
|||
##############################################################################
|
||||
# Build global options
|
||||
# NOTE: Can be overridden externally.
|
||||
#
|
||||
|
||||
# Compiler options here.
|
||||
ifeq ($(USE_OPT),)
|
||||
USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
|
||||
endif
|
||||
|
||||
# C specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_COPT),)
|
||||
USE_COPT =
|
||||
endif
|
||||
|
||||
# C++ specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_CPPOPT),)
|
||||
USE_CPPOPT = -fno-rtti
|
||||
endif
|
||||
|
||||
# Enable this if you want the linker to remove unused code and data
|
||||
ifeq ($(USE_LINK_GC),)
|
||||
USE_LINK_GC = yes
|
||||
endif
|
||||
|
||||
# Linker extra options here.
|
||||
ifeq ($(USE_LDOPT),)
|
||||
USE_LDOPT =
|
||||
endif
|
||||
|
||||
# Enable this if you want link time optimizations (LTO)
|
||||
ifeq ($(USE_LTO),)
|
||||
USE_LTO = yes
|
||||
endif
|
||||
|
||||
# If enabled, this option allows to compile the application in THUMB mode.
|
||||
ifeq ($(USE_THUMB),)
|
||||
USE_THUMB = yes
|
||||
endif
|
||||
|
||||
# Enable this if you want to see the full log while compiling.
|
||||
ifeq ($(USE_VERBOSE_COMPILE),)
|
||||
USE_VERBOSE_COMPILE = no
|
||||
endif
|
||||
|
||||
# If enabled, this option makes the build process faster by not compiling
|
||||
# modules not used in the current configuration.
|
||||
ifeq ($(USE_SMART_BUILD),)
|
||||
USE_SMART_BUILD = yes
|
||||
endif
|
||||
|
||||
#
|
||||
# Build global options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Architecture or project specific options
|
||||
#
|
||||
|
||||
# Stack size to be allocated to the Cortex-M process stack. This stack is
|
||||
# the stack used by the main() thread.
|
||||
ifeq ($(USE_PROCESS_STACKSIZE),)
|
||||
USE_PROCESS_STACKSIZE = 0x400
|
||||
endif
|
||||
|
||||
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
|
||||
# stack is used for processing interrupts and exceptions.
|
||||
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
|
||||
USE_EXCEPTIONS_STACKSIZE = 0x400
|
||||
endif
|
||||
|
||||
# Enables the use of FPU (no, softfp, hard).
|
||||
ifeq ($(USE_FPU),)
|
||||
USE_FPU = no
|
||||
endif
|
||||
|
||||
#
|
||||
# Architecture or project specific options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Project, sources and paths
|
||||
#
|
||||
|
||||
# Define project name here
|
||||
PROJECT = ch
|
||||
|
||||
# Imported source files and paths
|
||||
CHIBIOS = ../../../..
|
||||
|
||||
# Licensing files.
|
||||
include $(CHIBIOS)/os/license/license.mk
|
||||
# Startup files.
|
||||
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk
|
||||
# HAL-OSAL files (optional).
|
||||
include $(CHIBIOS)/os/hal/hal.mk
|
||||
include $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/platform.mk
|
||||
include $(CHIBIOS)/os/hal/boards/ST_STM32L476_DISCOVERY/board.mk
|
||||
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
|
||||
# RTOS files (optional).
|
||||
include $(CHIBIOS)/os/rt/rt.mk
|
||||
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
|
||||
# EX files (optional).
|
||||
include $(CHIBIOS)/os/ex/Micron/m25q.mk
|
||||
# Other files (optional).
|
||||
include $(CHIBIOS)/os/hal/lib/complex/mfs/mfs.mk
|
||||
include $(CHIBIOS)/os/hal/lib/streams/streams.mk
|
||||
|
||||
# Define linker script file here
|
||||
LDSCRIPT= $(STARTUPLD)/STM32L476xG.ld
|
||||
|
||||
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CSRC = $(ALLCSRC) \
|
||||
$(TESTSRC) \
|
||||
main.c
|
||||
|
||||
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CPPSRC = $(ALLCPPSRC)
|
||||
|
||||
# C sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACSRC =
|
||||
|
||||
# C++ sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACPPSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCPPSRC =
|
||||
|
||||
# List ASM source files here
|
||||
ASMSRC = $(ALLASMSRC)
|
||||
ASMXSRC = $(ALLXASMSRC)
|
||||
|
||||
INCDIR = $(ALLINC) $(TESTINC)
|
||||
|
||||
#
|
||||
# Project, sources and paths
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Compiler settings
|
||||
#
|
||||
|
||||
MCU = cortex-m4
|
||||
|
||||
#TRGT = arm-elf-
|
||||
TRGT = arm-none-eabi-
|
||||
CC = $(TRGT)gcc
|
||||
CPPC = $(TRGT)g++
|
||||
# Enable loading with g++ only if you need C++ runtime support.
|
||||
# NOTE: You can use C++ even without C++ support if you are careful. C++
|
||||
# runtime support makes code size explode.
|
||||
LD = $(TRGT)gcc
|
||||
#LD = $(TRGT)g++
|
||||
CP = $(TRGT)objcopy
|
||||
AS = $(TRGT)gcc -x assembler-with-cpp
|
||||
AR = $(TRGT)ar
|
||||
OD = $(TRGT)objdump
|
||||
SZ = $(TRGT)size
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary
|
||||
|
||||
# ARM-specific options here
|
||||
AOPT =
|
||||
|
||||
# THUMB-specific options here
|
||||
TOPT = -mthumb -DTHUMB
|
||||
|
||||
# Define C warning options here
|
||||
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
|
||||
|
||||
# Define C++ warning options here
|
||||
CPPWARN = -Wall -Wextra -Wundef
|
||||
|
||||
#
|
||||
# Compiler settings
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Start of user section
|
||||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS = -DCHPRINTF_USE_FLOAT=1
|
||||
|
||||
# Define ASM defines here
|
||||
UADEFS =
|
||||
|
||||
# List all user directories here
|
||||
UINCDIR =
|
||||
|
||||
# List the user directory to look for the libraries here
|
||||
ULIBDIR =
|
||||
|
||||
# List all user libraries here
|
||||
ULIBS =
|
||||
|
||||
#
|
||||
# End of user defines
|
||||
##############################################################################
|
||||
|
||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
|
||||
include $(RULESPATH)/rules.mk
|
|
@ -1,714 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/chconf.h
|
||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
|
||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef CHCONF_H
|
||||
#define CHCONF_H
|
||||
|
||||
#define _CHIBIOS_RT_CONF_
|
||||
#define _CHIBIOS_RT_CONF_VER_6_0_
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System timers settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_RESOLUTION)
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_FREQUENCY)
|
||||
#define CH_CFG_ST_FREQUENCY 10000
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Time intervals data size.
|
||||
* @note Allowed values are 16, 32 or 64 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_INTERVALS_SIZE)
|
||||
#define CH_CFG_INTERVALS_SIZE 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Time types data size.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_TIME_TYPES_SIZE)
|
||||
#define CH_CFG_TIME_TYPES_SIZE 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Time delta constant for the tick-less mode.
|
||||
* @note If this value is zero then the system uses the classic
|
||||
* periodic tick. This value represents the minimum number
|
||||
* of ticks that is safe to specify in a timeout directive.
|
||||
* The value one is not valid, timeouts are rounded up to
|
||||
* this value.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_TIMEDELTA)
|
||||
#define CH_CFG_ST_TIMEDELTA 2
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel parameters and options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
* @note The round robin preemption is not supported in tickless mode and
|
||||
* must be set to zero in that case.
|
||||
*/
|
||||
#if !defined(CH_CFG_TIME_QUANTUM)
|
||||
#define CH_CFG_TIME_QUANTUM 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||
*/
|
||||
#if !defined(CH_CFG_MEMCORE_SIZE)
|
||||
#define CH_CFG_MEMCORE_SIZE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread. The application @p main()
|
||||
* function becomes the idle thread and must implement an
|
||||
* infinite loop.
|
||||
*/
|
||||
#if !defined(CH_CFG_NO_IDLE_THREAD)
|
||||
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Performance options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_OPTIMIZE_SPEED)
|
||||
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Subsystem options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Time Measurement APIs.
|
||||
* @details If enabled then the time measurement APIs are included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_TM)
|
||||
#define CH_CFG_USE_TM TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_REGISTRY)
|
||||
#define CH_CFG_USE_REGISTRY TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_WAITEXIT)
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_SEMAPHORES)
|
||||
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
|
||||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MUTEXES)
|
||||
#define CH_CFG_USE_MUTEXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables recursive behavior on mutexes.
|
||||
* @note Recursive mutexes are heavier and have an increased
|
||||
* memory footprint.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
|
||||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_CONDVARS)
|
||||
#define CH_CFG_USE_CONDVARS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
|
||||
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_EVENTS)
|
||||
#define CH_CFG_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
|
||||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MESSAGES)
|
||||
#define CH_CFG_USE_MESSAGES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
|
||||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MAILBOXES)
|
||||
#define CH_CFG_USE_MAILBOXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MEMCORE)
|
||||
#define CH_CFG_USE_MEMCORE TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||
* @p CH_CFG_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_HEAP)
|
||||
#define CH_CFG_USE_HEAP TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MEMPOOLS)
|
||||
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Objects FIFOs APIs.
|
||||
* @details If enabled then the objects FIFOs APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_OBJ_FIFOS)
|
||||
#define CH_CFG_USE_OBJ_FIFOS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Pipes APIs.
|
||||
* @details If enabled then the pipes APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_PIPES)
|
||||
#define CH_CFG_USE_PIPES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_DYNAMIC)
|
||||
#define CH_CFG_USE_DYNAMIC TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Objects factory options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Objects Factory APIs.
|
||||
* @details If enabled then the objects factory APIs are included in the
|
||||
* kernel.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_FACTORY)
|
||||
#define CH_CFG_USE_FACTORY TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Maximum length for object names.
|
||||
* @details If the specified length is zero then the name is stored by
|
||||
* pointer but this could have unintended side effects.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
|
||||
#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the registry of generic objects.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
|
||||
#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for generic buffers.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
|
||||
#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for semaphores.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_SEMAPHORES)
|
||||
#define CH_CFG_FACTORY_SEMAPHORES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for mailboxes.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_MAILBOXES)
|
||||
#define CH_CFG_FACTORY_MAILBOXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for objects FIFOs.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
|
||||
#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for Pipes.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
|
||||
#define CH_CFG_FACTORY_PIPES TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Debug options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_STATISTICS)
|
||||
#define CH_DBG_STATISTICS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_CHECKS)
|
||||
#define CH_DBG_ENABLE_CHECKS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_ASSERTS)
|
||||
#define CH_DBG_ENABLE_ASSERTS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the trace buffer is activated.
|
||||
*
|
||||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#if !defined(CH_DBG_TRACE_MASK)
|
||||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Trace buffer entries.
|
||||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
|
||||
* different from @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
|
||||
#define CH_DBG_TRACE_BUFFER_SIZE 128
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_STACK_CHECK)
|
||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_FILL_THREADS)
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#if !defined(CH_DBG_THREADS_PROFILING)
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System structure extension.
|
||||
* @details User fields added to the end of the @p ch_system_t structure.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief System initialization hook.
|
||||
* @details User initialization code added to the @p chSysInit() function
|
||||
* just before interrupts are enabled globally.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_INIT_HOOK() { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p _thread_init() function.
|
||||
*
|
||||
* @note It is invoked from within @p _thread_init() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR enter hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
|
||||
/* IRQ prologue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR exit hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
|
||||
/* IRQ epilogue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
/* Idle-enter code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread leave hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
/* Idle-leave code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Trace hook.
|
||||
* @details This hook is invoked each time a new record is written in the
|
||||
* trace buffer.
|
||||
*/
|
||||
#define CH_CFG_TRACE_HOOK(tep) { \
|
||||
/* Trace code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* CHCONF_H */
|
||||
|
||||
/** @} */
|
File diff suppressed because one or more lines are too long
|
@ -1,532 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef HALCONF_H
|
||||
#define HALCONF_H
|
||||
|
||||
#define _CHIBIOS_HAL_CONF_
|
||||
#define _CHIBIOS_HAL_CONF_VER_6_0_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the cryptographic subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CRY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EXT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EXT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2S subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2S FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SIO subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SIO FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the TRNG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_TRNG FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WDG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WDG FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WSPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WSPI FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* PAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
|
||||
#define PAL_USE_CALLBACKS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define PAL_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enforces the driver to use direct callbacks rather than OSAL events.
|
||||
*/
|
||||
#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
|
||||
#define CAN_ENFORCE_USE_CALLBACKS FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CRY driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the SW fall-back of the cryptographic driver.
|
||||
* @details When enabled, this option, activates a fall-back software
|
||||
* implementation for algorithms not supported by the underlying
|
||||
* hardware.
|
||||
* @note Fall-back implementations may not be present for all algorithms.
|
||||
*/
|
||||
#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
|
||||
#define HAL_CRY_USE_FALLBACK FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Makes the driver forcibly use the fall-back implementations.
|
||||
*/
|
||||
#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
|
||||
#define HAL_CRY_ENFORCE_FALLBACK FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* DAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define DAC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define DAC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the zero-copy API.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief OCR initialization constant for V20 cards.
|
||||
*/
|
||||
#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_OCR_V20 0x50FF8000U
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief OCR initialization constant for non-V20 cards.
|
||||
*/
|
||||
#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_OCR 0x80100000U
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 16 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL_USB driver related setting. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Serial over USB buffers size.
|
||||
* @details Configuration parameter, the buffer size must be a multiple of
|
||||
* the USB data endpoint maximum packet size.
|
||||
* @note The default is 256 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial over USB number of buffers.
|
||||
* @note The default is 2 buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_NUMBER 2
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables circular transfers APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_CIRCULAR FALSE
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Handling method for SPI CS line.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
|
||||
#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* UART driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define UART_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define UART_USE_MUTUAL_EXCLUSION FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* USB driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define USB_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* WSPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define WSPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define WSPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
#endif /* HALCONF_H */
|
||||
|
||||
/** @} */
|
|
@ -1,169 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#include "m25q.h"
|
||||
|
||||
/* 16MB device, 2 cycles delay after NCS.*/
|
||||
const QSPIConfig qspicfg1 = {
|
||||
NULL,
|
||||
STM32_DCR_FSIZE(24) | STM32_DCR_CSHT(1)
|
||||
};
|
||||
|
||||
qspi_command_t cmd_read_id = {
|
||||
QSPI_CFG_CMD(0x9E) | QSPI_CFG_CMD_MODE_ONE_LINE |
|
||||
QSPI_CFG_ADDR_MODE_NONE |
|
||||
QSPI_CFG_ALT_MODE_NONE |
|
||||
QSPI_CFG_DUMMY_CYCLES(0) |
|
||||
QSPI_CFG_DATA_MODE_ONE_LINE,
|
||||
0,
|
||||
0
|
||||
};
|
||||
|
||||
/*
|
||||
* Generic buffer.
|
||||
*/
|
||||
uint8_t buffer[2048];
|
||||
|
||||
const uint8_t pattern[128] = {
|
||||
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
|
||||
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
|
||||
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
|
||||
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
|
||||
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
|
||||
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
|
||||
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
|
||||
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
|
||||
};
|
||||
|
||||
M25QDriver m25q;
|
||||
|
||||
const M25QConfig m25qcfg1 = {
|
||||
&QSPID1,
|
||||
&qspicfg1
|
||||
};
|
||||
|
||||
/*
|
||||
* LED blinker thread, times are in milliseconds.
|
||||
*/
|
||||
static THD_WORKING_AREA(waThread1, 128);
|
||||
static THD_FUNCTION(Thread1, arg) {
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("blinker");
|
||||
while (true) {
|
||||
palToggleLine(LINE_LED_GREEN);
|
||||
chThdSleepMilliseconds(500);
|
||||
palToggleLine(LINE_LED_GREEN);
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Application entry point.
|
||||
*/
|
||||
int main(void) {
|
||||
flash_error_t err;
|
||||
uint8_t *addr;
|
||||
|
||||
/*
|
||||
* System initializations.
|
||||
* - HAL initialization, this also initializes the configured device drivers
|
||||
* and performs the board-specific initializations.
|
||||
* - Kernel initialization, the main() function becomes a thread and the
|
||||
* RTOS is active.
|
||||
*/
|
||||
halInit();
|
||||
chSysInit();
|
||||
|
||||
/*
|
||||
* LED line as output.
|
||||
*/
|
||||
palSetLineMode(LINE_LED_GREEN, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
|
||||
/*
|
||||
* Creates the blinker thread.
|
||||
*/
|
||||
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO + 1, Thread1, NULL);
|
||||
|
||||
/*
|
||||
* Initializing and starting M25Q driver.
|
||||
*/
|
||||
m25qObjectInit(&m25q);
|
||||
m25qStart(&m25q, &m25qcfg1);
|
||||
|
||||
/* Reading.*/
|
||||
err = flashRead(&m25q, 0, 128, buffer);
|
||||
if (err != FLASH_NO_ERROR)
|
||||
chSysHalt("read error");
|
||||
|
||||
/* Erasing the first sector and waiting for completion.*/
|
||||
(void) flashStartEraseSector(&m25q, 0);
|
||||
err = flashWaitErase((BaseFlash *)&m25q);
|
||||
if (err != FLASH_NO_ERROR)
|
||||
chSysHalt("erase error");
|
||||
|
||||
/* Verifying the erase operation.*/
|
||||
err = flashVerifyErase(&m25q, 0);
|
||||
if (err != FLASH_NO_ERROR)
|
||||
chSysHalt("verify erase error");
|
||||
|
||||
/* Programming a pattern.*/
|
||||
err = flashProgram(&m25q, 0, 128, pattern);
|
||||
if (err != FLASH_NO_ERROR)
|
||||
chSysHalt("program error");
|
||||
|
||||
/* Verifying the erase operation.*/
|
||||
err = flashVerifyErase(&m25q, 0);
|
||||
if (err != FLASH_ERROR_VERIFY)
|
||||
chSysHalt("verify non-erase error");
|
||||
|
||||
/* Memory mapping the device.*/
|
||||
m25qMemoryMap(&m25q, &addr);
|
||||
|
||||
/* Unmapping the device.*/
|
||||
m25qMemoryUnmap(&m25q);
|
||||
|
||||
/* Reading it back.*/
|
||||
memset(buffer, 0, 128);
|
||||
err = flashRead(&m25q, 16, 128, buffer);
|
||||
if (err != FLASH_NO_ERROR)
|
||||
chSysHalt("read error");
|
||||
|
||||
/* Reading it back.*/
|
||||
memset(buffer, 0, 128);
|
||||
err = flashRead(&m25q, 0, 128, buffer);
|
||||
if (err != FLASH_NO_ERROR)
|
||||
chSysHalt("read error");
|
||||
|
||||
/* Erasing again.*/
|
||||
(void) flashStartEraseSector(&m25q, 0);
|
||||
err = flashWaitErase((BaseFlash *)&m25q);
|
||||
if (err != FLASH_NO_ERROR)
|
||||
chSysHalt("erase error");
|
||||
|
||||
/*
|
||||
* Normal main() thread activity, in this demo it does nothing.
|
||||
*/
|
||||
while (true) {
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
return 0;
|
||||
}
|
|
@ -1,327 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* STM32L4xx drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 15...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
#ifndef MCUCONF_H
|
||||
#define MCUCONF_H
|
||||
|
||||
#define STM32L4xx_MCUCONF
|
||||
#define STM32L476_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_VOS STM32_VOS_RANGE1
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_HSI16_ENABLED FALSE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED FALSE
|
||||
#define STM32_LSE_ENABLED TRUE
|
||||
#define STM32_MSIPLL_ENABLED TRUE
|
||||
#define STM32_MSIRANGE STM32_MSIRANGE_4M
|
||||
#define STM32_MSISRANGE STM32_MSISRANGE_4M
|
||||
#define STM32_SW STM32_SW_PLL
|
||||
#define STM32_PLLSRC STM32_PLLSRC_MSI
|
||||
#define STM32_PLLM_VALUE 1
|
||||
#define STM32_PLLN_VALUE 80
|
||||
#define STM32_PLLP_VALUE 7
|
||||
#define STM32_PLLQ_VALUE 6
|
||||
#define STM32_PLLR_VALUE 4
|
||||
#define STM32_HPRE STM32_HPRE_DIV1
|
||||
#define STM32_PPRE1 STM32_PPRE1_DIV1
|
||||
#define STM32_PPRE2 STM32_PPRE2_DIV1
|
||||
#define STM32_STOPWUCK STM32_STOPWUCK_MSI
|
||||
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
|
||||
#define STM32_MCOPRE STM32_MCOPRE_DIV1
|
||||
#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
|
||||
#define STM32_PLLSAI1N_VALUE 72
|
||||
#define STM32_PLLSAI1P_VALUE 7
|
||||
#define STM32_PLLSAI1Q_VALUE 6
|
||||
#define STM32_PLLSAI1R_VALUE 6
|
||||
#define STM32_PLLSAI2N_VALUE 72
|
||||
#define STM32_PLLSAI2P_VALUE 7
|
||||
#define STM32_PLLSAI2R_VALUE 6
|
||||
|
||||
/*
|
||||
* Peripherals clock sources.
|
||||
*/
|
||||
#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
|
||||
#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
|
||||
#define STM32_USART3SEL STM32_USART3SEL_SYSCLK
|
||||
#define STM32_UART4SEL STM32_UART4SEL_SYSCLK
|
||||
#define STM32_UART5SEL STM32_UART5SEL_SYSCLK
|
||||
#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK
|
||||
#define STM32_I2C1SEL STM32_I2C1SEL_SYSCLK
|
||||
#define STM32_I2C2SEL STM32_I2C2SEL_SYSCLK
|
||||
#define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK
|
||||
#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1
|
||||
#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1
|
||||
#define STM32_SAI1SEL STM32_SAI1SEL_OFF
|
||||
#define STM32_SAI2SEL STM32_SAI2SEL_OFF
|
||||
#define STM32_CLK48SEL STM32_CLK48SEL_PLLSAI1
|
||||
#define STM32_ADCSEL STM32_ADCSEL_SYSCLK
|
||||
#define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1
|
||||
#define STM32_DFSDMSEL STM32_DFSDMSEL_PCLK2
|
||||
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||
|
||||
/*
|
||||
* IRQ system settings.
|
||||
*/
|
||||
#define STM32_IRQ_EXTI0_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI1_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI2_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI3_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI4_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI5_9_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI10_15_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI1635_38_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI18_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI19_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI20_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI21_22_PRIORITY 6
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
#define STM32_ADC_DUAL_MODE FALSE
|
||||
#define STM32_ADC_COMPACT_SAMPLES FALSE
|
||||
#define STM32_ADC_USE_ADC1 FALSE
|
||||
#define STM32_ADC_USE_ADC2 FALSE
|
||||
#define STM32_ADC_USE_ADC3 FALSE
|
||||
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
|
||||
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC2_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC3_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC12_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC3_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
|
||||
|
||||
/*
|
||||
* CAN driver system settings.
|
||||
*/
|
||||
#define STM32_CAN_USE_CAN1 FALSE
|
||||
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
|
||||
|
||||
/*
|
||||
* DAC driver system settings.
|
||||
*/
|
||||
#define STM32_DAC_DUAL_MODE FALSE
|
||||
#define STM32_DAC_USE_DAC1_CH1 FALSE
|
||||
#define STM32_DAC_USE_DAC1_CH2 FALSE
|
||||
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
|
||||
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
|
||||
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
|
||||
#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
|
||||
#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
|
||||
/*
|
||||
* GPT driver system settings.
|
||||
*/
|
||||
#define STM32_GPT_USE_TIM1 FALSE
|
||||
#define STM32_GPT_USE_TIM2 FALSE
|
||||
#define STM32_GPT_USE_TIM3 FALSE
|
||||
#define STM32_GPT_USE_TIM4 FALSE
|
||||
#define STM32_GPT_USE_TIM5 FALSE
|
||||
#define STM32_GPT_USE_TIM6 FALSE
|
||||
#define STM32_GPT_USE_TIM7 FALSE
|
||||
#define STM32_GPT_USE_TIM8 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
*/
|
||||
#define STM32_I2C_USE_I2C1 FALSE
|
||||
#define STM32_I2C_USE_I2C2 FALSE
|
||||
#define STM32_I2C_USE_I2C3 FALSE
|
||||
#define STM32_I2C_BUSY_TIMEOUT 50
|
||||
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C3_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C1_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C2_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C3_DMA_PRIORITY 3
|
||||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ICU driver system settings.
|
||||
*/
|
||||
#define STM32_ICU_USE_TIM1 FALSE
|
||||
#define STM32_ICU_USE_TIM2 FALSE
|
||||
#define STM32_ICU_USE_TIM3 FALSE
|
||||
#define STM32_ICU_USE_TIM4 FALSE
|
||||
#define STM32_ICU_USE_TIM5 FALSE
|
||||
#define STM32_ICU_USE_TIM8 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
#define STM32_PWM_USE_TIM4 FALSE
|
||||
#define STM32_PWM_USE_TIM5 FALSE
|
||||
#define STM32_PWM_USE_TIM8 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* SDC driver system settings.
|
||||
*/
|
||||
#define STM32_SDC_USE_SDMMC1 FALSE
|
||||
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
|
||||
#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
|
||||
#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
|
||||
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
|
||||
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
|
||||
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
|
||||
#define STM32_SDC_SDMMC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define STM32_SERIAL_USE_USART1 FALSE
|
||||
#define STM32_SERIAL_USE_USART2 TRUE
|
||||
#define STM32_SERIAL_USE_USART3 FALSE
|
||||
#define STM32_SERIAL_USE_UART4 FALSE
|
||||
#define STM32_SERIAL_USE_UART5 FALSE
|
||||
#define STM32_SERIAL_USE_LPUART1 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||
#define STM32_SERIAL_USART3_PRIORITY 12
|
||||
#define STM32_SERIAL_UART4_PRIORITY 12
|
||||
#define STM32_SERIAL_UART5_PRIORITY 12
|
||||
#define STM32_SERIAL_LPUART1_PRIORITY 12
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
*/
|
||||
#define STM32_SPI_USE_SPI1 FALSE
|
||||
#define STM32_SPI_USE_SPI2 FALSE
|
||||
#define STM32_SPI_USE_SPI3 FALSE
|
||||
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||
#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ST driver system settings.
|
||||
*/
|
||||
#define STM32_ST_IRQ_PRIORITY 8
|
||||
#define STM32_ST_USE_TIMER 2
|
||||
|
||||
/*
|
||||
* UART driver system settings.
|
||||
*/
|
||||
#define STM32_UART_USE_USART1 FALSE
|
||||
#define STM32_UART_USE_USART2 FALSE
|
||||
#define STM32_UART_USE_USART3 FALSE
|
||||
#define STM32_UART_USE_UART4 FALSE
|
||||
#define STM32_UART_USE_UART5 FALSE
|
||||
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
|
||||
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||
#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART3_IRQ_PRIORITY 12
|
||||
#define STM32_UART_UART4_IRQ_PRIORITY 12
|
||||
#define STM32_UART_UART5_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART3_DMA_PRIORITY 0
|
||||
#define STM32_UART_UART4_DMA_PRIORITY 0
|
||||
#define STM32_UART_UART5_DMA_PRIORITY 0
|
||||
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
#define STM32_USB_USE_OTG1 FALSE
|
||||
#define STM32_USB_OTG1_IRQ_PRIORITY 14
|
||||
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
*/
|
||||
#define STM32_WDG_USE_IWDG FALSE
|
||||
|
||||
/*
|
||||
* WSPI driver system settings.
|
||||
*/
|
||||
#define STM32_WSPI_USE_QUADSPI1 FALSE
|
||||
#define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
|
||||
#endif /* MCUCONF_H */
|
|
@ -1,26 +0,0 @@
|
|||
*****************************************************************************
|
||||
** ChibiOS/HAL - CAN driver demo for STM32. **
|
||||
*****************************************************************************
|
||||
|
||||
** TARGET **
|
||||
|
||||
The demo runs on an STM32 Nucleo64-L476RG board.
|
||||
|
||||
** The Demo **
|
||||
|
||||
The application demonstrates the use of the STM32 CAN driver.
|
||||
|
||||
** Build Procedure **
|
||||
|
||||
The demo has been tested using the free Codesourcery GCC-based toolchain
|
||||
and YAGARTO.
|
||||
Just modify the TRGT line in the makefile in order to use different GCC ports.
|
||||
|
||||
** Notes **
|
||||
|
||||
Some files used by the demo are not part of ChibiOS/RT but are copyright of
|
||||
ST Microelectronics and are licensed under a different license.
|
||||
Also note that not all the files present in the ST library are distributed
|
||||
with ChibiOS/RT, you can find the whole library on the ST web site:
|
||||
|
||||
http://www.st.com
|
|
@ -1,91 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="0.365230168">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.365230168" moduleId="org.eclipse.cdt.core.settings" name="Default">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.365230168" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
|
||||
<folderInfo id="0.365230168." name="/" resourcePath="">
|
||||
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1592595440" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
|
||||
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.1592595440.637356496" name=""/>
|
||||
<builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.1732344953" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1315058086" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.825931904" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1011311385" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.337458123" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.262921049" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.907816742" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.480793473" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
<cconfiguration id="0.365230168.523175374">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.365230168.523175374" moduleId="org.eclipse.cdt.core.settings" name="Build for STM32L476-Discovery">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.365230168.523175374" name="Build for STM32L476-Discovery" parent="org.eclipse.cdt.build.core.prefbase.cfg">
|
||||
<folderInfo id="0.365230168.523175374." name="/" resourcePath="">
|
||||
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.124389761" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
|
||||
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.124389761.992557722" name=""/>
|
||||
<builder arguments="-f ./make/stm32l476_discovery.make" autoBuildTarget="all" cleanBuildTarget="clean" command="make" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.1620348671" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.2028265701" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1630561656" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.548788694" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.2005553115" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1764846955" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.716247459" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.406717998" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="STM32-QSPI-MFS.null.1829068891" name="STM32-QSPI-MFS"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
<configuration configurationName="Default">
|
||||
<resource resourceType="PROJECT" workspacePath="/STM32-QSPI-MFS"/>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="0.365230168.523175374">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="0.365230168">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
</cproject>
|
|
@ -1,100 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>STM32-QSPI-MFS</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
<dictionary>
|
||||
<key>?name?</key>
|
||||
<value></value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.append_environment</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
|
||||
<value>all</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildArguments</key>
|
||||
<value>-j1</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildCommand</key>
|
||||
<value>make</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
|
||||
<value>clean</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.contents</key>
|
||||
<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
|
||||
<value>false</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableFullBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
|
||||
<value>all</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.stopOnError</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>os</name>
|
||||
<type>2</type>
|
||||
<locationURI>CHIBIOS/os</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>test</name>
|
||||
<type>2</type>
|
||||
<locationURI>virtual:/virtual</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>test/lib</name>
|
||||
<type>2</type>
|
||||
<locationURI>CHIBIOS/test/lib</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>test/mfs</name>
|
||||
<type>2</type>
|
||||
<locationURI>CHIBIOS/test/mfs</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
</projectDescription>
|
|
@ -1,18 +0,0 @@
|
|||
##############################################################################
|
||||
# Multi-project makefile rules
|
||||
#
|
||||
|
||||
all:
|
||||
@echo
|
||||
@echo === Building for STM32L476-Discovery ===============================
|
||||
+@make --no-print-directory -f ./make/stm32l476_discovery.make all
|
||||
@echo ====================================================================
|
||||
@echo
|
||||
|
||||
clean:
|
||||
@echo
|
||||
+@make --no-print-directory -f ./make/stm32l476_discovery.make clean
|
||||
@echo
|
||||
|
||||
#
|
||||
##############################################################################
|
|
@ -1,714 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/chconf.h
|
||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
|
||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef CHCONF_H
|
||||
#define CHCONF_H
|
||||
|
||||
#define _CHIBIOS_RT_CONF_
|
||||
#define _CHIBIOS_RT_CONF_VER_6_0_
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System timers settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_RESOLUTION)
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_FREQUENCY)
|
||||
#define CH_CFG_ST_FREQUENCY 10000
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Time intervals data size.
|
||||
* @note Allowed values are 16, 32 or 64 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_INTERVALS_SIZE)
|
||||
#define CH_CFG_INTERVALS_SIZE 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Time types data size.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_TIME_TYPES_SIZE)
|
||||
#define CH_CFG_TIME_TYPES_SIZE 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Time delta constant for the tick-less mode.
|
||||
* @note If this value is zero then the system uses the classic
|
||||
* periodic tick. This value represents the minimum number
|
||||
* of ticks that is safe to specify in a timeout directive.
|
||||
* The value one is not valid, timeouts are rounded up to
|
||||
* this value.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_TIMEDELTA)
|
||||
#define CH_CFG_ST_TIMEDELTA 2
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel parameters and options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
* @note The round robin preemption is not supported in tickless mode and
|
||||
* must be set to zero in that case.
|
||||
*/
|
||||
#if !defined(CH_CFG_TIME_QUANTUM)
|
||||
#define CH_CFG_TIME_QUANTUM 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||
*/
|
||||
#if !defined(CH_CFG_MEMCORE_SIZE)
|
||||
#define CH_CFG_MEMCORE_SIZE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread. The application @p main()
|
||||
* function becomes the idle thread and must implement an
|
||||
* infinite loop.
|
||||
*/
|
||||
#if !defined(CH_CFG_NO_IDLE_THREAD)
|
||||
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Performance options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_OPTIMIZE_SPEED)
|
||||
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Subsystem options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Time Measurement APIs.
|
||||
* @details If enabled then the time measurement APIs are included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_TM)
|
||||
#define CH_CFG_USE_TM TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_REGISTRY)
|
||||
#define CH_CFG_USE_REGISTRY TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_WAITEXIT)
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_SEMAPHORES)
|
||||
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
|
||||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MUTEXES)
|
||||
#define CH_CFG_USE_MUTEXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables recursive behavior on mutexes.
|
||||
* @note Recursive mutexes are heavier and have an increased
|
||||
* memory footprint.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
|
||||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_CONDVARS)
|
||||
#define CH_CFG_USE_CONDVARS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
|
||||
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_EVENTS)
|
||||
#define CH_CFG_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
|
||||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MESSAGES)
|
||||
#define CH_CFG_USE_MESSAGES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
|
||||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MAILBOXES)
|
||||
#define CH_CFG_USE_MAILBOXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MEMCORE)
|
||||
#define CH_CFG_USE_MEMCORE TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||
* @p CH_CFG_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_HEAP)
|
||||
#define CH_CFG_USE_HEAP TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MEMPOOLS)
|
||||
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Objects FIFOs APIs.
|
||||
* @details If enabled then the objects FIFOs APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_OBJ_FIFOS)
|
||||
#define CH_CFG_USE_OBJ_FIFOS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Pipes APIs.
|
||||
* @details If enabled then the pipes APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_PIPES)
|
||||
#define CH_CFG_USE_PIPES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_DYNAMIC)
|
||||
#define CH_CFG_USE_DYNAMIC TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Objects factory options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Objects Factory APIs.
|
||||
* @details If enabled then the objects factory APIs are included in the
|
||||
* kernel.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_FACTORY)
|
||||
#define CH_CFG_USE_FACTORY TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Maximum length for object names.
|
||||
* @details If the specified length is zero then the name is stored by
|
||||
* pointer but this could have unintended side effects.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
|
||||
#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the registry of generic objects.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
|
||||
#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for generic buffers.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
|
||||
#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for semaphores.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_SEMAPHORES)
|
||||
#define CH_CFG_FACTORY_SEMAPHORES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for mailboxes.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_MAILBOXES)
|
||||
#define CH_CFG_FACTORY_MAILBOXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for objects FIFOs.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
|
||||
#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for Pipes.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
|
||||
#define CH_CFG_FACTORY_PIPES TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Debug options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_STATISTICS)
|
||||
#define CH_DBG_STATISTICS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_CHECKS)
|
||||
#define CH_DBG_ENABLE_CHECKS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_ASSERTS)
|
||||
#define CH_DBG_ENABLE_ASSERTS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the trace buffer is activated.
|
||||
*
|
||||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#if !defined(CH_DBG_TRACE_MASK)
|
||||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Trace buffer entries.
|
||||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
|
||||
* different from @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
|
||||
#define CH_DBG_TRACE_BUFFER_SIZE 128
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_STACK_CHECK)
|
||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_FILL_THREADS)
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#if !defined(CH_DBG_THREADS_PROFILING)
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System structure extension.
|
||||
* @details User fields added to the end of the @p ch_system_t structure.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief System initialization hook.
|
||||
* @details User initialization code added to the @p chSysInit() function
|
||||
* just before interrupts are enabled globally.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_INIT_HOOK() { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p _thread_init() function.
|
||||
*
|
||||
* @note It is invoked from within @p _thread_init() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR enter hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
|
||||
/* IRQ prologue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR exit hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
|
||||
/* IRQ epilogue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
/* Idle-enter code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread leave hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
/* Idle-leave code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Trace hook.
|
||||
* @details This hook is invoked each time a new record is written in the
|
||||
* trace buffer.
|
||||
*/
|
||||
#define CH_CFG_TRACE_HOOK(tep) { \
|
||||
/* Trace code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* CHCONF_H */
|
||||
|
||||
/** @} */
|
|
@ -1,532 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef HALCONF_H
|
||||
#define HALCONF_H
|
||||
|
||||
#define _CHIBIOS_HAL_CONF_
|
||||
#define _CHIBIOS_HAL_CONF_VER_6_0_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the cryptographic subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CRY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EXT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EXT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2S subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2S FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SIO subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SIO FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the TRNG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_TRNG FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WDG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WDG FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WSPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WSPI FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* PAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
|
||||
#define PAL_USE_CALLBACKS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define PAL_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enforces the driver to use direct callbacks rather than OSAL events.
|
||||
*/
|
||||
#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
|
||||
#define CAN_ENFORCE_USE_CALLBACKS FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CRY driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the SW fall-back of the cryptographic driver.
|
||||
* @details When enabled, this option, activates a fall-back software
|
||||
* implementation for algorithms not supported by the underlying
|
||||
* hardware.
|
||||
* @note Fall-back implementations may not be present for all algorithms.
|
||||
*/
|
||||
#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
|
||||
#define HAL_CRY_USE_FALLBACK FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Makes the driver forcibly use the fall-back implementations.
|
||||
*/
|
||||
#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
|
||||
#define HAL_CRY_ENFORCE_FALLBACK FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* DAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define DAC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define DAC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the zero-copy API.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief OCR initialization constant for V20 cards.
|
||||
*/
|
||||
#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_OCR_V20 0x50FF8000U
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief OCR initialization constant for non-V20 cards.
|
||||
*/
|
||||
#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_OCR 0x80100000U
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 16 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL_USB driver related setting. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Serial over USB buffers size.
|
||||
* @details Configuration parameter, the buffer size must be a multiple of
|
||||
* the USB data endpoint maximum packet size.
|
||||
* @note The default is 256 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial over USB number of buffers.
|
||||
* @note The default is 2 buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_NUMBER 2
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables circular transfers APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_CIRCULAR FALSE
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Handling method for SPI CS line.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
|
||||
#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* UART driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define UART_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define UART_USE_MUTUAL_EXCLUSION FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* USB driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define USB_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* WSPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define WSPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define WSPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
#endif /* HALCONF_H */
|
||||
|
||||
/** @} */
|
|
@ -1,327 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* STM32L4xx drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 15...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
#ifndef MCUCONF_H
|
||||
#define MCUCONF_H
|
||||
|
||||
#define STM32L4xx_MCUCONF
|
||||
#define STM32L476_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_VOS STM32_VOS_RANGE1
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_HSI16_ENABLED TRUE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED FALSE
|
||||
#define STM32_LSE_ENABLED TRUE
|
||||
#define STM32_MSIPLL_ENABLED TRUE
|
||||
#define STM32_MSIRANGE STM32_MSIRANGE_48M
|
||||
#define STM32_MSISRANGE STM32_MSISRANGE_4M
|
||||
#define STM32_SW STM32_SW_PLL
|
||||
#define STM32_PLLSRC STM32_PLLSRC_HSI16
|
||||
#define STM32_PLLM_VALUE 4
|
||||
#define STM32_PLLN_VALUE 80
|
||||
#define STM32_PLLP_VALUE 7
|
||||
#define STM32_PLLQ_VALUE 6
|
||||
#define STM32_PLLR_VALUE 4
|
||||
#define STM32_HPRE STM32_HPRE_DIV1
|
||||
#define STM32_PPRE1 STM32_PPRE1_DIV1
|
||||
#define STM32_PPRE2 STM32_PPRE2_DIV1
|
||||
#define STM32_STOPWUCK STM32_STOPWUCK_MSI
|
||||
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
|
||||
#define STM32_MCOPRE STM32_MCOPRE_DIV1
|
||||
#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
|
||||
#define STM32_PLLSAI1N_VALUE 72
|
||||
#define STM32_PLLSAI1P_VALUE 7
|
||||
#define STM32_PLLSAI1Q_VALUE 6
|
||||
#define STM32_PLLSAI1R_VALUE 6
|
||||
#define STM32_PLLSAI2N_VALUE 72
|
||||
#define STM32_PLLSAI2P_VALUE 7
|
||||
#define STM32_PLLSAI2R_VALUE 6
|
||||
|
||||
/*
|
||||
* Peripherals clock sources.
|
||||
*/
|
||||
#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
|
||||
#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
|
||||
#define STM32_USART3SEL STM32_USART3SEL_SYSCLK
|
||||
#define STM32_UART4SEL STM32_UART4SEL_SYSCLK
|
||||
#define STM32_UART5SEL STM32_UART5SEL_SYSCLK
|
||||
#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK
|
||||
#define STM32_I2C1SEL STM32_I2C1SEL_SYSCLK
|
||||
#define STM32_I2C2SEL STM32_I2C2SEL_SYSCLK
|
||||
#define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK
|
||||
#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1
|
||||
#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1
|
||||
#define STM32_SAI1SEL STM32_SAI1SEL_OFF
|
||||
#define STM32_SAI2SEL STM32_SAI2SEL_OFF
|
||||
#define STM32_CLK48SEL STM32_CLK48SEL_MSI
|
||||
#define STM32_ADCSEL STM32_ADCSEL_SYSCLK
|
||||
#define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1
|
||||
#define STM32_DFSDMSEL STM32_DFSDMSEL_PCLK2
|
||||
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||
|
||||
/*
|
||||
* IRQ system settings.
|
||||
*/
|
||||
#define STM32_IRQ_EXTI0_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI1_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI2_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI3_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI4_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI5_9_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI10_15_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI1635_38_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI18_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI19_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI20_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI21_22_PRIORITY 15
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
#define STM32_ADC_DUAL_MODE FALSE
|
||||
#define STM32_ADC_COMPACT_SAMPLES FALSE
|
||||
#define STM32_ADC_USE_ADC1 FALSE
|
||||
#define STM32_ADC_USE_ADC2 FALSE
|
||||
#define STM32_ADC_USE_ADC3 FALSE
|
||||
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
|
||||
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC2_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC3_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC12_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC3_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
|
||||
|
||||
/*
|
||||
* CAN driver system settings.
|
||||
*/
|
||||
#define STM32_CAN_USE_CAN1 FALSE
|
||||
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
|
||||
|
||||
/*
|
||||
* DAC driver system settings.
|
||||
*/
|
||||
#define STM32_DAC_DUAL_MODE FALSE
|
||||
#define STM32_DAC_USE_DAC1_CH1 FALSE
|
||||
#define STM32_DAC_USE_DAC1_CH2 FALSE
|
||||
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
|
||||
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
|
||||
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
|
||||
#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
|
||||
#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
|
||||
/*
|
||||
* GPT driver system settings.
|
||||
*/
|
||||
#define STM32_GPT_USE_TIM1 FALSE
|
||||
#define STM32_GPT_USE_TIM2 FALSE
|
||||
#define STM32_GPT_USE_TIM3 FALSE
|
||||
#define STM32_GPT_USE_TIM4 FALSE
|
||||
#define STM32_GPT_USE_TIM5 FALSE
|
||||
#define STM32_GPT_USE_TIM6 FALSE
|
||||
#define STM32_GPT_USE_TIM7 FALSE
|
||||
#define STM32_GPT_USE_TIM8 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
*/
|
||||
#define STM32_I2C_USE_I2C1 FALSE
|
||||
#define STM32_I2C_USE_I2C2 FALSE
|
||||
#define STM32_I2C_USE_I2C3 FALSE
|
||||
#define STM32_I2C_BUSY_TIMEOUT 50
|
||||
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C3_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C1_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C2_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C3_DMA_PRIORITY 3
|
||||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ICU driver system settings.
|
||||
*/
|
||||
#define STM32_ICU_USE_TIM1 FALSE
|
||||
#define STM32_ICU_USE_TIM2 FALSE
|
||||
#define STM32_ICU_USE_TIM3 FALSE
|
||||
#define STM32_ICU_USE_TIM4 FALSE
|
||||
#define STM32_ICU_USE_TIM5 FALSE
|
||||
#define STM32_ICU_USE_TIM8 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
#define STM32_PWM_USE_TIM4 FALSE
|
||||
#define STM32_PWM_USE_TIM5 FALSE
|
||||
#define STM32_PWM_USE_TIM8 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* SDC driver system settings.
|
||||
*/
|
||||
#define STM32_SDC_USE_SDMMC1 FALSE
|
||||
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
|
||||
#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
|
||||
#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
|
||||
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
|
||||
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
|
||||
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
|
||||
#define STM32_SDC_SDMMC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define STM32_SERIAL_USE_USART1 FALSE
|
||||
#define STM32_SERIAL_USE_USART2 TRUE
|
||||
#define STM32_SERIAL_USE_USART3 FALSE
|
||||
#define STM32_SERIAL_USE_UART4 FALSE
|
||||
#define STM32_SERIAL_USE_UART5 FALSE
|
||||
#define STM32_SERIAL_USE_LPUART1 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||
#define STM32_SERIAL_USART3_PRIORITY 12
|
||||
#define STM32_SERIAL_UART4_PRIORITY 12
|
||||
#define STM32_SERIAL_UART5_PRIORITY 12
|
||||
#define STM32_SERIAL_LPUART1_PRIORITY 12
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
*/
|
||||
#define STM32_SPI_USE_SPI1 FALSE
|
||||
#define STM32_SPI_USE_SPI2 FALSE
|
||||
#define STM32_SPI_USE_SPI3 FALSE
|
||||
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||
#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ST driver system settings.
|
||||
*/
|
||||
#define STM32_ST_IRQ_PRIORITY 8
|
||||
#define STM32_ST_USE_TIMER 2
|
||||
|
||||
/*
|
||||
* UART driver system settings.
|
||||
*/
|
||||
#define STM32_UART_USE_USART1 FALSE
|
||||
#define STM32_UART_USE_USART2 FALSE
|
||||
#define STM32_UART_USE_USART3 FALSE
|
||||
#define STM32_UART_USE_UART4 FALSE
|
||||
#define STM32_UART_USE_UART5 FALSE
|
||||
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
|
||||
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||
#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART3_IRQ_PRIORITY 12
|
||||
#define STM32_UART_UART4_IRQ_PRIORITY 12
|
||||
#define STM32_UART_UART5_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART3_DMA_PRIORITY 0
|
||||
#define STM32_UART_UART4_DMA_PRIORITY 0
|
||||
#define STM32_UART_UART5_DMA_PRIORITY 0
|
||||
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
#define STM32_USB_USE_OTG1 FALSE
|
||||
#define STM32_USB_OTG1_IRQ_PRIORITY 14
|
||||
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
*/
|
||||
#define STM32_WDG_USE_IWDG FALSE
|
||||
|
||||
/*
|
||||
* WSPI driver system settings.
|
||||
*/
|
||||
#define STM32_WSPI_USE_QUADSPI1 FALSE
|
||||
#define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
|
||||
#endif /* MCUCONF_H */
|
|
@ -1,61 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file portab.c
|
||||
* @brief Application portability module code.
|
||||
*
|
||||
* @addtogroup application_portability
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#include "portab.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module local types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module local variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
void portab_setup(void) {
|
||||
|
||||
/*
|
||||
* LED line as output.
|
||||
*/
|
||||
palSetLineMode(LINE_LED_GREEN, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
}
|
||||
|
||||
/** @} */
|
|
@ -1,76 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file portab.h
|
||||
* @brief Application portability macros and structures.
|
||||
*
|
||||
* @addtogroup application_portability
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef PORTAB_H
|
||||
#define PORTAB_H
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define PORTAB_LINE_LED1 LINE_LED_GREEN
|
||||
#define PORTAB_LINE_LED2 LINE_LED_RED
|
||||
#define PORTAB_LED_OFF PAL_LOW
|
||||
#define PORTAB_LED_ON PAL_HIGH
|
||||
|
||||
#define PORTAB_LINE_BUTTON LINE_JOY_CENTER
|
||||
#define PORTAB_BUTTON_PRESSED PAL_HIGH
|
||||
|
||||
#define PORTAB_SD1 SD2
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void portab_setup(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module inline functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* PORTAB_H */
|
||||
|
||||
/** @} */
|
|
@ -1,52 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
|
||||
<stringAttribute key="bad_container_name" value="\STM32-QSPI-MFS\debug"/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="1"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="set remotetimeout 20 monitor reset init monitor sleep 50 "/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
|
||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="xPSR-(format)" val="4"/><content id="mfs_buffer[447]-null-mfs_test_001_005_execute-(format)" val="0"/><content id="mfs_buffer[507]-null-mfs_test_001_005_execute-(format)" val="0"/><content id="rp[506]-rp-mfs_flash_read-(format)" val="0"/><content id="rp[507]-rp-mfs_flash_read-(format)" val="0"/><content id="rp-mfs_flash_read-(cast_to_array)" val="0:511"/></contentList>"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList> <memoryBlockExpressionItem> <expression text="0x20000c34"/> </memoryBlockExpressionItem> </memoryBlockExpressionList> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${selected_resource_loc}"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32-QSPI-MFS"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/STM32-QSPI-MFS"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
||||
<listEntry value="4"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
|
||||
<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
|
||||
</listAttribute>
|
||||
</launchConfiguration>
|
|
@ -1,52 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
|
||||
<stringAttribute key="bad_container_name" value="\STM32-QSPI-MFS\debug"/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="1"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="set remotetimeout 20 monitor reset init monitor sleep 50 "/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
|
||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="xPSR-(format)" val="4"/></contentList>"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList> <memoryBlockExpressionItem> <expression text="0x40021004"/> </memoryBlockExpressionItem> </memoryBlockExpressionList> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${selected_resource_loc}"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32-QSPI-MFS"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/STM32-QSPI-MFS"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
||||
<listEntry value="4"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
|
||||
<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
|
||||
</listAttribute>
|
||||
</launchConfiguration>
|
|
@ -1,104 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#include "m25q.h"
|
||||
#include "mfs.h"
|
||||
|
||||
#include "mfs_test_root.h"
|
||||
|
||||
#include "portab.h"
|
||||
|
||||
/* 16MB device, 2 cycles delay after NCS.*/
|
||||
const QSPIConfig qspicfg1 = {
|
||||
.end_cb = NULL,
|
||||
.dcr = STM32_DCR_FSIZE(24) | STM32_DCR_CSHT(1)
|
||||
};
|
||||
|
||||
const M25QConfig m25qcfg1 = {
|
||||
.busp = &QSPID1,
|
||||
.buscfg = &qspicfg1
|
||||
};
|
||||
|
||||
M25QDriver m25q;
|
||||
|
||||
const MFSConfig mfscfg1 = {
|
||||
.flashp = (BaseFlash *)&m25q,
|
||||
.erased = 0xFFFFFFFFU,
|
||||
.bank_size = 4096U,
|
||||
.bank0_start = 0U,
|
||||
.bank0_sectors = 1U,
|
||||
.bank1_start = 1U,
|
||||
.bank1_sectors = 1U
|
||||
};
|
||||
|
||||
/*
|
||||
* LED blinker thread, times are in milliseconds.
|
||||
*/
|
||||
static THD_WORKING_AREA(waThread1, 128);
|
||||
static THD_FUNCTION(Thread1, arg) {
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("blinker");
|
||||
while (true) {
|
||||
palToggleLine(PORTAB_LINE_LED1);
|
||||
chThdSleepMilliseconds(500);
|
||||
palToggleLine(PORTAB_LINE_LED1);
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Application entry point.
|
||||
*/
|
||||
int main(void) {
|
||||
|
||||
/*
|
||||
* System initializations.
|
||||
* - HAL initialization, this also initializes the configured device drivers
|
||||
* and performs the board-specific initializations.
|
||||
* - Kernel initialization, the main() function becomes a thread and the
|
||||
* RTOS is active.
|
||||
*/
|
||||
halInit();
|
||||
chSysInit();
|
||||
|
||||
/*Board-dependent GPIO setup code.*/
|
||||
portab_setup();
|
||||
|
||||
/* Starting a serial port for test report output.*/
|
||||
sdStart(&PORTAB_SD1, NULL);
|
||||
|
||||
/* Initializing and starting M25Q driver.*/
|
||||
m25qObjectInit(&m25q);
|
||||
m25qStart(&m25q, &m25qcfg1);
|
||||
|
||||
/* Creates the blinker thread.*/
|
||||
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
|
||||
|
||||
/* Normal main() thread activity, in this demo it does nothing.*/
|
||||
while (true) {
|
||||
if (palReadLine(PORTAB_LINE_BUTTON) == PORTAB_BUTTON_PRESSED) {
|
||||
test_execute((BaseSequentialStream *)&PORTAB_SD1, &mfs_test_suite);
|
||||
}
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
return 0;
|
||||
}
|
|
@ -1,228 +0,0 @@
|
|||
##############################################################################
|
||||
# Build global options
|
||||
# NOTE: Can be overridden externally.
|
||||
#
|
||||
|
||||
# Compiler options here.
|
||||
ifeq ($(USE_OPT),)
|
||||
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
|
||||
endif
|
||||
|
||||
# C specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_COPT),)
|
||||
USE_COPT =
|
||||
endif
|
||||
|
||||
# C++ specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_CPPOPT),)
|
||||
USE_CPPOPT = -fno-rtti
|
||||
endif
|
||||
|
||||
# Enable this if you want the linker to remove unused code and data
|
||||
ifeq ($(USE_LINK_GC),)
|
||||
USE_LINK_GC = yes
|
||||
endif
|
||||
|
||||
# Linker extra options here.
|
||||
ifeq ($(USE_LDOPT),)
|
||||
USE_LDOPT =
|
||||
endif
|
||||
|
||||
# Enable this if you want link time optimizations (LTO)
|
||||
ifeq ($(USE_LTO),)
|
||||
USE_LTO = yes
|
||||
endif
|
||||
|
||||
# If enabled, this option allows to compile the application in THUMB mode.
|
||||
ifeq ($(USE_THUMB),)
|
||||
USE_THUMB = yes
|
||||
endif
|
||||
|
||||
# Enable this if you want to see the full log while compiling.
|
||||
ifeq ($(USE_VERBOSE_COMPILE),)
|
||||
USE_VERBOSE_COMPILE = no
|
||||
endif
|
||||
|
||||
# If enabled, this option makes the build process faster by not compiling
|
||||
# modules not used in the current configuration.
|
||||
ifeq ($(USE_SMART_BUILD),)
|
||||
USE_SMART_BUILD = yes
|
||||
endif
|
||||
|
||||
#
|
||||
# Build global options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Architecture or project specific options
|
||||
#
|
||||
|
||||
# Stack size to be allocated to the Cortex-M process stack. This stack is
|
||||
# the stack used by the main() thread.
|
||||
ifeq ($(USE_PROCESS_STACKSIZE),)
|
||||
USE_PROCESS_STACKSIZE = 0x400
|
||||
endif
|
||||
|
||||
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
|
||||
# stack is used for processing interrupts and exceptions.
|
||||
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
|
||||
USE_EXCEPTIONS_STACKSIZE = 0x400
|
||||
endif
|
||||
|
||||
# Enables the use of FPU (no, softfp, hard).
|
||||
ifeq ($(USE_FPU),)
|
||||
USE_FPU = no
|
||||
endif
|
||||
|
||||
# FPU-related options.
|
||||
ifeq ($(USE_FPU_OPT),)
|
||||
USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 -fsingle-precision-constant
|
||||
endif
|
||||
|
||||
#
|
||||
# Architecture or project specific options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Project, sources and paths
|
||||
#
|
||||
|
||||
# Define project name here
|
||||
PROJECT = ch
|
||||
|
||||
# Imported source files and paths
|
||||
CHIBIOS := ../../../..
|
||||
CONFDIR := ./cfg/stm32l476_discovery
|
||||
BUILDDIR := ./build/stm32l476_discovery
|
||||
DEPDIR := ./.dep/stm32l476_discovery
|
||||
|
||||
# Licensing files.
|
||||
include $(CHIBIOS)/os/license/license.mk
|
||||
# Startup files.
|
||||
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk
|
||||
# HAL-OSAL files (optional).
|
||||
include $(CHIBIOS)/os/hal/hal.mk
|
||||
include $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/platform.mk
|
||||
include $(CHIBIOS)/os/hal/boards/ST_STM32L476_DISCOVERY/board.mk
|
||||
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
|
||||
# RTOS files (optional).
|
||||
include $(CHIBIOS)/os/rt/rt.mk
|
||||
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
|
||||
# Auto-build files in ./source recursively.
|
||||
include $(CHIBIOS)/tools/mk/autobuild.mk
|
||||
# Other files (optional).
|
||||
include $(CHIBIOS)/test/lib/test.mk
|
||||
include $(CHIBIOS)/test/mfs/mfs_test.mk
|
||||
include $(CHIBIOS)/os/ex/Micron/m25q.mk
|
||||
#include $(CHIBIOS)/os/hal/lib/complex/m25q/devices/micron_n25q/micron_n25q.mk
|
||||
include $(CHIBIOS)/os/hal/lib/complex/mfs/mfs.mk
|
||||
include $(CHIBIOS)/os/hal/lib/streams/streams.mk
|
||||
|
||||
# Define linker script file here
|
||||
LDSCRIPT= $(STARTUPLD)/STM32L476xG.ld
|
||||
|
||||
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CSRC = $(ALLCSRC) \
|
||||
$(TESTSRC) \
|
||||
$(CONFDIR)/portab.c \
|
||||
main.c
|
||||
|
||||
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CPPSRC = $(ALLCPPSRC)
|
||||
|
||||
# C sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACSRC =
|
||||
|
||||
# C++ sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACPPSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCPPSRC =
|
||||
|
||||
# List ASM source files here
|
||||
ASMSRC = $(ALLASMSRC)
|
||||
ASMXSRC = $(ALLXASMSRC)
|
||||
|
||||
INCDIR = $(ALLINC) $(TESTINC) $(CONFDIR)
|
||||
|
||||
#
|
||||
# Project, sources and paths
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Start of user section
|
||||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS =
|
||||
|
||||
# Define ASM defines here
|
||||
UADEFS =
|
||||
|
||||
# List all user directories here
|
||||
UINCDIR =
|
||||
|
||||
# List the user directory to look for the libraries here
|
||||
ULIBDIR =
|
||||
|
||||
# List all user libraries here
|
||||
ULIBS =
|
||||
|
||||
#
|
||||
# End of user section
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Compiler settings
|
||||
#
|
||||
|
||||
MCU = cortex-m4
|
||||
|
||||
#TRGT = arm-elf-
|
||||
TRGT = arm-none-eabi-
|
||||
CC = $(TRGT)gcc
|
||||
CPPC = $(TRGT)g++
|
||||
# Enable loading with g++ only if you need C++ runtime support.
|
||||
# NOTE: You can use C++ even without C++ support if you are careful. C++
|
||||
# runtime support makes code size explode.
|
||||
LD = $(TRGT)gcc
|
||||
#LD = $(TRGT)g++
|
||||
CP = $(TRGT)objcopy
|
||||
AS = $(TRGT)gcc -x assembler-with-cpp
|
||||
AR = $(TRGT)ar
|
||||
OD = $(TRGT)objdump
|
||||
SZ = $(TRGT)size
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary
|
||||
|
||||
# ARM-specific options here
|
||||
AOPT =
|
||||
|
||||
# THUMB-specific options here
|
||||
TOPT = -mthumb -DTHUMB
|
||||
|
||||
# Define C warning options here
|
||||
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
|
||||
|
||||
# Define C++ warning options here
|
||||
CPPWARN = -Wall -Wextra -Wundef
|
||||
|
||||
#
|
||||
# Compiler settings
|
||||
##############################################################################
|
||||
|
||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
|
||||
include $(RULESPATH)/rules.mk
|
|
@ -1,25 +0,0 @@
|
|||
*****************************************************************************
|
||||
** ChibiOS/HAL - Unified MFS complex driver demo. **
|
||||
*****************************************************************************
|
||||
|
||||
** TARGET **
|
||||
|
||||
The demo can be compiled to run on multiple STM32 target boards.
|
||||
|
||||
** The Demo **
|
||||
|
||||
The application demonstrates the use of the HAL MFS complex driver.
|
||||
|
||||
** Build Procedure **
|
||||
|
||||
The command "make" builds the demo for all targets. The demo can be compiled
|
||||
using the "GNU ARM Embedded Toolchain" from:
|
||||
|
||||
https://launchpad.net/gcc-arm-embedded
|
||||
|
||||
** Notes **
|
||||
|
||||
Some header files used by the demo are not part of ChibiOS but are copyright of
|
||||
ST Microelectronics and are licensed under a different license.
|
||||
|
||||
http://www.st.com
|
Loading…
Reference in New Issue