git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12538 110e8d01-0319-4d1e-a829-52ad28d1bb01
This commit is contained in:
Giovanni Di Sirio 2019-01-11 10:27:27 +00:00
parent c62c5f5062
commit d3ba6ca1bf
2 changed files with 10 additions and 8 deletions

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@ -800,7 +800,7 @@
* @note The allowed values are 2..128, odd values not allowed. * @note The allowed values are 2..128, odd values not allowed.
*/ */
#if !defined(STM32_PLL2_DIVP_VALUE) || defined(__DOXYGEN__) #if !defined(STM32_PLL2_DIVP_VALUE) || defined(__DOXYGEN__)
#define STM32_PLL2_DIVP_VALUE 8 #define STM32_PLL2_DIVP_VALUE 40
#endif #endif
/** /**
@ -860,7 +860,7 @@
* @note The allowed values are 4..512. * @note The allowed values are 4..512.
*/ */
#if !defined(STM32_PLL3_DIVN_VALUE) || defined(__DOXYGEN__) #if !defined(STM32_PLL3_DIVN_VALUE) || defined(__DOXYGEN__)
#define STM32_PLL3_DIVN_VALUE 240 #define STM32_PLL3_DIVN_VALUE 400
#endif #endif
/** /**
@ -876,7 +876,7 @@
* @note The allowed values are 2..128, odd values not allowed. * @note The allowed values are 2..128, odd values not allowed.
*/ */
#if !defined(STM32_PLL3_DIVP_VALUE) || defined(__DOXYGEN__) #if !defined(STM32_PLL3_DIVP_VALUE) || defined(__DOXYGEN__)
#define STM32_PLL3_DIVP_VALUE 10 #define STM32_PLL3_DIVP_VALUE 8
#endif #endif
/** /**
@ -884,7 +884,7 @@
* @note The allowed values are 1..128. * @note The allowed values are 1..128.
*/ */
#if !defined(STM32_PLL3_DIVQ_VALUE) || defined(__DOXYGEN__) #if !defined(STM32_PLL3_DIVQ_VALUE) || defined(__DOXYGEN__)
#define STM32_PLL3_DIVQ_VALUE 10 #define STM32_PLL3_DIVQ_VALUE 8
#endif #endif
/** /**
@ -892,7 +892,7 @@
* @note The allowed values are 1..128. * @note The allowed values are 1..128.
*/ */
#if !defined(STM32_PLL3_DIVR_VALUE) || defined(__DOXYGEN__) #if !defined(STM32_PLL3_DIVR_VALUE) || defined(__DOXYGEN__)
#define STM32_PLL3_DIVR_VALUE 10 #define STM32_PLL3_DIVR_VALUE 8
#endif #endif
/** /**
@ -2399,7 +2399,7 @@
*/ */
#define STM32_USART6CLK STM32_PCLK2 #define STM32_USART6CLK STM32_PCLK2
#elif STM32_USART1SEL == STM32_USART16SEL_PLL2_Q_CK #elif STM32_USART16SEL == STM32_USART16SEL_PLL2_Q_CK
#define STM32_USART1CLK STM32_PLL2_Q_CK #define STM32_USART1CLK STM32_PLL2_Q_CK
#define STM32_USART6CLK STM32_PLL2_Q_CK #define STM32_USART6CLK STM32_PLL2_Q_CK
#elif STM32_USART16SEL == STM32_USART16SEL_PLL3_Q_CK #elif STM32_USART16SEL == STM32_USART16SEL_PLL3_Q_CK
@ -2579,8 +2579,8 @@
*/ */
#define STM32_SPI6CLK STM32_PCLK4 #define STM32_SPI6CLK STM32_PCLK4
#elif STM32_SPI6SEL == STM32_SPI6SEL_PLL2_P_CK #elif STM32_SPI6SEL == STM32_SPI6SEL_PLL2_Q_CK
#define STM32_SPI6CLK STM32_PLL2_P_CK #define STM32_SPI6CLK STM32_PLL2_Q_CK
#elif STM32_SPI6SEL == STM32_SPI6SEL_PLL3_Q_CK #elif STM32_SPI6SEL == STM32_SPI6SEL_PLL3_Q_CK
#define STM32_SPI6CLK STM32_PLL3_Q_CK #define STM32_SPI6CLK STM32_PLL3_Q_CK
#elif STM32_SPI6SEL == STM32_SPI6SEL_HSI_KER_CK #elif STM32_SPI6SEL == STM32_SPI6SEL_HSI_KER_CK

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@ -196,6 +196,8 @@
- EX: Updated LIS302DL to 1.1.0 (backported to 18.2.1). - EX: Updated LIS302DL to 1.1.0 (backported to 18.2.1).
- EX: Updated LPS25H to 1.1.0 (backported to 18.2.1). - EX: Updated LPS25H to 1.1.0 (backported to 18.2.1).
- EX: Updated LSM303DLHC to 1.1.0 (backported to 18.2.1). - EX: Updated LSM303DLHC to 1.1.0 (backported to 18.2.1).
- HAL: Fixed invalid checks in STM32H7 HAL (bug #1000)
(backported to 18.2.2).
- OTH: Fixed problem in STM32H743 GCC linker file (bug #998) - OTH: Fixed problem in STM32H743 GCC linker file (bug #998)
(backported to 18.2.2). (backported to 18.2.2).
- HAL: Fixed extra parenthesis in STM32F4 registry (bug #997) - HAL: Fixed extra parenthesis in STM32F4 registry (bug #997)