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ICACHE support added to H5. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16386 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2023-09-03 17:15:24 +00:00
parent e5866d5023
commit d5346998ad
6 changed files with 30 additions and 2 deletions
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11
demos/STM32/RT-STM32H563ZI-NUCLEO144/cfg/mcuconf.h
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@ -37,11 +37,20 @@
#define STM32H573_MCUCONF
/*
* HAL driver system settings.
* HAL driver general settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_CLOCK_DYNAMIC FALSE
/*
* ICache settings.
*/
#define STM32_ICACHE_CR (ICACHE_CR_EN)
#define STM32_ICACHE_CRR0 (0U)
#define STM32_ICACHE_CRR1 (0U)
#define STM32_ICACHE_CRR2 (0U)
#define STM32_ICACHE_CRR3 (0U)
/*
* PWR settings.
*/

3
os/hal/ports/STM32/STM32H5xx/hal_lld.c
View File

@ -772,6 +772,9 @@ void stm32_clock_init(void) {
}
#endif
/* Cache enable.*/
icache_init();
#endif /* STM32_NO_INIT */
}
#endif /* !defined(HAL_LLD_USE_CLOCK_MANAGEMENT) */

3
os/hal/ports/STM32/STM32H5xx/hal_lld.h
View File

@ -1336,6 +1336,9 @@
/* Device limits.*/
#include "stm32_limits.h"
/* ICache handler.*/
#include "stm32_icache.inc"
/* Clock handlers.*/
#include "stm32_lsi.inc"
#include "stm32_csi.inc"

1
os/hal/ports/STM32/STM32H5xx/platform.mk
View File

@ -27,6 +27,7 @@ endif
# Drivers compatible with the platform.
include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/ICACHEv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/RCCv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/SYSTICKv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/driver.mk

3
os/hal/ports/STM32/STM32H5xx/stm32_registry.h
View File

@ -38,6 +38,9 @@
/* Common. */
/*===========================================================================*/
/* Cache attributes.*/
#define STM32_HAS_ICACHE TRUE
/* DAC attributes.*/
#define STM32_DAC_HAS_MCR TRUE

11
tools/ftl/processors/conf/mcuconf_stm32h563xx/mcuconf.h.ftl
View File

@ -48,11 +48,20 @@
#define STM32H573_MCUCONF
/*
* HAL driver system settings.
* HAL driver general settings.
*/
#define STM32_NO_INIT ${doc.STM32_NO_INIT!"FALSE"}
#define STM32_CLOCK_DYNAMIC ${doc.STM32_CLOCK_DYNAMIC!"FALSE"}
/*
* ICache settings.
*/
#define STM32_ICACHE_CR ${doc.STM32_ICACHE_CR!"(ICACHE_CR_EN)"}
#define STM32_ICACHE_CRR0 ${doc.STM32_ICACHE_CRR0!"(0U)"}
#define STM32_ICACHE_CRR1 ${doc.STM32_ICACHE_CRR1!"(0U)"}
#define STM32_ICACHE_CRR2 ${doc.STM32_ICACHE_CRR2!"(0U)"}
#define STM32_ICACHE_CRR3 ${doc.STM32_ICACHE_CRR3!"(0U)"}
/*
* PWR settings.
*/