Missing NO_INIT check.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14297 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-04-24 13:25:41 +00:00
parent 6afe1bcc8e
commit dba2dd7996
2 changed files with 6 additions and 2 deletions

View File

@ -121,6 +121,7 @@ void hal_lld_init(void) {
*/
void stm32_clock_init(void) {
#if !STM32_NO_INIT
/* Reset of all peripherals.
Note, GPIOs are not reset because initialized before this point in
board files.*/
@ -140,7 +141,7 @@ void stm32_clock_init(void) {
/* SYSCFG clock enabled here because it is a multi-functional unit shared
among multiple drivers.*/
rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, true);
rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, false);
/* Core voltage setup, backup domain access enabled and left open.*/
PWR->CR1 = STM32_VOS | PWR_CR1_DBP;
@ -239,6 +240,7 @@ void stm32_clock_init(void) {
(STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
}
}
#endif /* STM32_NO_INIT */
}
/** @} */

View File

@ -121,6 +121,7 @@ void hal_lld_init(void) {
*/
void stm32_clock_init(void) {
#if !STM32_NO_INIT
/* Reset of all peripherals.
Note, GPIOs are not reset because initialized before this point in
board files.*/
@ -140,7 +141,7 @@ void stm32_clock_init(void) {
/* SYSCFG clock enabled here because it is a multi-functional unit shared
among multiple drivers.*/
rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, true);
rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, false);
/* Core voltage setup, backup domain access enabled and left open.*/
PWR->CR1 = STM32_VOS | PWR_CR1_DBP;
@ -238,6 +239,7 @@ void stm32_clock_init(void) {
(STM32_FLASHBITS & FLASH_ACR_LATENCY_Msk)) {
}
}
#endif /* STM32_NO_INIT */
}
/** @} */