STM32 port files modified to use the new ST header.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1063 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2009-07-18 11:52:08 +00:00
parent 6d390a7c46
commit dbb70634be
5 changed files with 7901 additions and 77 deletions

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@ -27,78 +27,72 @@
#include <ch.h>
#include <pal.h>
#if defined(STM32F10X_LD)
#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
RCC_APB2RSTR_AFIORST)
#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
RCC_APB2ENR_AFIOEN)
#elif defined(STM32F10X_HD)
#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_IOPFRST | \
RCC_APB2RSTR_IOPGRST | RCC_APB2RSTR_AFIORST);
#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
RCC_APB2ENR_IOPEEN | RCC_APB2ENR_IOPFEN | \
RCC_APB2ENR_IOPGEN | RCC_APB2ENR_AFIOEN)
#else
/* Defaults on Medium Density devices.*/
#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_AFIORST);
#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
RCC_APB2ENR_IOPEEN | RCC_APB2ENR_AFIOEN)
#endif
/**
* @brief STM32 I/O ports configuration.
* @details Ports A-D clocks enabled, AFIO clock enabled.
* @details Ports A-D(E, F, G) clocks enabled, AFIO clock enabled.
*
* @param[in] config the STM32 ports configuration
*/
void _pal_lld_init(const STM32GPIOConfig *config) {
uint32_t clocks = RCC_APB2ENR_AFIOEN;
#if defined(_GPIOA)
clocks |= RCC_APB2ENR_IOPAEN;
#endif
#if defined(_GPIOB)
clocks |= RCC_APB2ENR_IOPBEN;
#endif
#if defined(_GPIOC)
clocks |= RCC_APB2ENR_IOPCEN;
#endif
#if defined(_GPIOD)
clocks |= RCC_APB2ENR_IOPDEN;
#endif
#if defined(_GPIOE)
clocks |= RCC_APB2ENR_IOPEEN;
#endif
RCC->APB2ENR |= clocks;
/*
* Enables the GPIO related clocks.
*/
RCC->APB2ENR |= APB2_EN_MASK;
/*
* Resets the GPIO ports and AFIO.
*/
RCC->APB2RSTR = RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST |
RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST |
RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_IOPFRST |
RCC_APB2RSTR_IOPGRST | RCC_APB2RSTR_AFIORST;
RCC->APB2RSTR = APB2_RST_MASK;
RCC->APB2RSTR = 0;
#if defined(_GPIOA)
IOPORT_A->ODR = config->PAData.odr;
IOPORT_A->CRH = config->PAData.crh;
IOPORT_A->CRL = config->PAData.crl;
#endif
#if defined(_GPIOB)
IOPORT_B->ODR = config->PBData.odr;
IOPORT_B->CRH = config->PBData.crh;
IOPORT_B->CRL = config->PBData.crl;
#endif
#if defined(_GPIOC)
IOPORT_C->ODR = config->PCData.odr;
IOPORT_C->CRH = config->PCData.crh;
IOPORT_C->CRL = config->PCData.crl;
#endif
#if defined(_GPIOD)
IOPORT_D->ODR = config->PDData.odr;
IOPORT_D->CRH = config->PDData.crh;
IOPORT_D->CRL = config->PDData.crl;
#endif
#if defined(_GPIOE)
#if !defined(STM32F10X_LD) || defined(__DOXYGEN__)
IOPORT_E->ODR = config->PEData.odr;
IOPORT_E->CRH = config->PEData.crh;
IOPORT_E->CRL = config->PEData.crl;
#endif
#if defined(_GPIOF)
#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
IOPORT_F->ODR = config->PFData.odr;
IOPORT_F->CRH = config->PFData.crh;
IOPORT_F->CRL = config->PFData.crl;
#endif
#if defined(_GPIOG)
IOPORT_G->ODR = config->PGData.odr;
IOPORT_G->CRH = config->PGData.crh;
IOPORT_G->CRL = config->PGData.crl;

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@ -31,10 +31,10 @@
* Tricks required to make the TRUE/FALSE declaration inside the library
* compatible.
*/
#ifndef __STM32F10x_MAP_H
#ifndef __STM32F10x_H
#undef FALSE
#undef TRUE
#include "stm32f10x_map.h"
#include <stm32f10x.h>
#define FALSE 0
#define TRUE (!FALSE)
#endif
@ -63,31 +63,21 @@ typedef struct {
* or whole ports can be reprogrammed at later time.
*/
typedef struct {
#if defined(_GPIOA) || defined(__DOXYGEN__)
/** @brief Port A setup data.*/
stm32_gpio_setup_t PAData;
#endif
#if defined(_GPIOB) || defined(__DOXYGEN__)
/** @brief Port B setup data.*/
stm32_gpio_setup_t PBData;
#endif
#if defined(_GPIOC) || defined(__DOXYGEN__)
/** @brief Port C setup data.*/
stm32_gpio_setup_t PCData;
#endif
#if defined(_GPIOD) || defined(__DOXYGEN__)
/** @brief Port D setup data.*/
stm32_gpio_setup_t PDData;
#endif
#if defined(_GPIOE) || defined(__DOXYGEN__)
#if !defined(STM32F10X_LD) || defined(__DOXYGEN__)
/** @brief Port E setup data.*/
stm32_gpio_setup_t PEData;
#endif
#if defined(_GPIOF) || defined(__DOXYGEN__)
#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
/** @brief Port F setup data.*/
stm32_gpio_setup_t PFData;
#endif
#if defined(_GPIOG) || defined(__DOXYGEN__)
/** @brief Port G setup data.*/
stm32_gpio_setup_t PGData;
#endif
@ -126,49 +116,39 @@ typedef GPIO_TypeDef * ioportid_t;
/**
* @brief GPIO port A identifier.
*/
#if defined(_GPIOA) || defined(__DOXYGEN__)
#define IOPORT_A GPIOA
#endif
/**
* @brief GPIO port B identifier.
*/
#if defined(_GPIOB) || defined(__DOXYGEN__)
#define IOPORT_B GPIOB
#endif
/**
* @brief GPIO port C identifier.
*/
#if defined(_GPIOC) || defined(__DOXYGEN__)
#define IOPORT_C GPIOC
#endif
/**
* @brief GPIO port D identifier.
*/
#if defined(_GPIOD) || defined(__DOXYGEN__)
#define IOPORT_D GPIOD
#endif
/**
* @brief GPIO port E identifier.
*/
#if defined(_GPIOE) || defined(__DOXYGEN__)
#if !defined(STM32F10X_LD) || defined(__DOXYGEN__)
#define IOPORT_E GPIOE
#endif
/**
* @brief GPIO port F identifier.
*/
#if defined(_GPIOF) || defined(__DOXYGEN__)
#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
#define IOPORT_F GPIOF
#endif
/**
* @brief GPIO port G identifier.
*/
#if defined(_GPIOG) || defined(__DOXYGEN__)
#define IOPORT_G GPIOG
#endif

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@ -29,7 +29,6 @@
#include "board.h"
#include "nvic.h"
#include "stm32_serial.h"
#include "stm32f10x_nvic.h"
#if USE_STM32_USART1 || defined(__DOXYGEN__)
/** @brief USART1 serial driver identifier.*/
@ -198,7 +197,7 @@ void serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) {
usart_setup(USART1, DEFAULT_USART_BITRATE, 0,
USART_CR2_STOP1_BITS | USART_CR2_LINEN, 0);
GPIOA->CRH = (GPIOA->CRH & 0xFFFFF00F) | 0x000004B0;
NVICEnableVector(USART1_IRQChannel, prio1);
NVICEnableVector(USART1_IRQn, prio1);
#endif
#if USE_STM32_USART2
@ -207,7 +206,7 @@ void serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) {
usart_setup(USART2, DEFAULT_USART_BITRATE, 0,
USART_CR2_STOP1_BITS | USART_CR2_LINEN, 0);
GPIOA->CRL = (GPIOA->CRL & 0xFFFF00FF) | 0x00004B00;
NVICEnableVector(USART2_IRQChannel, prio2);
NVICEnableVector(USART2_IRQn, prio2);
#endif
#if USE_STM32_USART3
@ -216,7 +215,7 @@ void serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) {
usart_setup(USART3, DEFAULT_USART_BITRATE, 0,
USART_CR2_STOP1_BITS | USART_CR2_LINEN, 0);
GPIOB->CRH = (GPIOB->CRH & 0xFFFF00FF) | 0x00004B00;
NVICEnableVector(USART3_IRQChannel, prio3);
NVICEnableVector(USART3_IRQn, prio3);
#endif
}

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@ -31,13 +31,13 @@
* Tricks required to make the TRUE/FALSE declaration inside the library
* compatible.
*/
#ifndef __STM32F10x_MAP_H
#undef FALSE
#undef TRUE
#include "stm32f10x_map.h"
#define FALSE 0
#define TRUE (!FALSE)
#endif
//#ifndef __STM32F10x_MAP_H
//#undef FALSE
//#undef TRUE
//#include "stm32f10x_map.h"
//#define FALSE 0
//#define TRUE (!FALSE)
//#endif
/**
* @brief Serial buffers size.

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