mirror of https://github.com/rusefi/ChibiOS.git
Cortex-M SandBox subsystem added.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12975 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio
parent
ee9c03736c
commit
dbbf320b3d
|
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@ -0,0 +1,54 @@
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|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<externalSettings/>
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<extensions>
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<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.603687198" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
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<folderInfo id="0.603687198." name="/" resourcePath="">
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<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.586709963.1446538340" name=""/>
|
||||
<builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.1490952991" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
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<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1134067298" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
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<tool id="org.eclipse.cdt.build.core.settings.holder.1927705259" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
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</tool>
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<tool id="org.eclipse.cdt.build.core.settings.holder.1367371861" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
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<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1824820452" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
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</tool>
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||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1584496456" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
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<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1781547795" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
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</toolChain>
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<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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</cconfiguration>
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</storageModule>
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<project id="RT-STM32L476-DISCOVERY-SB_CLIENT.null.1004513353" name="RT-STM32L476-DISCOVERY-SB_CLIENT"/>
|
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</storageModule>
|
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<storageModule moduleId="scannerConfiguration">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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<scannerConfigBuildInfo instanceId="0.603687198">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
|
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</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
<configuration configurationName="Default">
|
||||
<resource resourceType="PROJECT" workspacePath="/RT-STM32L476-DISCOVERY-SB_CLIENT"/>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
</cproject>
|
||||
|
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@ -0,0 +1,43 @@
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<?xml version="1.0" encoding="UTF-8"?>
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||||
<projectDescription>
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||||
<name>RT-STM32L476-DISCOVERY-SB_CLIENT</name>
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<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
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||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
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||||
</natures>
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<linkedResources>
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<link>
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<name>board</name>
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<type>2</type>
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<locationURI>CHIBIOS/os/hal/boards/ST_STM32L476_DISCOVERY</locationURI>
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</link>
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<link>
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<name>os</name>
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<type>2</type>
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<locationURI>CHIBIOS/os</locationURI>
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</link>
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<link>
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<name>test</name>
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<type>2</type>
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<locationURI>CHIBIOS/test</locationURI>
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</link>
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</linkedResources>
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</projectDescription>
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@ -0,0 +1,190 @@
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##############################################################################
|
||||
# Build global options
|
||||
# NOTE: Can be overridden externally.
|
||||
#
|
||||
|
||||
# Compiler options here.
|
||||
ifeq ($(USE_OPT),)
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USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
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endif
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|
||||
# C specific options here (added to USE_OPT).
|
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ifeq ($(USE_COPT),)
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USE_COPT =
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endif
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|
||||
# C++ specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_CPPOPT),)
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USE_CPPOPT = -fno-rtti
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||||
endif
|
||||
|
||||
# Enable this if you want the linker to remove unused code and data.
|
||||
ifeq ($(USE_LINK_GC),)
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USE_LINK_GC = yes
|
||||
endif
|
||||
|
||||
# Linker extra options here.
|
||||
ifeq ($(USE_LDOPT),)
|
||||
USE_LDOPT =
|
||||
endif
|
||||
|
||||
# Enable this if you want link time optimizations (LTO).
|
||||
ifeq ($(USE_LTO),)
|
||||
USE_LTO = yes
|
||||
endif
|
||||
|
||||
# Enable this if you want to see the full log while compiling.
|
||||
ifeq ($(USE_VERBOSE_COMPILE),)
|
||||
USE_VERBOSE_COMPILE = no
|
||||
endif
|
||||
|
||||
# If enabled, this option makes the build process faster by not compiling
|
||||
# modules not used in the current configuration.
|
||||
ifeq ($(USE_SMART_BUILD),)
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||||
USE_SMART_BUILD = yes
|
||||
endif
|
||||
|
||||
#
|
||||
# Build global options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Architecture or project specific options
|
||||
#
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# Stack size to be allocated to the Cortex-M process stack. This stack is
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# the stack used by the main() thread.
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ifeq ($(USE_PROCESS_STACKSIZE),)
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USE_PROCESS_STACKSIZE = 0x400
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endif
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||||
|
||||
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
|
||||
# stack is used for processing interrupts and exceptions.
|
||||
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
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||||
USE_EXCEPTIONS_STACKSIZE = 0x400
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||||
endif
|
||||
|
||||
# Enables the use of FPU (no, softfp, hard).
|
||||
ifeq ($(USE_FPU),)
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||||
USE_FPU = no
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||||
endif
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||||
|
||||
# FPU-related options.
|
||||
ifeq ($(USE_FPU_OPT),)
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USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
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||||
endif
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||||
|
||||
#
|
||||
# Architecture or project specific options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Project, target, sources and paths
|
||||
#
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||||
|
||||
# Define project name here
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||||
PROJECT = ch
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|
||||
# Target settings.
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MCU = cortex-m4
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|
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# Imported source files and paths.
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CHIBIOS := ../../..
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CONFDIR := ./cfg
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BUILDDIR := ./build
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DEPDIR := ./.dep
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|
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# Licensing files.
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include $(CHIBIOS)/os/license/license.mk
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# Startup files.
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include $(CHIBIOS)/os/common/startup/ARMCMx-SB/compilers/GCC/mk/startup.mk
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# HAL-OSAL files (optional).
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#include $(CHIBIOS)/os/hal/hal.mk
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#include $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/platform.mk
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#include $(CHIBIOS)/os/hal/boards/ST_STM32L476_DISCOVERY/board.mk
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#include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
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# RTOS files (optional).
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#include $(CHIBIOS)/os/rt/rt.mk
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||||
#include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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include $(CHIBIOS)/os/sb/user/sbuser.mk
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||||
# Auto-build files in ./source recursively.
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||||
include $(CHIBIOS)/tools/mk/autobuild.mk
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||||
# Other files (optional).
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||||
#include $(CHIBIOS)/test/lib/test.mk
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||||
#include $(CHIBIOS)/test/rt/rt_test.mk
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||||
#include $(CHIBIOS)/test/oslib/oslib_test.mk
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||||
|
||||
# Define linker script file here.
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||||
LDSCRIPT= ./sandbox.ld
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||||
|
||||
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
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||||
CSRC = $(ALLCSRC) \
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$(TESTSRC) \
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main.c
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||||
|
||||
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CPPSRC = $(ALLCPPSRC)
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||||
|
||||
# List ASM source files here.
|
||||
ASMSRC = $(ALLASMSRC)
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||||
|
||||
# List ASM with preprocessor source files here.
|
||||
ASMXSRC = $(ALLXASMSRC)
|
||||
|
||||
# Inclusion directories.
|
||||
INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)
|
||||
|
||||
# Define C warning options here.
|
||||
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
|
||||
|
||||
# Define C++ warning options here.
|
||||
CPPWARN = -Wall -Wextra -Wundef
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||||
|
||||
#
|
||||
# Project, target, sources and paths
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Start of user section
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||||
#
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||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS =
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||||
|
||||
# Define ASM defines here
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||||
UADEFS =
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||||
|
||||
# List all user directories here
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||||
UINCDIR =
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||||
|
||||
# List the user directory to look for the libraries here
|
||||
ULIBDIR =
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||||
|
||||
# List all user libraries here
|
||||
ULIBS =
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||||
|
||||
#
|
||||
# End of user section
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Common rules
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||||
#
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||||
|
||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
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||||
include $(RULESPATH)/arm-none-eabi.mk
|
||||
include $(RULESPATH)/rules.mk
|
||||
|
||||
#
|
||||
# Common rules
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Custom rules
|
||||
#
|
||||
|
||||
#
|
||||
# Custom rules
|
||||
##############################################################################
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#include "sbuser.h"
|
||||
|
||||
/*
|
||||
* Application entry point.
|
||||
*/
|
||||
int main(void) {
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||||
|
||||
/*
|
||||
* Normal main() activity, in this demo it does nothing except
|
||||
* sleeping in a loop.
|
||||
*/
|
||||
#if 0
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||||
/* Test for exception on interrupt.*/
|
||||
asm volatile ("mov r0, #64");
|
||||
asm volatile ("mov sp, r0");
|
||||
while (true) {
|
||||
}
|
||||
#endif
|
||||
while (true) {
|
||||
sbSleepMilliseconds(500);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Sandbox memory setup.
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
flash0 : org = 0x080FC000, len = 16k
|
||||
ram0 : org = 0x20017000, len = 4k
|
||||
}
|
||||
|
||||
/* Symbols required by the sandbox startup file.*/
|
||||
__r1_start__ = ORIGIN(flash0);
|
||||
__r1_size__ = LENGTH(flash0);
|
||||
__r1_end__ = __r1_start__ + __r1_size__;
|
||||
__r2_start__ = ORIGIN(ram0);
|
||||
__r2_size__ = LENGTH(ram0);
|
||||
__r2_end__ = __r2_start__ + __r2_size__;
|
||||
|
||||
/* Flash region to be used for exception vectors.*/
|
||||
REGION_ALIAS("CODE_SPACE", flash0);
|
||||
|
||||
/* RAM region to be used for data.*/
|
||||
REGION_ALIAS("DATA_SPACE", ram0);
|
||||
|
||||
/* Generic rules inclusion.*/
|
||||
INCLUDE rules.ld
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="0.603687198">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.603687198" moduleId="org.eclipse.cdt.core.settings" name="Default">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.603687198" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
|
||||
<folderInfo id="0.603687198." name="/" resourcePath="">
|
||||
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.586709963" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
|
||||
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.586709963.1446538340" name=""/>
|
||||
<builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.1490952991" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1134067298" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1927705259" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1013764026" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1367371861" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1824820452" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1584496456" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1781547795" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="RT-STM32L476-DISCOVERY-SB_HOST.null.1004513353" name="RT-STM32L476-DISCOVERY-SB_HOST"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="0.603687198">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
<configuration configurationName="Default">
|
||||
<resource resourceType="PROJECT" workspacePath="/RT-STM32L476-DISCOVERY-SB_HOST"/>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
</cproject>
|
||||
|
|
@ -0,0 +1,43 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>RT-STM32L476-DISCOVERY-SB_HOST</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>board</name>
|
||||
<type>2</type>
|
||||
<locationURI>CHIBIOS/os/hal/boards/ST_STM32L476_DISCOVERY</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>os</name>
|
||||
<type>2</type>
|
||||
<locationURI>CHIBIOS/os</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>test</name>
|
||||
<type>2</type>
|
||||
<locationURI>CHIBIOS/test</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
</projectDescription>
|
||||
|
|
@ -0,0 +1,191 @@
|
|||
##############################################################################
|
||||
# Build global options
|
||||
# NOTE: Can be overridden externally.
|
||||
#
|
||||
|
||||
# Compiler options here.
|
||||
ifeq ($(USE_OPT),)
|
||||
USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
|
||||
endif
|
||||
|
||||
# C specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_COPT),)
|
||||
USE_COPT =
|
||||
endif
|
||||
|
||||
# C++ specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_CPPOPT),)
|
||||
USE_CPPOPT = -fno-rtti
|
||||
endif
|
||||
|
||||
# Enable this if you want the linker to remove unused code and data.
|
||||
ifeq ($(USE_LINK_GC),)
|
||||
USE_LINK_GC = yes
|
||||
endif
|
||||
|
||||
# Linker extra options here.
|
||||
ifeq ($(USE_LDOPT),)
|
||||
USE_LDOPT =
|
||||
endif
|
||||
|
||||
# Enable this if you want link time optimizations (LTO).
|
||||
ifeq ($(USE_LTO),)
|
||||
USE_LTO = yes
|
||||
endif
|
||||
|
||||
# Enable this if you want to see the full log while compiling.
|
||||
ifeq ($(USE_VERBOSE_COMPILE),)
|
||||
USE_VERBOSE_COMPILE = no
|
||||
endif
|
||||
|
||||
# If enabled, this option makes the build process faster by not compiling
|
||||
# modules not used in the current configuration.
|
||||
ifeq ($(USE_SMART_BUILD),)
|
||||
USE_SMART_BUILD = yes
|
||||
endif
|
||||
|
||||
#
|
||||
# Build global options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Architecture or project specific options
|
||||
#
|
||||
|
||||
# Stack size to be allocated to the Cortex-M process stack. This stack is
|
||||
# the stack used by the main() thread.
|
||||
ifeq ($(USE_PROCESS_STACKSIZE),)
|
||||
USE_PROCESS_STACKSIZE = 0x400
|
||||
endif
|
||||
|
||||
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
|
||||
# stack is used for processing interrupts and exceptions.
|
||||
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
|
||||
USE_EXCEPTIONS_STACKSIZE = 0x400
|
||||
endif
|
||||
|
||||
# Enables the use of FPU (no, softfp, hard).
|
||||
ifeq ($(USE_FPU),)
|
||||
USE_FPU = no
|
||||
endif
|
||||
|
||||
# FPU-related options.
|
||||
ifeq ($(USE_FPU_OPT),)
|
||||
USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
|
||||
endif
|
||||
|
||||
#
|
||||
# Architecture or project specific options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Project, target, sources and paths
|
||||
#
|
||||
|
||||
# Define project name here
|
||||
PROJECT = ch
|
||||
|
||||
# Target settings.
|
||||
MCU = cortex-m4
|
||||
|
||||
# Imported source files and paths.
|
||||
CHIBIOS := ../../..
|
||||
CONFDIR := ./cfg
|
||||
BUILDDIR := ./build
|
||||
DEPDIR := ./.dep
|
||||
|
||||
# Licensing files.
|
||||
include $(CHIBIOS)/os/license/license.mk
|
||||
# Startup files.
|
||||
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk
|
||||
# HAL-OSAL files (optional).
|
||||
include $(CHIBIOS)/os/hal/hal.mk
|
||||
include $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/platform.mk
|
||||
include $(CHIBIOS)/os/hal/boards/ST_STM32L476_DISCOVERY/board.mk
|
||||
include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
|
||||
include $(CHIBIOS)/os/hal/lib/streams/streams.mk
|
||||
# RTOS files (optional).
|
||||
include $(CHIBIOS)/os/rt/rt.mk
|
||||
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
|
||||
include $(CHIBIOS)/os/sb/host/compilers/GCC/sbhost.mk
|
||||
# Auto-build files in ./source recursively.
|
||||
include $(CHIBIOS)/tools/mk/autobuild.mk
|
||||
# Other files (optional).
|
||||
include $(CHIBIOS)/test/lib/test.mk
|
||||
include $(CHIBIOS)/test/rt/rt_test.mk
|
||||
include $(CHIBIOS)/test/oslib/oslib_test.mk
|
||||
|
||||
# Define linker script file here.
|
||||
LDSCRIPT= ./STM32L476xG_SB.ld
|
||||
|
||||
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CSRC = $(ALLCSRC) \
|
||||
$(TESTSRC) \
|
||||
main.c
|
||||
|
||||
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CPPSRC = $(ALLCPPSRC)
|
||||
|
||||
# List ASM source files here.
|
||||
ASMSRC = $(ALLASMSRC)
|
||||
|
||||
# List ASM with preprocessor source files here.
|
||||
ASMXSRC = $(ALLXASMSRC)
|
||||
|
||||
# Inclusion directories.
|
||||
INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)
|
||||
|
||||
# Define C warning options here.
|
||||
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
|
||||
|
||||
# Define C++ warning options here.
|
||||
CPPWARN = -Wall -Wextra -Wundef
|
||||
|
||||
#
|
||||
# Project, target, sources and paths
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Start of user section
|
||||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS =
|
||||
|
||||
# Define ASM defines here
|
||||
UADEFS =
|
||||
|
||||
# List all user directories here
|
||||
UINCDIR =
|
||||
|
||||
# List the user directory to look for the libraries here
|
||||
ULIBDIR =
|
||||
|
||||
# List all user libraries here
|
||||
ULIBS =
|
||||
|
||||
#
|
||||
# End of user section
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Common rules
|
||||
#
|
||||
|
||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
|
||||
include $(RULESPATH)/arm-none-eabi.mk
|
||||
include $(RULESPATH)/rules.mk
|
||||
|
||||
#
|
||||
# Common rules
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Custom rules
|
||||
#
|
||||
|
||||
#
|
||||
# Custom rules
|
||||
##############################################################################
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* STM32L476xG with sandbox memory setup.
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
flash0 : org = 0x08000000, len = 1M - 16k
|
||||
flash1 : org = 0x00000000, len = 0
|
||||
flash2 : org = 0x00000000, len = 0
|
||||
flash3 : org = 0x00000000, len = 0
|
||||
flash4 : org = 0x00000000, len = 0
|
||||
flash5 : org = 0x00000000, len = 0
|
||||
flash6 : org = 0x00000000, len = 0
|
||||
flash7 : org = 0x08000000 + 1M - 16k, len = 16k
|
||||
ram0 : org = 0x20000000, len = 96k - 4k
|
||||
ram1 : org = 0x00000000, len = 0
|
||||
ram2 : org = 0x00000000, len = 0
|
||||
ram3 : org = 0x00000000, len = 0
|
||||
ram4 : org = 0x10000000, len = 32k
|
||||
ram5 : org = 0x00000000, len = 0
|
||||
ram6 : org = 0x00000000, len = 0
|
||||
ram7 : org = 0x20000000 + 96k - 4k, len = 4k
|
||||
}
|
||||
|
||||
/* For each data/text section two region are defined, a virtual region
|
||||
and a load region (_LMA suffix).*/
|
||||
|
||||
/* Flash region to be used for exception vectors.*/
|
||||
REGION_ALIAS("VECTORS_FLASH", flash0);
|
||||
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
|
||||
|
||||
/* Flash region to be used for constructors and destructors.*/
|
||||
REGION_ALIAS("XTORS_FLASH", flash0);
|
||||
REGION_ALIAS("XTORS_FLASH_LMA", flash0);
|
||||
|
||||
/* Flash region to be used for code text.*/
|
||||
REGION_ALIAS("TEXT_FLASH", flash0);
|
||||
REGION_ALIAS("TEXT_FLASH_LMA", flash0);
|
||||
|
||||
/* Flash region to be used for read only data.*/
|
||||
REGION_ALIAS("RODATA_FLASH", flash0);
|
||||
REGION_ALIAS("RODATA_FLASH_LMA", flash0);
|
||||
|
||||
/* Flash region to be used for various.*/
|
||||
REGION_ALIAS("VARIOUS_FLASH", flash0);
|
||||
REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
|
||||
|
||||
/* Flash region to be used for RAM(n) initialization data.*/
|
||||
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
|
||||
|
||||
/* RAM region to be used for Main stack. This stack accommodates the processing
|
||||
of all exceptions and interrupts.*/
|
||||
REGION_ALIAS("MAIN_STACK_RAM", ram0);
|
||||
|
||||
/* RAM region to be used for the process stack. This is the stack used by
|
||||
the main() function.*/
|
||||
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
|
||||
|
||||
/* RAM region to be used for data segment.*/
|
||||
REGION_ALIAS("DATA_RAM", ram0);
|
||||
REGION_ALIAS("DATA_RAM_LMA", flash0);
|
||||
|
||||
/* RAM region to be used for BSS segment.*/
|
||||
REGION_ALIAS("BSS_RAM", ram0);
|
||||
|
||||
/* RAM region to be used for the default heap.*/
|
||||
REGION_ALIAS("HEAP_RAM", ram0);
|
||||
|
||||
/* Generic rules inclusion.*/
|
||||
INCLUDE rules.ld
|
||||
|
|
@ -0,0 +1,761 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file rt/templates/chconf.h
|
||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
|
||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef CHCONF_H
|
||||
#define CHCONF_H
|
||||
|
||||
#define _CHIBIOS_RT_CONF_
|
||||
#define _CHIBIOS_RT_CONF_VER_6_0_
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of OS instances.
|
||||
* @note For each core in use an instance is needed, the number needs to
|
||||
* be between one and the number of available cores.
|
||||
*/
|
||||
#if !defined(CH_CFG_INSTANCES_NUMBER)
|
||||
#define CH_CFG_INSTANCES_NUMBER 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Handling of instances.
|
||||
* @note If disabled then threads assigned to various instances can
|
||||
* interact each other using the same synchronization objects.
|
||||
* If enabled then each OS instance is a separate world, no
|
||||
* direct interactions is handled by the OS.
|
||||
* This setting is only meaningful if @p CH_CFG_INSTANCES_NUMBER
|
||||
* is greater than one.
|
||||
*/
|
||||
#if !defined(CH_CFG_LOOSE_INSTANCES)
|
||||
#define CH_CFG_LOOSE_INSTANCES FALSE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System timers settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_RESOLUTION)
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_FREQUENCY)
|
||||
#define CH_CFG_ST_FREQUENCY 10000
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Time intervals data size.
|
||||
* @note Allowed values are 16, 32 or 64 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_INTERVALS_SIZE)
|
||||
#define CH_CFG_INTERVALS_SIZE 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Time types data size.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#if !defined(CH_CFG_TIME_TYPES_SIZE)
|
||||
#define CH_CFG_TIME_TYPES_SIZE 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Time delta constant for the tick-less mode.
|
||||
* @note If this value is zero then the system uses the classic
|
||||
* periodic tick. This value represents the minimum number
|
||||
* of ticks that is safe to specify in a timeout directive.
|
||||
* The value one is not valid, timeouts are rounded up to
|
||||
* this value.
|
||||
*/
|
||||
#if !defined(CH_CFG_ST_TIMEDELTA)
|
||||
#define CH_CFG_ST_TIMEDELTA 2
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel parameters and options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
* @note The round robin preemption is not supported in tickless mode and
|
||||
* must be set to zero in that case.
|
||||
*/
|
||||
#if !defined(CH_CFG_TIME_QUANTUM)
|
||||
#define CH_CFG_TIME_QUANTUM 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||
*/
|
||||
#if !defined(CH_CFG_MEMCORE_SIZE)
|
||||
#define CH_CFG_MEMCORE_SIZE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread. The application @p main()
|
||||
* function becomes the idle thread and must implement an
|
||||
* infinite loop.
|
||||
*/
|
||||
#if !defined(CH_CFG_NO_IDLE_THREAD)
|
||||
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Performance options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_OPTIMIZE_SPEED)
|
||||
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Subsystem options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Time Measurement APIs.
|
||||
* @details If enabled then the time measurement APIs are included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_TM)
|
||||
#define CH_CFG_USE_TM TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_REGISTRY)
|
||||
#define CH_CFG_USE_REGISTRY TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_WAITEXIT)
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_SEMAPHORES)
|
||||
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
|
||||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MUTEXES)
|
||||
#define CH_CFG_USE_MUTEXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables recursive behavior on mutexes.
|
||||
* @note Recursive mutexes are heavier and have an increased
|
||||
* memory footprint.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
|
||||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_CONDVARS)
|
||||
#define CH_CFG_USE_CONDVARS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
|
||||
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_EVENTS)
|
||||
#define CH_CFG_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
|
||||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MESSAGES)
|
||||
#define CH_CFG_USE_MESSAGES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
|
||||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MAILBOXES)
|
||||
#define CH_CFG_USE_MAILBOXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MEMCORE)
|
||||
#define CH_CFG_USE_MEMCORE TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||
* @p CH_CFG_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_HEAP)
|
||||
#define CH_CFG_USE_HEAP TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_MEMPOOLS)
|
||||
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Objects FIFOs APIs.
|
||||
* @details If enabled then the objects FIFOs APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_OBJ_FIFOS)
|
||||
#define CH_CFG_USE_OBJ_FIFOS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Pipes APIs.
|
||||
* @details If enabled then the pipes APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_PIPES)
|
||||
#define CH_CFG_USE_PIPES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_DYNAMIC)
|
||||
#define CH_CFG_USE_DYNAMIC TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Objects factory options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Objects Factory APIs.
|
||||
* @details If enabled then the objects factory APIs are included in the
|
||||
* kernel.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_CFG_USE_FACTORY)
|
||||
#define CH_CFG_USE_FACTORY TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Maximum length for object names.
|
||||
* @details If the specified length is zero then the name is stored by
|
||||
* pointer but this could have unintended side effects.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
|
||||
#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the registry of generic objects.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
|
||||
#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for generic buffers.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
|
||||
#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for semaphores.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_SEMAPHORES)
|
||||
#define CH_CFG_FACTORY_SEMAPHORES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for mailboxes.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_MAILBOXES)
|
||||
#define CH_CFG_FACTORY_MAILBOXES TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for objects FIFOs.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
|
||||
#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables factory for Pipes.
|
||||
*/
|
||||
#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
|
||||
#define CH_CFG_FACTORY_PIPES TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Debug options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_STATISTICS)
|
||||
#define CH_DBG_STATISTICS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_CHECKS)
|
||||
#define CH_DBG_ENABLE_CHECKS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_ASSERTS)
|
||||
#define CH_DBG_ENABLE_ASSERTS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the trace buffer is activated.
|
||||
*
|
||||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#if !defined(CH_DBG_TRACE_MASK)
|
||||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Trace buffer entries.
|
||||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
|
||||
* different from @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
|
||||
#define CH_DBG_TRACE_BUFFER_SIZE 128
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_STACK_CHECK)
|
||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_FILL_THREADS)
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#if !defined(CH_DBG_THREADS_PROFILING)
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System structure extension.
|
||||
* @details User fields added to the end of the @p ch_system_t structure.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief System initialization hook.
|
||||
* @details User initialization code added to the @p chSysInit() function
|
||||
* just before interrupts are enabled globally.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_INIT_HOOK() { \
|
||||
/* Add system initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System instance structure extension.
|
||||
* @details User fields added to the end of the @p ch_instance_t structure.
|
||||
*/
|
||||
#define CH_CFG_INSTANCE_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief System instance initialization hook.
|
||||
* @details User initialization code added to the @p chSchObjectInit()
|
||||
* function.
|
||||
*/
|
||||
#define CH_CFG_INSTANCE_INIT_HOOK(oip) { \
|
||||
/* Add OS instance initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p _thread_init() function.
|
||||
*
|
||||
* @note It is invoked from within @p _thread_init() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR enter hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
|
||||
/* IRQ prologue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR exit hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
|
||||
/* IRQ epilogue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
/* Idle-enter code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread leave hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
/* Idle-leave code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Trace hook.
|
||||
* @details This hook is invoked each time a new record is written in the
|
||||
* trace buffer.
|
||||
*/
|
||||
#define CH_CFG_TRACE_HOOK(tep) { \
|
||||
/* Trace code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* CHCONF_H */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,531 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef HALCONF_H
|
||||
#define HALCONF_H
|
||||
|
||||
#define _CHIBIOS_HAL_CONF_
|
||||
#define _CHIBIOS_HAL_CONF_VER_7_1_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the cryptographic subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CRY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EFlash subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EFL FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2S subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2S FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SIO subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SIO FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the TRNG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_TRNG FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WDG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WDG FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WSPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WSPI FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* PAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
|
||||
#define PAL_USE_CALLBACKS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define PAL_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enforces the driver to use direct callbacks rather than OSAL events.
|
||||
*/
|
||||
#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
|
||||
#define CAN_ENFORCE_USE_CALLBACKS FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CRY driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the SW fall-back of the cryptographic driver.
|
||||
* @details When enabled, this option, activates a fall-back software
|
||||
* implementation for algorithms not supported by the underlying
|
||||
* hardware.
|
||||
* @note Fall-back implementations may not be present for all algorithms.
|
||||
*/
|
||||
#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
|
||||
#define HAL_CRY_USE_FALLBACK FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Makes the driver forcibly use the fall-back implementations.
|
||||
*/
|
||||
#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
|
||||
#define HAL_CRY_ENFORCE_FALLBACK FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* DAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define DAC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define DAC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the zero-copy API.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief OCR initialization constant for V20 cards.
|
||||
*/
|
||||
#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_OCR_V20 0x50FF8000U
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief OCR initialization constant for non-V20 cards.
|
||||
*/
|
||||
#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_OCR 0x80100000U
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 16 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL_USB driver related setting. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Serial over USB buffers size.
|
||||
* @details Configuration parameter, the buffer size must be a multiple of
|
||||
* the USB data endpoint maximum packet size.
|
||||
* @note The default is 256 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial over USB number of buffers.
|
||||
* @note The default is 2 buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_NUMBER 2
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables circular transfers APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_CIRCULAR FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Handling method for SPI CS line.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
|
||||
#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* UART driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define UART_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define UART_USE_MUTUAL_EXCLUSION FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* USB driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define USB_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* WSPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define WSPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define WSPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
#endif /* HALCONF_H */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,352 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* STM32L4xx drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 15...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
#ifndef MCUCONF_H
|
||||
#define MCUCONF_H
|
||||
|
||||
#define STM32L4xx_MCUCONF
|
||||
#define STM32L476_MCUCONF
|
||||
#define STM32L486_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_VOS STM32_VOS_RANGE1
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_HSI16_ENABLED FALSE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED FALSE
|
||||
#define STM32_LSE_ENABLED TRUE
|
||||
#define STM32_MSIPLL_ENABLED TRUE
|
||||
#define STM32_MSIRANGE STM32_MSIRANGE_4M
|
||||
#define STM32_MSISRANGE STM32_MSISRANGE_4M
|
||||
#define STM32_SW STM32_SW_PLL
|
||||
#define STM32_PLLSRC STM32_PLLSRC_MSI
|
||||
#define STM32_PLLM_VALUE 1
|
||||
#define STM32_PLLN_VALUE 80
|
||||
#define STM32_PLLP_VALUE 7
|
||||
#define STM32_PLLQ_VALUE 6
|
||||
#define STM32_PLLR_VALUE 4
|
||||
#define STM32_HPRE STM32_HPRE_DIV1
|
||||
#define STM32_PPRE1 STM32_PPRE1_DIV1
|
||||
#define STM32_PPRE2 STM32_PPRE2_DIV1
|
||||
#define STM32_STOPWUCK STM32_STOPWUCK_MSI
|
||||
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
|
||||
#define STM32_MCOPRE STM32_MCOPRE_DIV1
|
||||
#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
|
||||
#define STM32_PLLSAI1N_VALUE 72
|
||||
#define STM32_PLLSAI1P_VALUE 7
|
||||
#define STM32_PLLSAI1Q_VALUE 6
|
||||
#define STM32_PLLSAI1R_VALUE 6
|
||||
#define STM32_PLLSAI2N_VALUE 72
|
||||
#define STM32_PLLSAI2P_VALUE 7
|
||||
#define STM32_PLLSAI2R_VALUE 6
|
||||
|
||||
/*
|
||||
* Peripherals clock sources.
|
||||
*/
|
||||
#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
|
||||
#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
|
||||
#define STM32_USART3SEL STM32_USART3SEL_SYSCLK
|
||||
#define STM32_UART4SEL STM32_UART4SEL_SYSCLK
|
||||
#define STM32_UART5SEL STM32_UART5SEL_SYSCLK
|
||||
#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK
|
||||
#define STM32_I2C1SEL STM32_I2C1SEL_SYSCLK
|
||||
#define STM32_I2C2SEL STM32_I2C2SEL_SYSCLK
|
||||
#define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK
|
||||
#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1
|
||||
#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1
|
||||
#define STM32_SAI1SEL STM32_SAI1SEL_OFF
|
||||
#define STM32_SAI2SEL STM32_SAI2SEL_OFF
|
||||
#define STM32_CLK48SEL STM32_CLK48SEL_PLLSAI1
|
||||
#define STM32_ADCSEL STM32_ADCSEL_SYSCLK
|
||||
#define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1
|
||||
#define STM32_DFSDMSEL STM32_DFSDMSEL_PCLK2
|
||||
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||
|
||||
/*
|
||||
* IRQ system settings.
|
||||
*/
|
||||
#define STM32_IRQ_EXTI0_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI1_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI2_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI3_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI4_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI5_9_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI10_15_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI1635_38_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI18_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI19_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI20_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI21_22_PRIORITY 15
|
||||
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7
|
||||
#define STM32_IRQ_TIM1_CC_PRIORITY 7
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
#define STM32_ADC_DUAL_MODE FALSE
|
||||
#define STM32_ADC_COMPACT_SAMPLES FALSE
|
||||
#define STM32_ADC_USE_ADC1 FALSE
|
||||
#define STM32_ADC_USE_ADC2 FALSE
|
||||
#define STM32_ADC_USE_ADC3 FALSE
|
||||
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
|
||||
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC2_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC3_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC12_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC3_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
|
||||
#define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
|
||||
|
||||
/*
|
||||
* CAN driver system settings.
|
||||
*/
|
||||
#define STM32_CAN_USE_CAN1 FALSE
|
||||
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
|
||||
|
||||
/*
|
||||
* DAC driver system settings.
|
||||
*/
|
||||
#define STM32_DAC_DUAL_MODE FALSE
|
||||
#define STM32_DAC_USE_DAC1_CH1 FALSE
|
||||
#define STM32_DAC_USE_DAC1_CH2 FALSE
|
||||
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
|
||||
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
|
||||
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
|
||||
#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
|
||||
#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
|
||||
/*
|
||||
* GPT driver system settings.
|
||||
*/
|
||||
#define STM32_GPT_USE_TIM1 FALSE
|
||||
#define STM32_GPT_USE_TIM2 FALSE
|
||||
#define STM32_GPT_USE_TIM3 FALSE
|
||||
#define STM32_GPT_USE_TIM4 FALSE
|
||||
#define STM32_GPT_USE_TIM5 FALSE
|
||||
#define STM32_GPT_USE_TIM6 FALSE
|
||||
#define STM32_GPT_USE_TIM7 FALSE
|
||||
#define STM32_GPT_USE_TIM8 FALSE
|
||||
#define STM32_GPT_USE_TIM15 FALSE
|
||||
#define STM32_GPT_USE_TIM16 FALSE
|
||||
#define STM32_GPT_USE_TIM17 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
*/
|
||||
#define STM32_I2C_USE_I2C1 FALSE
|
||||
#define STM32_I2C_USE_I2C2 FALSE
|
||||
#define STM32_I2C_USE_I2C3 FALSE
|
||||
#define STM32_I2C_BUSY_TIMEOUT 50
|
||||
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C3_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C1_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C2_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C3_DMA_PRIORITY 3
|
||||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ICU driver system settings.
|
||||
*/
|
||||
#define STM32_ICU_USE_TIM1 FALSE
|
||||
#define STM32_ICU_USE_TIM2 FALSE
|
||||
#define STM32_ICU_USE_TIM3 FALSE
|
||||
#define STM32_ICU_USE_TIM4 FALSE
|
||||
#define STM32_ICU_USE_TIM5 FALSE
|
||||
#define STM32_ICU_USE_TIM8 FALSE
|
||||
#define STM32_ICU_USE_TIM15 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
#define STM32_PWM_USE_TIM4 FALSE
|
||||
#define STM32_PWM_USE_TIM5 FALSE
|
||||
#define STM32_PWM_USE_TIM8 FALSE
|
||||
#define STM32_PWM_USE_TIM15 FALSE
|
||||
#define STM32_PWM_USE_TIM16 FALSE
|
||||
#define STM32_PWM_USE_TIM17 FALSE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* RTC driver system settings.
|
||||
*/
|
||||
#define STM32_RTC_PRESA_VALUE 32
|
||||
#define STM32_RTC_PRESS_VALUE 1024
|
||||
#define STM32_RTC_CR_INIT 0
|
||||
#define STM32_RTC_TAMPCR_INIT 0
|
||||
|
||||
/*
|
||||
* SDC driver system settings.
|
||||
*/
|
||||
#define STM32_SDC_USE_SDMMC1 FALSE
|
||||
#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
|
||||
#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
|
||||
#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
|
||||
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
|
||||
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
|
||||
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
|
||||
#define STM32_SDC_SDMMC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define STM32_SERIAL_USE_USART1 FALSE
|
||||
#define STM32_SERIAL_USE_USART2 TRUE
|
||||
#define STM32_SERIAL_USE_USART3 FALSE
|
||||
#define STM32_SERIAL_USE_UART4 FALSE
|
||||
#define STM32_SERIAL_USE_UART5 FALSE
|
||||
#define STM32_SERIAL_USE_LPUART1 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||
#define STM32_SERIAL_USART3_PRIORITY 12
|
||||
#define STM32_SERIAL_UART4_PRIORITY 12
|
||||
#define STM32_SERIAL_UART5_PRIORITY 12
|
||||
#define STM32_SERIAL_LPUART1_PRIORITY 12
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
*/
|
||||
#define STM32_SPI_USE_SPI1 FALSE
|
||||
#define STM32_SPI_USE_SPI2 FALSE
|
||||
#define STM32_SPI_USE_SPI3 FALSE
|
||||
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||
#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ST driver system settings.
|
||||
*/
|
||||
#define STM32_ST_IRQ_PRIORITY 8
|
||||
#define STM32_ST_USE_TIMER 2
|
||||
|
||||
/*
|
||||
* TRNG driver system settings.
|
||||
*/
|
||||
#define STM32_TRNG_USE_RNG1 FALSE
|
||||
|
||||
/*
|
||||
* UART driver system settings.
|
||||
*/
|
||||
#define STM32_UART_USE_USART1 FALSE
|
||||
#define STM32_UART_USE_USART2 FALSE
|
||||
#define STM32_UART_USE_USART3 FALSE
|
||||
#define STM32_UART_USE_UART4 FALSE
|
||||
#define STM32_UART_USE_UART5 FALSE
|
||||
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
|
||||
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||
#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART3_IRQ_PRIORITY 12
|
||||
#define STM32_UART_UART4_IRQ_PRIORITY 12
|
||||
#define STM32_UART_UART5_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART3_DMA_PRIORITY 0
|
||||
#define STM32_UART_UART4_DMA_PRIORITY 0
|
||||
#define STM32_UART_UART5_DMA_PRIORITY 0
|
||||
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
#define STM32_USB_USE_OTG1 FALSE
|
||||
#define STM32_USB_OTG1_IRQ_PRIORITY 14
|
||||
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
*/
|
||||
#define STM32_WDG_USE_IWDG FALSE
|
||||
|
||||
/*
|
||||
* WSPI driver system settings.
|
||||
*/
|
||||
#define STM32_WSPI_USE_QUADSPI1 FALSE
|
||||
#define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
|
||||
#endif /* MCUCONF_H */
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
|
||||
<stringAttribute key="bad_container_name" value="\RT-STM32L476-DISCOVERY-SB_HOST\debug"/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="1"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="set remotetimeout 20 monitor reset init monitor sleep 50 load /home/giovanni/Projects/ChibiStudio/chibios-rt7_dev/demos/STM32/RT-STM32L476-DISCOVERY-SB_CLIENT/build/ch.elf "/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
|
||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="xPSR-(format)" val="4"/><content id="r2-(format)" val="4"/><content id="r1-(format)" val="4"/><content id="r0-(format)" val="4"/><content id="s_psp-port_unprivileged_jump-(format)" val="4"/><content id="s_psp-SVC_Handler-(format)" val="4"/><content id="psp-SVC_Handler-(format)" val="4"/></contentList>"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList> <memoryBlockExpressionItem> <expression text="0x20000300"/> </memoryBlockExpressionItem> </memoryBlockExpressionList> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RT-STM32L476-DISCOVERY-SB_HOST"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.603687198"/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/RT-STM32L476-DISCOVERY-SB_HOST"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
||||
<listEntry value="4"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
|
||||
<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
|
||||
</listAttribute>
|
||||
</launchConfiguration>
|
||||
|
|
@ -0,0 +1,123 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
#include "rt_test_root.h"
|
||||
#include "oslib_test_root.h"
|
||||
|
||||
#include "chprintf.h"
|
||||
#include "sbhost.h"
|
||||
|
||||
/*
|
||||
* LEDs blinker thread, times are in milliseconds.
|
||||
*/
|
||||
static THD_WORKING_AREA(waThread1, 128);
|
||||
static THD_FUNCTION(Thread1, arg) {
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("blinker");
|
||||
while (true) {
|
||||
palClearLine(LINE_LED_GREEN);
|
||||
chThdSleepMilliseconds(50);
|
||||
palClearLine(LINE_LED_RED);
|
||||
chThdSleepMilliseconds(200);
|
||||
palSetLine(LINE_LED_GREEN);
|
||||
chThdSleepMilliseconds(50);
|
||||
palSetLine(LINE_LED_RED);
|
||||
chThdSleepMilliseconds(200);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Unprivileged thread.
|
||||
*/
|
||||
static THD_WORKING_AREA(waUnprivileged1, 128);
|
||||
static THD_FUNCTION(Unprivileged1, arg) {
|
||||
extern uint32_t __flash7_start__, __flash7_end__,
|
||||
__ram7_start__, __ram7_end__;
|
||||
static const sb_regions_t regions = {
|
||||
.r0_base = (uint32_t)&__flash7_start__,
|
||||
.r0_end = (uint32_t)&__flash7_end__,
|
||||
.r1_base = (uint32_t)&__ram7_start__,
|
||||
.r1_end = (uint32_t)&__ram7_end__
|
||||
};
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("unprivileged");
|
||||
|
||||
/* MPU setup for the sandbox, both regions are used because it is
|
||||
flash code.*/
|
||||
mpuConfigureRegion(MPU_REGION_0,
|
||||
regions.r0_base,
|
||||
MPU_RASR_ATTR_AP_RO_RO |
|
||||
MPU_RASR_ATTR_CACHEABLE_WT_NWA |
|
||||
MPU_RASR_SIZE_16K |
|
||||
MPU_RASR_ENABLE);
|
||||
mpuConfigureRegion(MPU_REGION_1,
|
||||
regions.r1_base,
|
||||
MPU_RASR_ATTR_AP_RW_RW |
|
||||
MPU_RASR_ATTR_CACHEABLE_WB_WA |
|
||||
MPU_RASR_SIZE_4K |
|
||||
MPU_RASR_ENABLE);
|
||||
|
||||
sbStart((const sb_header_t *)&__flash7_start__, ®ions);
|
||||
chSysHalt("it returned");
|
||||
}
|
||||
|
||||
/*
|
||||
* Application entry point.
|
||||
*/
|
||||
int main(void) {
|
||||
thread_t *tp;
|
||||
msg_t msg;
|
||||
|
||||
/*
|
||||
* System initializations.
|
||||
* - HAL initialization, this also initializes the configured device drivers
|
||||
* and performs the board-specific initializations.
|
||||
* - Kernel initialization, the main() function becomes a thread and the
|
||||
* RTOS is active.
|
||||
*/
|
||||
halInit();
|
||||
chSysInit();
|
||||
|
||||
/* Activating the serial driver 2 using the driver default configuration.*/
|
||||
sdStart(&SD2, NULL);
|
||||
|
||||
/* Creating the blinker thread.*/
|
||||
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO,
|
||||
Thread1, NULL);
|
||||
|
||||
/* Creating the unprivileged thread.*/
|
||||
chprintf((BaseSequentialStream *)&SD2, "Starting unprivileged thread\r\n");
|
||||
tp = chThdCreateStatic(waUnprivileged1, sizeof(waUnprivileged1), NORMALPRIO - 10U,
|
||||
Unprivileged1, NULL);
|
||||
|
||||
/* Waiting for the unprivileged thread to exit or fail.*/
|
||||
msg = chThdWait(tp);
|
||||
chprintf((BaseSequentialStream *)&SD2, "Exit code 0x%x\r\n", msg);
|
||||
|
||||
/* Normal main() thread activity, in this demo it does nothing except
|
||||
sleeping in a loop and check the button state.*/
|
||||
while (true) {
|
||||
if (palReadLine(LINE_JOY_CENTER)) {
|
||||
test_execute((BaseSequentialStream *)&SD2, &rt_test_suite);
|
||||
test_execute((BaseSequentialStream *)&SD2, &oslib_test_suite);
|
||||
}
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
*****************************************************************************
|
||||
** ChibiOS/RT port for ARM-Cortex-M4 STM32L476. **
|
||||
*****************************************************************************
|
||||
|
||||
** TARGET **
|
||||
|
||||
The demo runs on an ST_NUCLEO_L476RG board.
|
||||
|
||||
** The Demo **
|
||||
|
||||
The demo flashes the board LED using a thread, by pressing the button located
|
||||
on the board the test procedure is activated with output on the serial port
|
||||
SD2 (USART2, mapped on USB virtual COM port).
|
||||
|
||||
** Build Procedure **
|
||||
|
||||
The demo has been tested by using the free Codesourcery GCC-based toolchain
|
||||
and YAGARTO.
|
||||
Just modify the TRGT line in the makefile in order to use different GCC ports.
|
||||
|
||||
** Notes **
|
||||
|
||||
Some files used by the demo are not part of ChibiOS/RT but are copyright of
|
||||
ST Microelectronics and are licensed under a different license.
|
||||
Also note that not all the files present in the ST library are distributed
|
||||
with ChibiOS/RT, you can find the whole library on the ST web site:
|
||||
|
||||
http://www.st.com
|
||||
|
|
@ -126,7 +126,6 @@ struct port_extctx {};
|
|||
* switch.
|
||||
*/
|
||||
struct port_intctx {};
|
||||
#endif /* defined(__DOXYGEN__) */
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p thread_t structure.
|
||||
|
|
@ -134,9 +133,8 @@ struct port_intctx {};
|
|||
* @p port_intctx structure representing the stack pointer
|
||||
* at context switch time.
|
||||
*/
|
||||
struct port_context {
|
||||
struct port_intctx *sp;
|
||||
};
|
||||
struct port_context {};
|
||||
#endif /* defined(__DOXYGEN__) */
|
||||
|
||||
#endif /* !defined(_FROM_ASM_) */
|
||||
|
||||
|
|
|
|||
|
|
@ -102,6 +102,14 @@ void PendSV_Handler(void) {
|
|||
/* Module exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Port-related initialization code.
|
||||
*/
|
||||
void port_init(void) {
|
||||
|
||||
NVIC_SetPriority(PendSV_IRQn, CORTEX_PRIORITY_PENDSV);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief IRQ epilogue code.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -323,6 +323,7 @@ struct port_intctx {
|
|||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void port_init(void);
|
||||
void _port_irq_epilogue(regarm_t lr);
|
||||
void _port_switch(thread_t *ntp, thread_t *otp);
|
||||
void _port_thread_start(void);
|
||||
|
|
@ -336,14 +337,6 @@ extern "C" {
|
|||
/* Module inline functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Port-related initialization code.
|
||||
*/
|
||||
static inline void port_init(void) {
|
||||
|
||||
NVIC_SetPriority(PendSV_IRQn, CORTEX_PRIORITY_PENDSV);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns a word encoding the current interrupts status.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -25,6 +25,8 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
|
|
@ -51,35 +53,153 @@
|
|||
/* Module interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (PORT_USE_SYSCALL == TRUE) || defined(__DOXYGEN__)
|
||||
__attribute__((noinline))
|
||||
void port_syslock_noinline(void) {
|
||||
|
||||
port_lock();
|
||||
_stats_start_measure_crit_thd();
|
||||
_dbg_check_lock();
|
||||
}
|
||||
|
||||
uint32_t port_get_s_psp(void) {
|
||||
|
||||
return (uint32_t)currp->ctx.syscall.psp;
|
||||
}
|
||||
|
||||
__attribute__((weak))
|
||||
void port_syscall(struct port_extctx *ctxp, uint32_t n) {
|
||||
|
||||
(void)ctxp;
|
||||
(void)n;
|
||||
|
||||
chSysHalt("svc");
|
||||
}
|
||||
|
||||
void port_unprivileged_jump(regarm_t pc, regarm_t psp) {
|
||||
struct port_extctx *ectxp;
|
||||
struct port_linkctx *lctxp;
|
||||
uint32_t s_psp = __get_PSP();
|
||||
uint32_t control = __get_CONTROL();
|
||||
|
||||
/* Creating a port_extctx context for user mode entry.*/
|
||||
psp -= sizeof (struct port_extctx);
|
||||
ectxp = (struct port_extctx *)psp;
|
||||
|
||||
/* Initializing the user mode entry context.*/
|
||||
memset((void *)ectxp, 0, sizeof (struct port_extctx));
|
||||
ectxp->pc = pc;
|
||||
ectxp->xpsr = (regarm_t)0x01000000;
|
||||
#if CORTEX_USE_FPU == TRUE
|
||||
ectxp->fpscr = __get_FPSCR();
|
||||
#endif
|
||||
|
||||
/* Creating a middle context for user mode entry.*/
|
||||
s_psp -= sizeof (struct port_linkctx);
|
||||
lctxp = (struct port_linkctx *)s_psp;
|
||||
|
||||
/* CONTROL and PSP values for user mode.*/
|
||||
lctxp->control = (regarm_t)(control | 1U);
|
||||
lctxp->ectxp = ectxp;
|
||||
|
||||
/* PSP now points to the port_linkctx structure, it will be removed
|
||||
by SVC.*/
|
||||
__set_PSP(s_psp);
|
||||
|
||||
asm volatile ("svc 0");
|
||||
|
||||
chSysHalt("svc");
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief SVC vector.
|
||||
* @details The SVC vector is used for exception mode re-entering after a
|
||||
* context switch.
|
||||
* @note The PendSV vector is only used in advanced kernel mode.
|
||||
* context switch and, optionally, for system calls.
|
||||
* @note The SVC vector is only used in advanced kernel mode.
|
||||
*/
|
||||
/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
|
||||
void SVC_Handler(void) {
|
||||
/*lint -restore*/
|
||||
struct port_extctx *ctxp;
|
||||
uint32_t control;
|
||||
uint32_t psp = __get_PSP();
|
||||
|
||||
#if CORTEX_USE_FPU
|
||||
/* Enforcing unstacking of the FP part of the context.*/
|
||||
FPU->FPCCR &= ~FPU_FPCCR_LSPACT_Msk;
|
||||
chDbgAssert(((uint32_t)__builtin_return_address(0) & 4U) == 0U,
|
||||
"not process");
|
||||
|
||||
#if PORT_USE_SYSCALL == TRUE
|
||||
/* Caller context.*/
|
||||
struct port_extctx *ectxp = (struct port_extctx *)psp;
|
||||
|
||||
/* Checking if the SVC instruction has been used from privileged or
|
||||
non-privileged mode.*/
|
||||
control = __get_CONTROL();
|
||||
if ((control & 1U) != 0) {
|
||||
/* From non-privileged mode, it must be handled as a syscall.*/
|
||||
uint32_t n, s_psp;
|
||||
struct port_linkctx *lctxp;
|
||||
struct port_extctx *newctxp;
|
||||
|
||||
/* Supervisor PSP from the thread context structure.*/
|
||||
s_psp = (uint32_t)currp->ctx.syscall.psp;
|
||||
|
||||
/* Pushing the port_linkctx into the supervisor stack.*/
|
||||
s_psp -= sizeof (struct port_linkctx);
|
||||
lctxp = (struct port_linkctx *)s_psp;
|
||||
lctxp->control = (regarm_t)control;
|
||||
lctxp->ectxp = (regarm_t)ectxp;
|
||||
|
||||
/* Enforcing privileged mode before returning.*/
|
||||
__set_CONTROL(control & ~1U);
|
||||
|
||||
/* Number of the SVC instruction.*/
|
||||
n = (uint32_t)*(((const uint16_t *)ectxp->pc) - 1U) & 255U;
|
||||
|
||||
/* Building an artificial return context, we need to make this
|
||||
return in the syscall dispatcher in privileged mode.*/
|
||||
s_psp -= sizeof (struct port_extctx);
|
||||
__set_PSP(s_psp);
|
||||
newctxp = (struct port_extctx *)s_psp;
|
||||
newctxp->r0 = (regarm_t)ectxp;
|
||||
newctxp->r1 = (regarm_t)n;
|
||||
newctxp->pc = (regarm_t)port_syscall;
|
||||
newctxp->xpsr = (regarm_t)0x01000000;
|
||||
#if CORTEX_USE_FPU == TRUE
|
||||
newctxp->fpscr = (regarm_t)FPU->FPDSCR;
|
||||
#endif
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* From privileged mode, it is used for context discarding in the
|
||||
preemption code.*/
|
||||
|
||||
/* Unstacking procedure, discarding the current exception context and
|
||||
positioning the stack to point to the real one.*/
|
||||
psp += sizeof (struct port_extctx);
|
||||
|
||||
#if CORTEX_USE_FPU == TRUE
|
||||
/* Enforcing unstacking of the FP part of the context.*/
|
||||
FPU->FPCCR &= ~FPU_FPCCR_LSPACT_Msk;
|
||||
#endif
|
||||
|
||||
/* The port_extctx structure is pointed by the PSP register.*/
|
||||
ctxp = (struct port_extctx *)__get_PSP();
|
||||
#if PORT_USE_SYSCALL == TRUE
|
||||
{
|
||||
/* Restoring CONTROL and the original PSP position.*/
|
||||
struct port_linkctx *lctxp = (struct port_linkctx *)psp;
|
||||
__set_CONTROL((uint32_t)lctxp->control);
|
||||
__set_PSP((uint32_t)lctxp->ectxp);
|
||||
}
|
||||
#else
|
||||
|
||||
/* Discarding the current exception context and positioning the stack to
|
||||
point to the real one.*/
|
||||
ctxp++;
|
||||
/* Restoring real position of the original stack frame.*/
|
||||
__set_PSP(psp);
|
||||
#endif
|
||||
|
||||
/* Restoring real position of the original stack frame.*/
|
||||
__set_PSP((uint32_t)ctxp);
|
||||
|
||||
/* Restoring the normal interrupts status.*/
|
||||
port_unlock_from_isr();
|
||||
/* Restoring the normal interrupts status.*/
|
||||
port_unlock_from_isr();
|
||||
}
|
||||
}
|
||||
#endif /* CORTEX_SIMPLIFIED_PRIORITY == FALSE */
|
||||
|
||||
|
|
@ -93,22 +213,28 @@ void SVC_Handler(void) {
|
|||
/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
|
||||
void PendSV_Handler(void) {
|
||||
/*lint -restore*/
|
||||
struct port_extctx *ctxp;
|
||||
uint32_t psp = __get_PSP();
|
||||
|
||||
#if CORTEX_USE_FPU
|
||||
/* Enforcing unstacking of the FP part of the context.*/
|
||||
FPU->FPCCR &= ~FPU_FPCCR_LSPACT_Msk;
|
||||
#endif
|
||||
|
||||
/* The port_extctx structure is pointed by the PSP register.*/
|
||||
ctxp = (struct port_extctx *)__get_PSP();
|
||||
|
||||
/* Discarding the current exception context and positioning the stack to
|
||||
point to the real one.*/
|
||||
ctxp++;
|
||||
psp += sizeof (struct port_extctx);
|
||||
|
||||
/* Writing back the modified PSP value.*/
|
||||
__set_PSP((uint32_t)ctxp);
|
||||
#if PORT_USE_SYSCALL == TRUE
|
||||
{
|
||||
/* Restoring previous privileges by restoring CONTROL.*/
|
||||
struct port_linkctx *lctxp = (struct port_linkctx *)psp;
|
||||
__set_CONTROL((uint32_t)lctxp->control);
|
||||
psp += sizeof (struct port_linkctx);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Restoring real position of the original stack frame.*/
|
||||
__set_PSP(psp);
|
||||
}
|
||||
#endif /* CORTEX_SIMPLIFIED_PRIORITY == TRUE */
|
||||
|
||||
|
|
@ -116,6 +242,52 @@ void PendSV_Handler(void) {
|
|||
/* Module exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Port-related initialization code.
|
||||
*/
|
||||
void port_init(void) {
|
||||
|
||||
/* Starting in a known IRQ configuration.*/
|
||||
__set_BASEPRI(CORTEX_BASEPRI_DISABLED);
|
||||
__enable_irq();
|
||||
|
||||
/* Initializing priority grouping.*/
|
||||
NVIC_SetPriorityGrouping(CORTEX_PRIGROUP_INIT);
|
||||
|
||||
/* DWT cycle counter enable, note, the M7 requires DWT unlocking.*/
|
||||
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
|
||||
#if CORTEX_MODEL == 7
|
||||
DWT->LAR = 0xC5ACCE55U;
|
||||
#endif
|
||||
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
|
||||
|
||||
/* Initialization of the system vectors used by the port.*/
|
||||
#if CORTEX_SIMPLIFIED_PRIORITY == FALSE
|
||||
NVIC_SetPriority(SVCall_IRQn, CORTEX_PRIORITY_SVCALL);
|
||||
#endif
|
||||
NVIC_SetPriority(PendSV_IRQn, CORTEX_PRIORITY_PENDSV);
|
||||
|
||||
#if PORT_ENABLE_GUARD_PAGES == TRUE
|
||||
{
|
||||
extern stkalign_t __main_thread_stack_base__;
|
||||
|
||||
/* Setting up the guard page on the main() function stack base
|
||||
initially.*/
|
||||
mpuConfigureRegion(PORT_USE_MPU_REGION,
|
||||
&__main_thread_stack_base__,
|
||||
MPU_RASR_ATTR_AP_NA_NA |
|
||||
MPU_RASR_ATTR_NON_CACHEABLE |
|
||||
MPU_RASR_SIZE_32 |
|
||||
MPU_RASR_ENABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if PORT_USE_SYSCALL == TRUE
|
||||
/* MPU is enabled.*/
|
||||
mpuEnable(MPU_CTRL_PRIVDEFENA);
|
||||
#endif
|
||||
}
|
||||
|
||||
#if ((CH_DBG_ENABLE_STACK_CHECK == TRUE) && \
|
||||
(PORT_ENABLE_GUARD_PAGES == TRUE)) || \
|
||||
defined(__DOXYGEN__)
|
||||
|
|
@ -136,39 +308,76 @@ void _port_irq_epilogue(void) {
|
|||
|
||||
port_lock_from_isr();
|
||||
if ((SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) != 0U) {
|
||||
struct port_extctx *ctxp;
|
||||
struct port_extctx *ectxp;
|
||||
uint32_t s_psp;
|
||||
|
||||
#if CORTEX_USE_FPU == TRUE
|
||||
/* Enforcing a lazy FPU state save by accessing the FPCSR register.*/
|
||||
(void) __get_FPSCR();
|
||||
/* Enforcing a lazy FPU state save by accessing the FPCSR register.*/
|
||||
(void) __get_FPSCR();
|
||||
#endif
|
||||
|
||||
/* The port_extctx structure is pointed by the PSP register.*/
|
||||
ctxp = (struct port_extctx *)__get_PSP();
|
||||
#if PORT_USE_SYSCALL == TRUE
|
||||
{
|
||||
struct port_linkctx *lctxp;
|
||||
uint32_t control = __get_CONTROL();
|
||||
|
||||
/* Checking if the IRQ has been served in unprivileged mode.*/
|
||||
if ((control & 1U) != 0U) {
|
||||
/* Unprivileged mode, switching to privileged mode.*/
|
||||
__set_CONTROL(control & ~1U);
|
||||
|
||||
/* Switching to S-PSP taking it from the thread context.*/
|
||||
s_psp = (uint32_t)currp->ctx.syscall.psp;
|
||||
|
||||
/* Pushing the middle context for returning to the original frame
|
||||
and mode.*/
|
||||
s_psp = s_psp - sizeof (struct port_linkctx);
|
||||
lctxp = (struct port_linkctx *)s_psp;
|
||||
lctxp->control = (regarm_t)control;
|
||||
lctxp->ectxp = (struct port_extctx *)__get_PSP();
|
||||
}
|
||||
else {
|
||||
/* Privileged mode, we are already on S-PSP.*/
|
||||
uint32_t psp = __get_PSP();
|
||||
|
||||
/* Pushing the middle context for returning to the original frame
|
||||
and mode.*/
|
||||
s_psp = psp - sizeof (struct port_linkctx);
|
||||
lctxp = (struct port_linkctx *)s_psp;
|
||||
lctxp->control = (regarm_t)control;
|
||||
lctxp->ectxp = (struct port_extctx *)psp;
|
||||
}
|
||||
}
|
||||
#else
|
||||
s_psp = __get_PSP();
|
||||
#endif
|
||||
|
||||
/* Adding an artificial exception return context, there is no need to
|
||||
populate it fully.*/
|
||||
ctxp--;
|
||||
s_psp -= sizeof (struct port_extctx);
|
||||
|
||||
/* The port_extctx structure is pointed by the S-PSP register.*/
|
||||
ectxp = (struct port_extctx *)s_psp;
|
||||
|
||||
/* Setting up a fake XPSR register value.*/
|
||||
ctxp->xpsr = (regarm_t)0x01000000;
|
||||
ectxp->xpsr = (regarm_t)0x01000000;
|
||||
#if CORTEX_USE_FPU == TRUE
|
||||
ctxp->fpscr = (regarm_t)FPU->FPDSCR;
|
||||
ectxp->fpscr = (regarm_t)FPU->FPDSCR;
|
||||
#endif
|
||||
|
||||
/* Writing back the modified PSP value.*/
|
||||
__set_PSP((uint32_t)ctxp);
|
||||
/* Writing back the modified S-PSP value.*/
|
||||
__set_PSP(s_psp);
|
||||
|
||||
/* The exit sequence is different depending on if a preemption is
|
||||
required or not.*/
|
||||
if (chSchIsPreemptionRequired()) {
|
||||
/* Preemption is required we need to enforce a context switch.*/
|
||||
ctxp->pc = (regarm_t)_port_switch_from_isr;
|
||||
ectxp->pc = (regarm_t)_port_switch_from_isr;
|
||||
}
|
||||
else {
|
||||
/* Preemption not required, we just need to exit the exception
|
||||
atomically.*/
|
||||
ctxp->pc = (regarm_t)_port_exit_from_isr;
|
||||
ectxp->pc = (regarm_t)_port_exit_from_isr;
|
||||
}
|
||||
|
||||
/* Note, returning without unlocking is intentional, this is done in
|
||||
|
|
|
|||
|
|
@ -70,6 +70,13 @@
|
|||
/* Module pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Implements a syscall interface on SVC.
|
||||
*/
|
||||
#if !defined(PORT_USE_SYSCALL) || defined(__DOXYGEN__)
|
||||
#define PORT_USE_SYSCALL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables stack overflow guard pages using MPU.
|
||||
* @note This option can only be enabled if also option
|
||||
|
|
@ -349,6 +356,19 @@ struct port_extctx {
|
|||
#endif /* CORTEX_USE_FPU */
|
||||
};
|
||||
|
||||
#if (PORT_USE_SYSCALL == TRUE) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Link context structure.
|
||||
* @details This structure is used when there is the need to save extra
|
||||
* context information that is not part of the registers stacked
|
||||
* in HW.
|
||||
*/
|
||||
struct port_linkctx {
|
||||
regarm_t control;
|
||||
struct port_extctx *ectxp;
|
||||
};
|
||||
#endif
|
||||
|
||||
struct port_intctx {
|
||||
#if CORTEX_USE_FPU
|
||||
regarm_t s16;
|
||||
|
|
@ -378,12 +398,30 @@ struct port_intctx {
|
|||
regarm_t r11;
|
||||
regarm_t lr;
|
||||
};
|
||||
|
||||
struct port_context {
|
||||
struct port_intctx *sp;
|
||||
#if (PORT_USE_SYSCALL == TRUE) || defined(__DOXYGEN__)
|
||||
struct {
|
||||
regarm_t psp;
|
||||
const void *regions;
|
||||
} syscall;
|
||||
#endif
|
||||
};
|
||||
#endif /* !defined(__DOXYGEN__) */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (PORT_USE_SYSCALL == TRUE) || defined(__DOXYGEN__)
|
||||
#define __PORT_SETUP_CONTEXT_SYSCALL(tp, wtop) \
|
||||
(tp)->ctx.syscall.psp = (regarm_t)(wtop); \
|
||||
(tp)->ctx.syscall.regions = NULL;
|
||||
#else
|
||||
#define __PORT_SETUP_CONTEXT_SYSCALL(tp, wtop)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p chThdCreateI() API.
|
||||
* @details This code usually setup the context switching frame represented
|
||||
|
|
@ -395,6 +433,7 @@ struct port_intctx {
|
|||
(tp)->ctx.sp->r4 = (regarm_t)(pf); \
|
||||
(tp)->ctx.sp->r5 = (regarm_t)(arg); \
|
||||
(tp)->ctx.sp->lr = (regarm_t)_port_thread_start; \
|
||||
__PORT_SETUP_CONTEXT_SYSCALL(tp, wtop) \
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -498,11 +537,15 @@ struct port_intctx {
|
|||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void port_init(void);
|
||||
void _port_irq_epilogue(void);
|
||||
void _port_switch(thread_t *ntp, thread_t *otp);
|
||||
void _port_thread_start(void);
|
||||
void _port_switch_from_isr(void);
|
||||
void _port_exit_from_isr(void);
|
||||
#if PORT_USE_SYSCALL == TRUE
|
||||
void port_unprivileged_jump(regarm_t pc, regarm_t psp);
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
@ -511,46 +554,6 @@ extern "C" {
|
|||
/* Module inline functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Port-related initialization code.
|
||||
*/
|
||||
static inline void port_init(void) {
|
||||
|
||||
/* Initializing priority grouping.*/
|
||||
NVIC_SetPriorityGrouping(CORTEX_PRIGROUP_INIT);
|
||||
|
||||
/* DWT cycle counter enable, note, the M7 requires DWT unlocking.*/
|
||||
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
|
||||
#if CORTEX_MODEL == 7
|
||||
DWT->LAR = 0xC5ACCE55U;
|
||||
#endif
|
||||
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
|
||||
|
||||
/* Initialization of the system vectors used by the port.*/
|
||||
#if CORTEX_SIMPLIFIED_PRIORITY == FALSE
|
||||
NVIC_SetPriority(SVCall_IRQn, CORTEX_PRIORITY_SVCALL);
|
||||
#endif
|
||||
NVIC_SetPriority(PendSV_IRQn, CORTEX_PRIORITY_PENDSV);
|
||||
|
||||
#if PORT_ENABLE_GUARD_PAGES == TRUE
|
||||
{
|
||||
extern stkalign_t __main_thread_stack_base__;
|
||||
|
||||
/* Setting up the guard page on the main() function stack base
|
||||
initially.*/
|
||||
mpuConfigureRegion(PORT_USE_MPU_REGION,
|
||||
&__main_thread_stack_base__,
|
||||
MPU_RASR_ATTR_AP_NA_NA |
|
||||
MPU_RASR_ATTR_NON_CACHEABLE |
|
||||
MPU_RASR_SIZE_32 |
|
||||
MPU_RASR_ENABLE);
|
||||
|
||||
/* MPU is enabled.*/
|
||||
mpuEnable(MPU_CTRL_PRIVDEFENA);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns a word encoding the current interrupts status.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -0,0 +1,193 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file crt0.S
|
||||
* @brief Generic ARMv7-M sandbox startup file for ChibiOS.
|
||||
*
|
||||
* @addtogroup ARMCMx_GCC_STARTUP_V7M_SB
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(FALSE) || defined(__DOXYGEN__)
|
||||
#define FALSE 0
|
||||
#endif
|
||||
|
||||
#if !defined(TRUE) || defined(__DOXYGEN__)
|
||||
#define TRUE 1
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Module pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Stack segments initialization switch.
|
||||
*/
|
||||
#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__)
|
||||
#define CRT0_STACKS_FILL_PATTERN 0x55555555
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Stack segments initialization switch.
|
||||
*/
|
||||
#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__)
|
||||
#define CRT0_INIT_STACKS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief DATA segment initialization switch.
|
||||
*/
|
||||
#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__)
|
||||
#define CRT0_INIT_DATA TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief BSS segment initialization switch.
|
||||
*/
|
||||
#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__)
|
||||
#define CRT0_INIT_BSS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Constructors invocation switch.
|
||||
*/
|
||||
#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__)
|
||||
#define CRT0_CALL_CONSTRUCTORS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Destructors invocation switch.
|
||||
*/
|
||||
#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__)
|
||||
#define CRT0_CALL_DESTRUCTORS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Code section. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m3
|
||||
|
||||
.thumb
|
||||
.text
|
||||
|
||||
.section .sandbox, "ax"
|
||||
.align 4
|
||||
.globl _sandbox
|
||||
_sandbox: .long 0xFE9154C0U
|
||||
.long 0x0C4519EFU
|
||||
.long 32
|
||||
.long 0
|
||||
.long __r1_start__
|
||||
.long __r1_end__
|
||||
.long __r2_start__
|
||||
.long __r2_end__
|
||||
|
||||
/*
|
||||
* CRT0 entry point.
|
||||
*/
|
||||
.align 2
|
||||
.thumb_func
|
||||
.global _crt0_entry
|
||||
_crt0_entry:
|
||||
|
||||
/* PSP stack pointers initialization.*/
|
||||
ldr r0, =__user_psp_end__
|
||||
msr PSP, r0
|
||||
|
||||
#if CRT0_INIT_STACKS == TRUE
|
||||
/* User process Stack initialization. Note, it assumes that the
|
||||
stack size is a multiple of 4 so the linker file must
|
||||
ensure this.*/
|
||||
ldr r0, =CRT0_STACKS_FILL_PATTERN
|
||||
ldr r1, =__user_psp_base__
|
||||
ldr r2, =__user_psp_end__
|
||||
upsloop:
|
||||
cmp r1, r2
|
||||
itt lo
|
||||
strlo r0, [r1], #4
|
||||
blo upsloop
|
||||
#endif /* CRT0_INIT_STACKS == TRUE */
|
||||
|
||||
#if CRT0_INIT_DATA == TRUE
|
||||
/* Data initialization. Note, it assumes that the DATA size
|
||||
is a multiple of 4 so the linker file must ensure this.*/
|
||||
ldr r1, =_textdata_start
|
||||
ldr r2, =_data_start
|
||||
ldr r3, =_data_end
|
||||
dloop:
|
||||
cmp r2, r3
|
||||
ittt lo
|
||||
ldrlo r0, [r1], #4
|
||||
strlo r0, [r2], #4
|
||||
blo dloop
|
||||
#endif /* CRT0_INIT_DATA == TRUE */
|
||||
|
||||
#if CRT0_INIT_BSS == TRUE
|
||||
/* BSS initialization. Note, it assumes that the DATA size
|
||||
is a multiple of 4 so the linker file must ensure this.*/
|
||||
movs r0, #0
|
||||
ldr r1, =_bss_start
|
||||
ldr r2, =_bss_end
|
||||
bloop:
|
||||
cmp r1, r2
|
||||
itt lo
|
||||
strlo r0, [r1], #4
|
||||
blo bloop
|
||||
#endif /* CRT0_INIT_BSS == TRUE */
|
||||
|
||||
#if CRT0_CALL_CONSTRUCTORS == TRUE
|
||||
/* Constructors invocation.*/
|
||||
ldr r4, =__init_array_start
|
||||
ldr r5, =__init_array_end
|
||||
initloop:
|
||||
cmp r4, r5
|
||||
bge endinitloop
|
||||
ldr r1, [r4], #4
|
||||
blx r1
|
||||
b initloop
|
||||
endinitloop:
|
||||
#endif /* CRT0_CALL_CONSTRUCTORS == TRUE */
|
||||
|
||||
/* Main program invocation, r0 contains the returned value.*/
|
||||
bl main
|
||||
|
||||
#if CRT0_CALL_DESTRUCTORS == TRUE
|
||||
/* Destructors invocation.*/
|
||||
ldr r4, =__fini_array_start
|
||||
ldr r5, =__fini_array_end
|
||||
finiloop:
|
||||
cmp r4, r5
|
||||
bge endfiniloop
|
||||
ldr r1, [r4], #4
|
||||
blx r1
|
||||
b finiloop
|
||||
endfiniloop:
|
||||
#endif /* CRT0_CALL_DESTRUCTORS == TRUE */
|
||||
|
||||
.exitloop: b .exitloop
|
||||
|
||||
#endif /* !defined(__DOXYGEN__) */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
/* Stack rules inclusion.*/
|
||||
INCLUDE rules_stacks.ld
|
||||
|
||||
/* Code rules inclusion.*/
|
||||
INCLUDE rules_code.ld
|
||||
|
||||
/* Data rules inclusion.*/
|
||||
INCLUDE rules_data.ld
|
||||
|
||||
/* Memory rules inclusion.*/
|
||||
INCLUDE rules_memory.ld
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
ENTRY(_crt0_entry)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.sandbox : ALIGN(16)
|
||||
{
|
||||
KEEP(*(.sandbox))
|
||||
} > CODE_SPACE
|
||||
|
||||
.xtors : ALIGN(4)
|
||||
{
|
||||
__init_array_start = .;
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
__init_array_end = .;
|
||||
__fini_array_start = .;
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
} > CODE_SPACE
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
__text_base = .;
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
__text_end = .;
|
||||
} > CODE_SPACE
|
||||
|
||||
.rodata : ALIGN(4)
|
||||
{
|
||||
__rodata_base__ = .;
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
. = ALIGN(4);
|
||||
__rodata_end__ = .;
|
||||
} > CODE_SPACE
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > CODE_SPACE
|
||||
|
||||
.ARM.exidx : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
__exidx_end = .;
|
||||
} > CODE_SPACE
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > CODE_SPACE
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > CODE_SPACE
|
||||
}
|
||||
|
|
@ -0,0 +1,43 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
PROVIDE(_textdata = LOADADDR(.data));
|
||||
PROVIDE(_data = .);
|
||||
_textdata_start = LOADADDR(.data);
|
||||
_data_start = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
_data_end = .;
|
||||
} > DATA_SPACE
|
||||
|
||||
.bss (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
_bss_start = .;
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bss_end = .;
|
||||
PROVIDE(end = .);
|
||||
} > DATA_SPACE
|
||||
}
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* The default heap uses the (statically) unused part of a RAM section.*/
|
||||
.heap (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__heap_base__ = .;
|
||||
. = ORIGIN(DATA_SPACE) + LENGTH(DATA_SPACE);
|
||||
__heap_end__ = .;
|
||||
} > DATA_SPACE
|
||||
}
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.upsp (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__user_psp_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__user_psp_end__ = .;
|
||||
} > DATA_SPACE
|
||||
}
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
# List of the ChibiOS generic sandbox startup files.
|
||||
STARTUPSRC =
|
||||
|
||||
STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx-SB/compilers/GCC/crt0.S
|
||||
|
||||
STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \
|
||||
$(CHIBIOS)/os/common/startup/ARMCMx-SB/compilers/GCC
|
||||
|
||||
STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx-SB/compilers/GCC/ld
|
||||
|
||||
# Shared variables
|
||||
ALLXASMSRC += $(STARTUPASM)
|
||||
ALLCSRC += $(STARTUPSRC)
|
||||
ALLINC += $(STARTUPINC)
|
||||
|
|
@ -74,6 +74,7 @@
|
|||
*****************************************************************************
|
||||
|
||||
*** Next ***
|
||||
- NEW: Cortex-M SandBox subsystem added.
|
||||
- LIB: Added a cache class to OSLIB.
|
||||
- NEW: Added an option to change the shell thread name.
|
||||
- HAL: Made bus acquire/release functions in SNOR driver public.
|
||||
|
|
|
|||
Loading…
Reference in New Issue