mirror of https://github.com/rusefi/ChibiOS.git
Undid SPI changes.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9050 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
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3643caa854
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@ -144,15 +144,6 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) {
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dmaStreamDisable(spip->dmatx);
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dmaStreamDisable(spip->dmarx);
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#if STM32_SPI_USE_BIDIMODE
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spip->spi->CR1 |= SPI_CR1_BIDIOE;
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/* Errors reset sequence. It is required becaue BIDIOE could cause extra
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clock pulses after DMA stopped reading.*/
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(void)spip->spi->DR;
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(void)spip->spi->SR;
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#endif
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/* Portable SPI ISR code defined in the high level driver, note, it is
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a macro.*/
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_spi_isr_code(spip);
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@ -311,12 +302,6 @@ void spi_lld_init(void) {
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*/
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void spi_lld_start(SPIDriver *spip) {
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#if STM32_SPI_USE_BIDIMODE
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osalDbgAssert(!(((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0) ^^
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((spip->spi->CR1 & SPI_CR1_BIDIOE) == 0)),
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"BIDIOE not set");
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#endif
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/* If in stopped state then enables the SPI and DMA clocks.*/
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if (spip->state == SPI_STOP) {
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#if STM32_SPI_USE_SPI1
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@ -527,13 +512,6 @@ void spi_lld_unselect(SPIDriver *spip) {
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*/
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void spi_lld_ignore(SPIDriver *spip, size_t n) {
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#if STM32_SPI_USE_BIDIMODE
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if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
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osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
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"BIDIOE not set");
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}
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#endif
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dmaStreamSetMemory0(spip->dmarx, &dummyrx);
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dmaStreamSetTransactionSize(spip->dmarx, n);
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dmaStreamSetMode(spip->dmarx, spip->rxdmamode);
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@ -564,11 +542,6 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) {
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void spi_lld_exchange(SPIDriver *spip, size_t n,
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const void *txbuf, void *rxbuf) {
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#if STM32_SPI_USE_BIDIMODE
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osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0,
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"spiExchange() not possible with BIDIMODE");
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#endif
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dmaStreamSetMemory0(spip->dmarx, rxbuf);
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dmaStreamSetTransactionSize(spip->dmarx, n);
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dmaStreamSetMode(spip->dmarx, spip->rxdmamode| STM32_DMA_CR_MINC);
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@ -596,13 +569,6 @@ void spi_lld_exchange(SPIDriver *spip, size_t n,
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*/
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void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
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#if STM32_SPI_USE_BIDIMODE
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if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
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osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
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"BIDIOE not set");
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}
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#endif
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dmaStreamSetMemory0(spip->dmarx, &dummyrx);
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dmaStreamSetTransactionSize(spip->dmarx, n);
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dmaStreamSetMode(spip->dmarx, spip->rxdmamode);
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@ -630,22 +596,6 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
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*/
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void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
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#if STM32_SPI_USE_BIDIMODE
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if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
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osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
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"BIDIOE not set");
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dmaStreamSetMemory0(spip->dmarx, rxbuf);
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dmaStreamSetTransactionSize(spip->dmarx, n);
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dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
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dmaStreamEnable(spip->dmarx);
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spip->spi->CR1 &= ~SPI_CR1_BIDIOE;
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}
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else {
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#else
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dmaStreamSetMemory0(spip->dmarx, rxbuf);
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dmaStreamSetTransactionSize(spip->dmarx, n);
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dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
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@ -656,10 +606,6 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
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dmaStreamEnable(spip->dmarx);
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dmaStreamEnable(spip->dmatx);
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#endif
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#if STM32_SPI_USE_BIDIMODE
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}
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#endif
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}
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/**
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@ -676,11 +622,6 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
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*/
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uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) {
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#if STM32_SPI_USE_BIDIMODE
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osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0,
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"spiPolledExchange() not possible with BIDIMODE");
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#endif
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spip->spi->DR = frame;
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while ((spip->spi->SR & SPI_SR_RXNE) == 0)
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;
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@ -195,15 +195,6 @@
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#define STM32_SPI_SPI6_DMA_PRIORITY 1
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#endif
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/**
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* @brief Enables the SPI BIDIMODE support.
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* @details If set to @p TRUE the support for BIDIMODE CR1 bit is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_SPI_USE_BIDIMODE) || defined(__DOXYGEN__)
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#define STM32_SPI_USE_BIDIMODE FALSE
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#endif
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/**
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* @brief SPI DMA error hook.
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*/
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@ -144,15 +144,6 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) {
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dmaStreamDisable(spip->dmatx);
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dmaStreamDisable(spip->dmarx);
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#if STM32_SPI_USE_BIDIMODE
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spip->spi->CR1 |= SPI_CR1_BIDIOE;
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/* Errors reset sequence. It is required becaue BIDIOE could cause extra
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clock pulses after DMA stopped reading.*/
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(void)spip->spi->DR;
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(void)spip->spi->SR;
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#endif
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/* Portable SPI ISR code defined in the high level driver, note, it is
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a macro.*/
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_spi_isr_code(spip);
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@ -312,12 +303,6 @@ void spi_lld_init(void) {
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void spi_lld_start(SPIDriver *spip) {
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uint32_t ds;
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#if STM32_SPI_USE_BIDIMODE
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osalDbgAssert(!(((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0) ^^
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((spip->spi->CR1 & SPI_CR1_BIDIOE) == 0)),
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"BIDIOE not set");
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#endif
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/* If in stopped state then enables the SPI and DMA clocks.*/
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if (spip->state == SPI_STOP) {
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#if STM32_SPI_USE_SPI1
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@ -530,13 +515,6 @@ void spi_lld_unselect(SPIDriver *spip) {
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*/
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void spi_lld_ignore(SPIDriver *spip, size_t n) {
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#if STM32_SPI_USE_BIDIMODE
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if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
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osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
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"BIDIOE not set");
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}
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#endif
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dmaStreamSetMemory0(spip->dmarx, &dummyrx);
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dmaStreamSetTransactionSize(spip->dmarx, n);
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dmaStreamSetMode(spip->dmarx, spip->rxdmamode);
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@ -567,11 +545,6 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) {
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void spi_lld_exchange(SPIDriver *spip, size_t n,
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const void *txbuf, void *rxbuf) {
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#if STM32_SPI_USE_BIDIMODE
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osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0,
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"spiExchange() not possible with BIDIMODE");
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#endif
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dmaStreamSetMemory0(spip->dmarx, rxbuf);
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dmaStreamSetTransactionSize(spip->dmarx, n);
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dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
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@ -599,13 +572,6 @@ void spi_lld_exchange(SPIDriver *spip, size_t n,
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*/
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void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
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#if STM32_SPI_USE_BIDIMODE
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if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
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osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
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"BIDIOE not set");
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}
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#endif
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dmaStreamSetMemory0(spip->dmarx, &dummyrx);
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dmaStreamSetTransactionSize(spip->dmarx, n);
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dmaStreamSetMode(spip->dmarx, spip->rxdmamode);
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@ -633,22 +599,6 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
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*/
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void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
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#if STM32_SPI_USE_BIDIMODE
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if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
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osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
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"BIDIOE not set");
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dmaStreamSetMemory0(spip->dmarx, rxbuf);
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dmaStreamSetTransactionSize(spip->dmarx, n);
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dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
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dmaStreamEnable(spip->dmarx);
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spip->spi->CR1 &= ~SPI_CR1_BIDIOE;
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}
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else {
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#else
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dmaStreamSetMemory0(spip->dmarx, rxbuf);
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dmaStreamSetTransactionSize(spip->dmarx, n);
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dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
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@ -659,10 +609,6 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
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dmaStreamEnable(spip->dmarx);
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dmaStreamEnable(spip->dmatx);
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#endif
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#if STM32_SPI_USE_BIDIMODE
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}
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#endif
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}
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/**
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@ -679,11 +625,6 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
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*/
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uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) {
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#if STM32_SPI_USE_BIDIMODE
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osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0,
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"spiPolledExchange() not possible with BIDIMODE");
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#endif
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/*
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* Data register must be accessed with the appropriate data size.
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* Byte size access (uint8_t *) for transactions that are <= 8-bit.
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@ -195,15 +195,6 @@
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#define STM32_SPI_SPI6_DMA_PRIORITY 1
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#endif
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/**
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* @brief Enables the SPI BIDIMODE support.
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* @details If set to @p TRUE the support for BIDIMODE CR1 bit is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_SPI_USE_BIDIMODE) || defined(__DOXYGEN__)
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#define STM32_SPI_USE_BIDIMODE FALSE
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#endif
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/**
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* @brief SPI DMA error hook.
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*/
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