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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12874 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

This commit is contained in:
Giovanni Di Sirio 2019-07-06 09:48:33 +00:00
parent 2349e2252b
commit e9ac43b2df
1 changed files with 213 additions and 0 deletions
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213
demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h Normal file
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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* STM32L4xx drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 3...0 Lowest...Highest.
*
* DMA priorities:
* 0...3 Lowest...Highest.
*/
#ifndef MCUCONF_H
#define MCUCONF_H
#define STM32G0xx_MCUCONF
#define STM32G071_MCUCONF
#define STM32G081_MCUCONF
/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_RANGE1
#define STM32_PWR_CR2 (STM32_PVDRT_LEV0 | \
STM32_PVDFT_LEV0 | \
STM32_PVDE_DISABLED)
#define STM32_HSIDIV_VALUE 1
#define STM32_HSI16_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
#define STM32_LSI_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLLRCLK
#define STM32_PLLSRC STM32_PLLSRC_HSI16
#define STM32_PLLM_VALUE 2
#define STM32_PLLN_VALUE 16
#define STM32_PLLP_VALUE 4
#define STM32_PLLQ_VALUE 4
#define STM32_PLLR_VALUE 2
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE STM32_PPRE_DIV1
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
/*
* Peripherals clocks and sources.
*/
#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK
#define STM32_CECSEL STM32_CECSEL_HSI16DIV
#define STM32_I2C1SEL STM32_I2C1SEL_PCLK
#define STM32_I2S1SEL STM32_I2S1SEL_SYSCLK
#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK
#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK
#define STM32_TIM1SEL STM32_TIM1SEL_TIMPCLK
#define STM32_TIM15SEL STM32_TIM15SEL_TIMPCLK
#define STM32_RNGSEL STM32_RNGSEL_HSI16
#define STM32_RNGDIV_VALUE 1
#define STM32_ADCSEL STM32_ADCSEL_PLLPCLK
#define STM32_RTCSEL STM32_RTCSEL_NOCLOCK
/*
* Shared IRQ settings.
*/
#define STM32_IRQ_EXTI0_1_PRIORITY 3
#define STM32_IRQ_EXTI2_3_PRIORITY 3
#define STM32_IRQ_EXTI4_15_PRIORITY 3
#define STM32_IRQ_EXTI16_PRIORITY 3
#define STM32_IRQ_EXTI17_18_PRIORITY 3
#define STM32_IRQ_USART3_4_LP1_PRIORITY 3
/*
* ADC driver system settings.
*/
/*
* DAC driver system settings.
*/
/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 1
#define STM32_GPT_TIM2_IRQ_PRIORITY 1
#define STM32_GPT_TIM3_IRQ_PRIORITY 1
#define STM32_GPT_TIM6_IRQ_PRIORITY 1
#define STM32_GPT_TIM7_IRQ_PRIORITY 1
/*
* I2C driver system settings.
*/
/*
* ICU driver system settings.
*/
#define STM32_ICU_USE_TIM1 FALSE
#define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 1
#define STM32_ICU_TIM2_IRQ_PRIORITY 1
#define STM32_ICU_TIM3_IRQ_PRIORITY 1
/*
* PWM driver system settings.
*/
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 1
#define STM32_PWM_TIM2_IRQ_PRIORITY 1
#define STM32_PWM_TIM3_IRQ_PRIORITY 1
/*
* RTC driver system settings.
*/
#define STM32_RTC_PRESA_VALUE 32
#define STM32_RTC_PRESS_VALUE 1024
#define STM32_RTC_CR_INIT 0
#define STM32_RTC_TAMPCR_INIT 0
/*
* SERIAL driver system settings.
*/
#define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 FALSE
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_LPUART1 TRUE
#define STM32_SERIAL_USART1_PRIORITY 3
#define STM32_SERIAL_USART2_PRIORITY 3
/*
* SPI driver system settings.
*/
#define STM32_SPI_USE_SPI1 FALSE
#define STM32_SPI_USE_SPI2 FALSE
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1
#define STM32_SPI_SPI1_IRQ_PRIORITY 2
#define STM32_SPI_SPI2_IRQ_PRIORITY 2
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
/*
* ST driver system settings.
*/
#define STM32_ST_IRQ_PRIORITY 2
#define STM32_ST_USE_TIMER 2
/*
* TRNG driver system settings.
*/
/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
#define STM32_UART_USE_USART2 FALSE
#define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USE_UART4 FALSE
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
#define STM32_UART_USART1_IRQ_PRIORITY 3
#define STM32_UART_USART2_IRQ_PRIORITY 3
#define STM32_UART_USART3_IRQ_PRIORITY 3
#define STM32_UART_UART4_IRQ_PRIORITY 3
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
/*
* WDG driver system settings.
*/
#define STM32_WDG_USE_IWDG FALSE
#endif /* MCUCONF_H */