mirror of https://github.com/rusefi/ChibiOS.git
Fixed documentation tags.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14469 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
parent
0ce2db283b
commit
f3b1bd3859
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@ -18,7 +18,7 @@
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*/
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/**
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* @file chcore_timer.h
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* @file ARM/chcore_timer.h
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* @brief System timer header file.
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*
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* @addtogroup ARM_TIMER
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@ -21,7 +21,7 @@
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* @file ARMv6-M-RP2/chcore.c
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* @brief ARMv6-M-RP2 port code.
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*
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* @addtogroup ARMv6_M_RP2_CORE
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* @addtogroup ARMV6M_RP2_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv6-M-RP2/chcore.h
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* @brief ARMv6-M-RP2 port macros and structures.
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*
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* @addtogroup ARMv6_M_RP2_CORE
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* @addtogroup ARMV6M_RP2_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv6-M-RP2/chcore_timer.h
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* @brief System timer header file.
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*
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* @addtogroup ARMv6_M_RP2_TIMER
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* @addtogroup ARMV6M_RP2_TIMER
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv6-M-RP2/compilers/GCC/chcoreasm.S
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* @brief ARMv6-M-RP2 port low level code.
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*
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* @addtogroup ARMv6_M_RP2_GCC_CORE
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* @addtogroup ARMV6M_RP2_GCC_CORE
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* @{
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*/
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@ -19,9 +19,9 @@
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/**
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* @file ARMv6-M-RP2/compilers/GCC/chtypes.h
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* @brief ARMv6-M port system types.
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* @brief ARMv6-M-RP2 port system types.
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*
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* @addtogroup ARMv6_M_RP2_GCC_CORE
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* @addtogroup ARMV6M_RP2_GCC_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv6-M/chcore.c
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* @brief ARMv6-M port code.
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*
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* @addtogroup ARMv6_M_CORE
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* @addtogroup ARMV6M_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv6-M/chcore.h
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* @brief ARMv6-M port macros and structures.
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*
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* @addtogroup ARMv6_M_CORE
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* @addtogroup ARMV6M_CORE
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* @{
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*/
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@ -18,10 +18,10 @@
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*/
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/**
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* @file chcore_timer.h
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* @file ARMv6-M/chcore_timer.h
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* @brief System timer header file.
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*
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* @addtogroup ARMv6_M_TIMER
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* @addtogroup ARMV6M_TIMER
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv6-M/compilers/GCC/chcoreasm.S
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* @brief ARMv6-M port low level code.
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*
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* @addtogroup ARMv6_M_GCC_CORE
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* @addtogroup ARMV6M_GCC_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv6-M/compilers/GCC/chtypes.h
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* @brief ARMv6-M port system types.
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*
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* @addtogroup ARMv6_M_GCC_CORE
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* @addtogroup ARMV6M_GCC_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv6-M/compilers/IAR/chcoreasm.s
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* @brief ARMv6-M port low level code.
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*
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* @addtogroup ARMv6_M_IAR_CORE
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* @addtogroup ARMV6M_IAR_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMCMx/compilers/IAR/chtypes.h
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* @brief ARM Cortex-Mx port system types.
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*
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* @addtogroup ARMCMx_IAR_CORE
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* @addtogroup ARMV6M_IAR_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv6-M/compilers/RVCT/chcoreasm.s
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* @brief ARMv6-M port low level code.
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*
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* @addtogroup ARMv6_M_RVCT_CORE
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* @addtogroup ARMV6M_RVCT_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMCMx/compilers/RVCT/chtypes.h
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* @brief ARM Cortex-Mx port system types.
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*
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* @addtogroup ARMCMx_RVCT_CORE
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* @addtogroup ARMV6M_RVCT_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv7-M/chcore.c
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* @brief ARMv7-M port code.
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*
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* @addtogroup ARMv7_M_CORE
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* @addtogroup ARMV7M_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv7-M/chcore.h
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* @brief ARMv7-M port macros and structures.
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*
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* @addtogroup ARMv7_M_CORE
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* @addtogroup ARMV7M_CORE
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* @{
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*/
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@ -21,7 +21,7 @@
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* @file ARMv7-M/chcore_timer.h
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* @brief System timer header file.
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*
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* @addtogroup ARMv7_M_TIMER
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* @addtogroup ARMV7M_TIMER
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* @{
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*/
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* @file ARMv7-M/compilers/GCC/chcoreasm.S
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* @brief ARMv7-M port low level code.
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*
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* @addtogroup ARMv7_M_GCC_CORE
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* @addtogroup ARMV7M_GCC_CORE
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* @{
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*/
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* @file ARMv7-M/compilers/GCC/chtypes.h
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* @brief ARMv7-M port system types.
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*
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* @addtogroup ARMv7_M_GCC_CORE
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* @addtogroup ARMV7M_GCC_CORE
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* @{
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*/
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* @file ARMv7-M/compilers/IAR/chcoreasm.s
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* @brief ARMv7-M port low level code.
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*
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* @addtogroup ARMv7_M_IAR_CORE
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* @addtogroup ARMV7M_IAR_CORE
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* @{
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*/
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@ -18,10 +18,10 @@
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*/
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/**
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* @file ARMCMx/compilers/IAR/chtypes.h
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* @brief ARM Cortex-Mx port system types.
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* @file ARMv7-M/compilers/IAR/chtypes.h
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* @brief ARMv7-M port system types.
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*
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* @addtogroup ARMv7_M_IAR_CORE
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* @addtogroup ARMV7M_IAR_CORE
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* @{
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*/
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* @file ARMv7-M/compilers/RVCT/chcoreasm.s
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* @brief ARMv7-M port low level code.
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*
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* @addtogroup ARMv7_M_RVCT_CORE
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* @addtogroup ARMV7M_RVCT_CORE
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* @{
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*/
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*/
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/**
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* @file ARMCMx/compilers/RVCT/chtypes.h
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* @brief ARM Cortex-Mx port system types.
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* @file ARMv7-M/compilers/RVCT/chtypes.h
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* @brief ARMv7-M port system types.
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*
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* @addtogroup ARMv7_M_RVCT_CORE
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* @addtogroup ARMV7M_RVCT_CORE
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* @{
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*/
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* @file ARMv7-M/mpu.h
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* @brief ARMv7-M MPU support macros and structures.
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*
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* @addtogroup ARMv7_M_MPU
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* @addtogroup ARMV7M_MPU
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* @{
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*/
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*/
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/**
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* @file ARMv8-M-ML/chcore.c
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* @brief ARMv8-M mainline port code.
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* @file ARMv8-M-ML-TZ/chcore.c
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* @brief ARMv8-M MainLine port code.
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*
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* @addtogroup ARMV8M_ML_CORE
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* @addtogroup ARMV8M_ML_TZ_CORE
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* @{
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*/
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*/
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/**
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* @file ARMv8-M-ML/chcore.h
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* @brief ARMv8-M mainline port macros and structures.
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* @file ARMv8-M-ML-TZ/chcore.h
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* @brief ARMv8-M MainLine port macros and structures.
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*
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* @addtogroup ARMV8M_ML_CORE
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* @addtogroup ARMV8M_ML_TZ_CORE
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* @{
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*/
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asm module.*/
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#if !defined(_FROM_ASM_)
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/**
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* @brief Type of stack and memory alignment enforcement.
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* @note In this architecture the stack alignment is enforced to 64 bits,
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* 32 bits alignment is supported by hardware but deprecated by ARM,
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* the implementation choice is to not offer the option.
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*/
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typedef uint64_t stkalign_t;
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/**
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* @brief Interrupt saved context.
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* @details This structure represents the stack frame saved during a
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@ -497,6 +489,11 @@ struct port_context {
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#define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) \
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(((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) <= CORTEX_PRIORITY_PENDSV))
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/**
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* @brief Optimized thread function declaration macro.
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*/
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#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg)
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/**
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* @brief Initialization of stack check part of thread context.
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*/
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|
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@ -21,7 +21,7 @@
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* @file ARMv8-M-ML/chcore_timer.h
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* @brief System timer header file.
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*
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* @addtogroup ARMV8M_ML_TIMER
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* @addtogroup ARMV8M_ML_TZ_TIMER
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* @{
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*/
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@ -18,10 +18,10 @@
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*/
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/**
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* @file ARMv8-M-ML/compilers/GCC/chtypes.h
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* @brief ARMv8-M mainline port system types.
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* @file ARMv8-M-ML-TZ/chtypes.h
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* @brief ARMv8-M MainLine port system types.
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*
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* @addtogroup ARMV8M_ML_CORE
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* @addtogroup ARMV8M_ML_TZ_CORE
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* @{
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include "ccportab.h"
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/**
|
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* @name Kernel types
|
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* @name Architecture data constraints
|
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*/
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#define PORT_ARCH_SIZEOF_DATA_PTR 4
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#define PORT_ARCH_SIZEOF_CODE_PTR 4
|
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#define PORT_ARCH_REGISTERS_WIDTH 32
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#define PORT_ARCH_REVERSE_ORDER 1
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/** @} */
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/**
|
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* @name Port types
|
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* @{
|
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*/
|
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typedef uint32_t rtcnt_t; /**< Realtime counter. */
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typedef uint64_t rttime_t; /**< Realtime accumulator. */
|
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typedef uint32_t syssts_t; /**< System status word. */
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typedef uint8_t tmode_t; /**< Thread flags. */
|
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typedef uint8_t tstate_t; /**< Thread state. */
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typedef uint8_t trefs_t; /**< Thread references counter. */
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typedef uint8_t tslices_t; /**< Thread time slices counter.*/
|
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typedef uint32_t tprio_t; /**< Thread priority. */
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typedef int32_t msg_t; /**< Inter-thread message. */
|
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typedef int32_t eventid_t; /**< Numeric event identifier. */
|
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typedef uint32_t eventmask_t; /**< Mask of event identifiers. */
|
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typedef uint32_t eventflags_t; /**< Mask of event flags. */
|
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typedef int32_t cnt_t; /**< Generic signed counter. */
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typedef uint32_t ucnt_t; /**< Generic unsigned counter. */
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/**
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* @brief Realtime counter.
|
||||
*/
|
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typedef uint32_t port_rtcnt_t;
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/**
|
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* @brief Realtime accumulator.
|
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*/
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typedef uint64_t port_rttime_t;
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/**
|
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* @brief System status word.
|
||||
*/
|
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typedef uint32_t port_syssts_t;
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|
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/**
|
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* @brief Type of stack and memory alignment enforcement.
|
||||
* @note In this architecture the stack alignment is enforced to 64 bits,
|
||||
* 32 bits alignment is supported by hardware but deprecated by ARM,
|
||||
* the implementation choice is to not offer the option.
|
||||
*/
|
||||
typedef uint64_t port_stkalign_t;
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/** @} */
|
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|
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/**
|
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* @brief This port does not define OS-related types.
|
||||
*/
|
||||
#define PORT_DOES_NOT_PROVIDE_TYPES
|
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||||
/**
|
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* @brief ROM constant modifier.
|
||||
* @note It is set to use the "const" keyword in this port.
|
||||
*/
|
||||
#define ROMCONST const
|
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#define ROMCONST CC_ROMCONST
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/**
|
||||
* @brief Makes functions not inlineable.
|
||||
* @note If the compiler does not support such attribute then some
|
||||
* time-dependent services could be degraded.
|
||||
*/
|
||||
#define NOINLINE __attribute__((noinline))
|
||||
|
||||
/**
|
||||
* @brief Optimized thread function declaration macro.
|
||||
*/
|
||||
#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg)
|
||||
|
||||
/**
|
||||
* @brief Packed variable specifier.
|
||||
*/
|
||||
#define PACKED_VAR __attribute__((packed))
|
||||
#define NOINLINE CC_NO_INLINE
|
||||
|
||||
/**
|
||||
* @brief Memory alignment enforcement for variables.
|
||||
*/
|
||||
#define ALIGNED_VAR(n) __attribute__((aligned(n)))
|
||||
#define ALIGNED_VAR(n) CC_ALIGN_DATA(n)
|
||||
|
||||
/**
|
||||
* @brief Size of a pointer.
|
||||
* @note To be used where the sizeof operator cannot be used, preprocessor
|
||||
* expressions for example.
|
||||
*/
|
||||
#define SIZEOF_PTR 4
|
||||
|
||||
/**
|
||||
* @brief True if alignment is low-high in current architecture.
|
||||
*/
|
||||
#define REVERSE_ORDER 1
|
||||
#define SIZEOF_PTR PORT_ARCH_SIZEOF_DATA_PTR
|
||||
|
||||
#endif /* CHTYPES_H */
|
||||
|
||||
|
|
|
@ -18,10 +18,10 @@
|
|||
*/
|
||||
|
||||
/**
|
||||
* @file compilers/GCC/chcoreasm_v7m.S
|
||||
* @brief ARMv7-M architecture port low level code.
|
||||
* @file ARMv8-M-ML-TZ/compilers/GCC/chcoreasm.S
|
||||
* @brief ARMv8-M MainLine architecture port low level code.
|
||||
*
|
||||
* @addtogroup ARMCMx_GCC_CORE
|
||||
* @addtogroup ARMV8M_ML_TZ_GCC_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -218,7 +218,7 @@ PendSV_Handler:
|
|||
beq.w port_delay_reschedule /* Tail call on far address.*/
|
||||
#endif
|
||||
/* Pointer to the current thread.*/
|
||||
ldr r0, =ch
|
||||
ldr r0, =ch0
|
||||
// movw r0, #:lower16:ch
|
||||
// movt r0, #:upper16:ch
|
||||
ldr r0, [r0, #CURRENT_OFFSET]
|
||||
|
|
|
@ -1,61 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file common/ARMCMx/mpu_v8m.h
|
||||
* @brief ARMv8-M MPU support macros and structures.
|
||||
*
|
||||
* @addtogroup COMMON_ARMV8M_MPU
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef MPU_ARMV8M_H
|
||||
#define MPU_ARMV8M_H
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* MPU_ARMV8M_H */
|
||||
|
||||
/** @} */
|
|
@ -21,7 +21,7 @@
|
|||
* @file ARMv8-M-ML/chcore.c
|
||||
* @brief ARMv8-M MainLine port code.
|
||||
*
|
||||
* @addtogroup ARMv8_M_ML_CORE
|
||||
* @addtogroup ARMV8M_ML_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
|
|
@ -21,7 +21,7 @@
|
|||
* @file ARMv8-M-ML/chcore.h
|
||||
* @brief ARMv8-M MainLine port macros and structures.
|
||||
*
|
||||
* @addtogroup ARMv8_M_ML_CORE
|
||||
* @addtogroup ARMV8M_ML_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -299,14 +299,6 @@
|
|||
asm module.*/
|
||||
#if !defined(_FROM_ASM_)
|
||||
|
||||
/**
|
||||
* @brief Type of stack and memory alignment enforcement.
|
||||
* @note In this architecture the stack alignment is enforced to 64 bits,
|
||||
* 32 bits alignment is supported by hardware but deprecated by ARM,
|
||||
* the implementation choice is to not offer the option.
|
||||
*/
|
||||
typedef uint64_t stkalign_t;
|
||||
|
||||
/**
|
||||
* @brief Interrupt saved context.
|
||||
* @details This structure represents the stack frame saved during a
|
||||
|
@ -410,6 +402,11 @@ struct port_context {
|
|||
#define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) \
|
||||
(((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
|
||||
|
||||
/**
|
||||
* @brief Optimized thread function declaration macro.
|
||||
*/
|
||||
#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg)
|
||||
|
||||
/**
|
||||
* @brief Initialization of stack check part of thread context.
|
||||
*/
|
||||
|
|
|
@ -18,10 +18,10 @@
|
|||
*/
|
||||
|
||||
/**
|
||||
* @file chcore_timer.h
|
||||
* @file ARMv8-M-ML/chcore_timer.h
|
||||
* @brief System timer header file.
|
||||
*
|
||||
* @addtogroup ARMv8_M_ML_TIMER
|
||||
* @addtogroup ARMV8M_ML_TIMER
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
|
|
@ -21,7 +21,7 @@
|
|||
* @file ARMv8-M-ML/compilers/GCC/chcoreasm.S
|
||||
* @brief ARMv8-M MainLine port low level code.
|
||||
*
|
||||
* @addtogroup ARMv8_M_ML_GCC_CORE
|
||||
* @addtogroup ARMV8M_ML_GCC_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
|
|
@ -19,9 +19,9 @@
|
|||
|
||||
/**
|
||||
* @file ARMv8-M-ML/compilers/GCC/chtypes.h
|
||||
* @brief ARMv8-M-ML port system types.
|
||||
* @brief ARMv8-M MainLine port system types.
|
||||
*
|
||||
* @addtogroup ARMv8_M_ML_GCC_CORE
|
||||
* @addtogroup ARMV8M_ML_GCC_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
|
Loading…
Reference in New Issue