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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4686 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2012-09-17 09:24:13 +00:00
parent 4e36eab1f1
commit f3d472965e
9 changed files with 137 additions and 76 deletions
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2
demos/PPC-SPC563M-GCC/.project
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@ -27,7 +27,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/GENERIC_SPC563</locationURI> <locationURI>CHIBIOS/boards/GENERIC_SPC563M</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

126
os/ports/GCC/PPC/SPC560Pxx/ivor.s
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@ -43,66 +43,76 @@
.section .handlers, "ax" .section .handlers, "ax"
/* /*
* IVOR10 handler (Book-E decrementer). * Fixed IVOR offset table.
*/ */
.align 4 .globl IVORS
.globl IVOR10 IVORS: b IVOR0
.align 16
b IVOR1
.align 16
b IVOR2
.align 16
b IVOR3
.align 16
b IVOR4
.align 16
b IVOR5
.align 16
b IVOR6
.align 16
b IVOR7
.align 16
b IVOR8
.align 16
b IVOR9
.align 16
b IVOR10
.align 16
b IVOR11
.align 16
b IVOR12
.align 16
b IVOR13
.align 16
b IVOR14
.align 16
b IVOR15
/*
* Unhandled exceptions handler.
*/
.weak IVOR0
IVOR0:
.weak IVOR1
IVOR1:
.weak IVOR2
IVOR2:
.weak IVOR3
IVOR3:
.weak IVOR5
IVOR5:
.weak IVOR6
IVOR6:
.weak IVOR7
IVOR7:
.weak IVOR8
IVOR8:
.weak IVOR9
IVOR9:
.weak IVOR10
IVOR10: IVOR10:
/* Creation of the external stack frame (extctx structure).*/ .weak IVOR11
stwu %sp, -80(%sp) /* Size of the extctx structure.*/ IVOR11:
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI .weak IVOR12
e_stmvsrrw 8(%sp) /* Saves PC, MSR. */ IVOR12:
e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */ .weak IVOR13
e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */ IVOR13:
#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ .weak IVOR14
stw %r0, 32(%sp) /* Saves GPR0. */ IVOR14:
mfSRR0 %r0 .weak IVOR15
stw %r0, 8(%sp) /* Saves PC. */ IVOR15:
mfSRR1 %r0 _unhandled_exception:
stw %r0, 12(%sp) /* Saves MSR. */ b _unhandled_exception
mfCR %r0
stw %r0, 16(%sp) /* Saves CR. */
mfLR %r0
stw %r0, 20(%sp) /* Saves LR. */
mfCTR %r0
stw %r0, 24(%sp) /* Saves CTR. */
mfXER %r0
stw %r0, 28(%sp) /* Saves XER. */
stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
stw %r4, 40(%sp)
stw %r5, 44(%sp)
stw %r6, 48(%sp)
stw %r7, 52(%sp)
stw %r8, 56(%sp)
stw %r9, 60(%sp)
stw %r10, 64(%sp)
stw %r11, 68(%sp)
stw %r12, 72(%sp)
#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
/* Reset DIE bit in TSR register.*/
lis %r3, 0x0800 /* DIS bit mask. */
mtspr 336, %r3 /* TSR register. */
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_enter_isr
bl dbg_check_lock_from_isr
#endif
bl chSysTimerHandlerI
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_unlock_from_isr
bl dbg_check_leave_isr
#endif
/* System tick handler invocation.*/
#if CH_DBG_SYSTEM_STATE_CHECK
bl dbg_check_lock
#endif
bl chSchIsPreemptionRequired
cmpli cr0, %r3, 0
beq cr0, .ctxrestore
bl chSchDoReschedule
b .ctxrestore
/* /*
* IVOR4 handler (Book-E external interrupt). * IVOR4 handler (Book-E external interrupt).

3
os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld
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@ -50,8 +50,9 @@ SECTIONS
__ivpr_base__ = .; __ivpr_base__ = .;
KEEP(*(.bam)) KEEP(*(.bam))
KEEP(*(.crt0)) KEEP(*(.crt0))
. = ALIGN(0x00000800);
KEEP(*(.handlers)) KEEP(*(.handlers))
. = ALIGN(0x800); . = ALIGN(0x00001000);
KEEP(*(.vectors)) KEEP(*(.vectors))
} > flash } > flash

10
os/ports/GCC/PPC/SPC560Pxx/port.mk
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@ -1,11 +1,11 @@
# List of the ChibiOS/RT SPC563Mxx port files. # List of the ChibiOS/RT SPC560Pxx port files.
PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c
PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/vectors.s \ PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC560Pxx/vectors.s \
${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/ivor.s \ ${CHIBIOS}/os/ports/GCC/PPC/SPC560Pxx/ivor.s \
${CHIBIOS}/os/ports/GCC/PPC/crt0.s ${CHIBIOS}/os/ports/GCC/PPC/crt0.s
PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \ PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \
${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx ${CHIBIOS}/os/ports/GCC/PPC/SPC560Pxx
PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/ld PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC560Pxx/ld

5
os/ports/GCC/PPC/SPC560Pxx/ppcparams.h
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@ -37,6 +37,11 @@
*/ */
#define PPC_VARIANT PPC_VARIANT_e200z0 #define PPC_VARIANT PPC_VARIANT_e200z0
/**
* @brief IVORx registers support.
*/
#define PPC_SUPPORTS_IVORS FALSE
/** /**
* @brief Book E instruction set support. * @brief Book E instruction set support.
*/ */

35
os/ports/GCC/PPC/SPC563Mxx/ivor.s
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@ -42,6 +42,41 @@
.section .handlers, "ax" .section .handlers, "ax"
/*
* Unhandled exceptions handler.
*/
.weak IVOR0
IVOR0:
.weak IVOR1
IVOR1:
.weak IVOR2
IVOR2:
.weak IVOR3
IVOR3:
.weak IVOR5
IVOR5:
.weak IVOR6
IVOR6:
.weak IVOR7
IVOR7:
.weak IVOR8
IVOR8:
.weak IVOR9
IVOR9:
.weak IVOR11
IVOR11:
.weak IVOR12
IVOR12:
.weak IVOR13
IVOR13:
.weak IVOR14
IVOR14:
.weak IVOR15
IVOR15:
.globl _unhandled_exception
_unhandled_exception:
b _unhandled_exception
/* /*
* IVOR10 handler (Book-E decrementer). * IVOR10 handler (Book-E decrementer).
*/ */

5
os/ports/GCC/PPC/SPC563Mxx/ppcparams.h
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@ -37,6 +37,11 @@
*/ */
#define PPC_VARIANT PPC_VARIANT_e200z3 #define PPC_VARIANT PPC_VARIANT_e200z3
/**
* @brief IVORx registers support.
*/
#define PPC_SUPPORTS_IVORS TRUE
/** /**
* @brief Book E instruction set support. * @brief Book E instruction set support.
*/ */

15
os/ports/GCC/PPC/chcore.c
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@ -28,6 +28,21 @@
#include "ch.h" #include "ch.h"
/**
* @brief Kernel port layer initialization.
* @details IVOR4 and IVOR10 initialization.
*/
void port_init(void) {
#if PPC_SUPPORTS_IVORS
/* The CPU support IVOR registers, the kernel requires IVOR4 and IVOR10
and the initialization is performed here.*/
asm volatile ("li %r3, IVOR4@l \t\n"
"mtIVOR4 %r3 \t\n"
"li %r3, IVOR10@l \t\n"
"mtIVOR10 %r3");
#endif
}
/** /**
* @brief Halts the system. * @brief Halts the system.
* @details This function is invoked by the operating system when an * @details This function is invoked by the operating system when an

12
os/ports/GCC/PPC/chcore.h
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@ -308,17 +308,6 @@ struct context {
*/ */
#define PORT_IRQ_HANDLER(id) void id(void) #define PORT_IRQ_HANDLER(id) void id(void)
/**
* @brief Kernel port layer initialization.
* @details IVPR4 and IVPR10 initialization, INTC_IACKR_PRC0 initialization.
*/
#define port_init() { \
asm volatile ("li %r3, IVOR4@l \t\n" \
"mtIVOR4 %r3 \t\n" \
"li %r3, IVOR10@l \t\n" \
"mtIVOR10 %r3"); \
}
/** /**
* @details Implemented as global interrupt disable. * @details Implemented as global interrupt disable.
*/ */
@ -372,6 +361,7 @@ struct context {
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
void port_init(void);
void port_halt(void); void port_halt(void);
void port_switch(Thread *ntp, Thread *otp); void port_switch(Thread *ntp, Thread *otp);
void _port_thread_start(void); void _port_thread_start(void);