mirror of https://github.com/rusefi/ChibiOS.git
Fixed bug #444.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6520 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -70,7 +70,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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@ -322,7 +322,8 @@ void adc_lld_init(void) {
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STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD |
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STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
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STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
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nvicEnableVector(ADC1_IRQn, CORTEX_PRIORITY_MASK(STM32_ADC_IRQ_PRIORITY));
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nvicEnableVector(ADC1_IRQn,
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CORTEX_PRIORITY_MASK(STM32_ADC_ADC1_IRQ_PRIORITY));
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#endif
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#if STM32_ADC_USE_SDADC1
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@ -89,6 +89,8 @@
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*****************************************************************************
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*** 2.7.0 ***
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- FIX: Fixed wrong definition in STM32F37x ADC driver (bug #444)(backported
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to 2.6.2).
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- FIX: Fixed lost incoming characters in STM32 USARTv1 driver (bug #442)
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(backported to 2.4.6 and 2.6.2).
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- FIX: Fixed UART4/5-related bugs in STM32 USARTv1 UART driver (bug #440)
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@ -71,7 +71,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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@ -70,7 +70,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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@ -70,7 +70,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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@ -70,7 +70,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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@ -70,7 +70,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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@ -70,7 +70,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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@ -70,7 +70,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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@ -70,7 +70,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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@ -70,7 +70,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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@ -70,7 +70,7 @@
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#define STM32_ADC_SDADC1_DMA_PRIORITY 2
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#define STM32_ADC_SDADC2_DMA_PRIORITY 2
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#define STM32_ADC_SDADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC1_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC2_IRQ_PRIORITY 5
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#define STM32_ADC_SDADC3_IRQ_PRIORITY 5
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