From f91dff51cc155f265a65417087f3402e99f6e5ae Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 9 May 2011 19:30:55 +0000 Subject: [PATCH] Added SDC status check to sdcWrite(); git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2945 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/include/sdc.h | 12 ++++++++++++ os/hal/platforms/STM32/sdc_lld.c | 12 ++++++++++-- os/hal/src/sdc.c | 12 ++++++++---- 3 files changed, 30 insertions(+), 6 deletions(-) diff --git a/os/hal/include/sdc.h b/os/hal/include/sdc.h index 56ee267e1..7c505a170 100644 --- a/os/hal/include/sdc.h +++ b/os/hal/include/sdc.h @@ -45,6 +45,7 @@ #define SDC_CMD_SEND_IF_COND 8 #define SDC_CMD_SEND_CSD 9 #define SDC_CMD_STOP_TRANSMISSION 12 +#define SDC_CMD_SEND_STATUS 13 #define SDC_CMD_SET_BLOCKLEN 16 #define SDC_CMD_READ_MULTIPLE_BLOCK 18 #define SDC_CMD_SET_BLOCK_COUNT 23 @@ -58,6 +59,17 @@ #define SDC_MODE_CARDTYPE_MMC 2 /**< Card is MMC compliant. */ #define SDC_MODE_HIGH_CAPACITY 0x10 /**< High capacity card. */ +#define SDC_STS(r1) (((r1) >> 9) & 15) +#define SDC_STS_IDLE 0 +#define SDC_STS_READY 1 +#define SDC_STS_IDENT 2 +#define SDC_STS_STBY 3 +#define SDC_STS_TRAN 4 +#define SDC_STS_DATA 5 +#define SDC_STS_RCV 6 +#define SDC_STS_PRG 7 +#define SDC_STS_DIS 8 + #define SDC_CMD8_PATTERN 0x000001AA #define SDC_ACMD41_RETRY 100 diff --git a/os/hal/platforms/STM32/sdc_lld.c b/os/hal/platforms/STM32/sdc_lld.c index 9b56591b7..a0d5965fc 100644 --- a/os/hal/platforms/STM32/sdc_lld.c +++ b/os/hal/platforms/STM32/sdc_lld.c @@ -399,7 +399,8 @@ error: */ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, const uint8_t *buf, uint32_t n) { - uint32_t resp[1]; + uint32_t sts, resp[1]; + bool_t err; /* Prepares the DMA channel for writing.*/ dmaChannelSetup(&STM32_DMA2->channels[STM32_DMA_CHANNEL_4], @@ -446,7 +447,14 @@ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, SDIO->DCTRL = 0; chSysUnlock(); - return sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, 0, resp); + err = sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, 0, resp); + do { + if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_SEND_STATUS,sdcp->rca, resp) || + (resp[0] & SDC_R1_ERROR_MASK)) + return TRUE; + sts = SDC_STS(resp[0]); + } while ((sts == SDC_STS_RCV) || (sts == SDC_STS_PRG)); + return err; error: dmaDisableChannel(STM32_DMA2, STM32_DMA_CHANNEL_4); SDIO->ICR = 0xFFFFFFFF; diff --git a/os/hal/src/sdc.c b/os/hal/src/sdc.c index 334caec0d..5e1bede8f 100644 --- a/os/hal/src/sdc.c +++ b/os/hal/src/sdc.c @@ -149,11 +149,13 @@ bool_t sdcConnect(SDCDriver *sdcp) { /* Voltage verification.*/ if (((resp[0] >> 8) & 0xF) != 1) goto failed; - if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_APP_CMD, 0, resp)) + if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_APP_CMD, 0, resp) || + (resp[0] & SDC_R1_ERROR_MASK)) goto failed; else { /* MMC or SD detection.*/ - if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_APP_CMD, 0, resp)) + if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_APP_CMD, 0, resp) || + (resp[0] & SDC_R1_ERROR_MASK)) sdcp->cardmode = SDC_MODE_CARDTYPE_MMC; else sdcp->cardmode = SDC_MODE_CARDTYPE_SDV11; @@ -172,7 +174,8 @@ bool_t sdcConnect(SDCDriver *sdcp) { i = 0; while (TRUE) { chThdSleepMilliseconds(10); - if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_APP_CMD, 0, resp)) + if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_APP_CMD, 0, resp) || + (resp[0] & SDC_R1_ERROR_MASK)) goto failed; if (sdc_lld_send_cmd_short(sdcp, SDC_CMD_APP_OP_COND, ocr, resp)) goto failed; @@ -207,7 +210,8 @@ bool_t sdcConnect(SDCDriver *sdcp) { /* Block length fixed at 512 bytes.*/ if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_SET_BLOCKLEN, - SDC_BLOCK_SIZE, resp)) + SDC_BLOCK_SIZE, resp) || + (resp[0] & SDC_R1_ERROR_MASK)) goto failed; /* Switches to wide bus mode.*/