diff --git a/os/hal/boards/ST_STM32H750XB_DISCOVERY/board.c b/os/hal/boards/ST_STM32H750XB_DISCOVERY/board.c
index f6efac671..52cd45afa 100644
--- a/os/hal/boards/ST_STM32H750XB_DISCOVERY/board.c
+++ b/os/hal/boards/ST_STM32H750XB_DISCOVERY/board.c
@@ -1,266 +1,266 @@
-/*
- ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * This file has been automatically generated using ChibiStudio board
- * generator plugin. Do not edit manually.
- */
-
-#include "hal.h"
-#include "stm32_gpio.h"
-
-/*===========================================================================*/
-/* Driver local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local variables and types. */
-/*===========================================================================*/
-
-/**
- * @brief Type of STM32 GPIO port setup.
- */
-typedef struct {
- uint32_t moder;
- uint32_t otyper;
- uint32_t ospeedr;
- uint32_t pupdr;
- uint32_t odr;
- uint32_t afrl;
- uint32_t afrh;
-} gpio_setup_t;
-
-/**
- * @brief Type of STM32 GPIO initialization data.
- */
-typedef struct {
-#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
- gpio_setup_t PAData;
-#endif
-#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
- gpio_setup_t PBData;
-#endif
-#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
- gpio_setup_t PCData;
-#endif
-#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
- gpio_setup_t PDData;
-#endif
-#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
- gpio_setup_t PEData;
-#endif
-#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
- gpio_setup_t PFData;
-#endif
-#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
- gpio_setup_t PGData;
-#endif
-#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
- gpio_setup_t PHData;
-#endif
-#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
- gpio_setup_t PIData;
-#endif
-#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
- gpio_setup_t PJData;
-#endif
-#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
- gpio_setup_t PKData;
-#endif
-} gpio_config_t;
-
-/**
- * @brief STM32 GPIO static initialization data.
- */
-static const gpio_config_t gpio_default_config = {
-#if STM32_HAS_GPIOA
- {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
- VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
- {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
- VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
- {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
- VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
- {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
- VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
- {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
- VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
- {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
- VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
- {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
- VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
- {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
- VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
- {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
- VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
-#endif
-#if STM32_HAS_GPIOJ
- {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
- VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
-#endif
-#if STM32_HAS_GPIOK
- {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
- VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
-#endif
-};
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
-
- gpiop->OTYPER = config->otyper;
- gpiop->OSPEEDR = config->ospeedr;
- gpiop->PUPDR = config->pupdr;
- gpiop->ODR = config->odr;
- gpiop->AFRL = config->afrl;
- gpiop->AFRH = config->afrh;
- gpiop->MODER = config->moder;
-}
-
-static void stm32_gpio_init(void) {
-
- /* Enabling GPIO-related clocks, the mask comes from the
- registry header file.*/
- __rccResetAHB4(STM32_GPIO_EN_MASK);
- rccEnableAHB4(STM32_GPIO_EN_MASK, true);
-
- /* Initializing all the defined GPIO ports.*/
-#if STM32_HAS_GPIOA
- gpio_init(GPIOA, &gpio_default_config.PAData);
-#endif
-#if STM32_HAS_GPIOB
- gpio_init(GPIOB, &gpio_default_config.PBData);
-#endif
-#if STM32_HAS_GPIOC
- gpio_init(GPIOC, &gpio_default_config.PCData);
-#endif
-#if STM32_HAS_GPIOD
- gpio_init(GPIOD, &gpio_default_config.PDData);
-#endif
-#if STM32_HAS_GPIOE
- gpio_init(GPIOE, &gpio_default_config.PEData);
-#endif
-#if STM32_HAS_GPIOF
- gpio_init(GPIOF, &gpio_default_config.PFData);
-#endif
-#if STM32_HAS_GPIOG
- gpio_init(GPIOG, &gpio_default_config.PGData);
-#endif
-#if STM32_HAS_GPIOH
- gpio_init(GPIOH, &gpio_default_config.PHData);
-#endif
-#if STM32_HAS_GPIOI
- gpio_init(GPIOI, &gpio_default_config.PIData);
-#endif
-#if STM32_HAS_GPIOJ
- gpio_init(GPIOJ, &gpio_default_config.PJData);
-#endif
-#if STM32_HAS_GPIOK
- gpio_init(GPIOK, &gpio_default_config.PKData);
-#endif
-}
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Early initialization code.
- * @details GPIO ports and system clocks are initialized before everything
- * else.
- */
-void __early_init(void) {
-
- stm32_gpio_init();
- stm32_clock_init();
-}
-
-#if HAL_USE_SDC || defined(__DOXYGEN__)
-/**
- * @brief SDC card detection.
- */
-bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
-
- (void)sdcp;
- /* CHTODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief SDC card write protection detection.
- */
-bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
-
- (void)sdcp;
- /* CHTODO: Fill the implementation.*/
- return false;
-}
-#endif /* HAL_USE_SDC */
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
- (void)mmcp;
- /* CHTODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
- (void)mmcp;
- /* CHTODO: Fill the implementation.*/
- return false;
-}
-#endif
-
-/**
- * @brief Board-specific initialization code.
- * @note You can add your board-specific code here.
- */
-void boardInit(void) {
-
-}
+/*
+ ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * This file has been automatically generated using ChibiStudio board
+ * generator plugin. Do not edit manually.
+ */
+
+#include "hal.h"
+#include "stm32_gpio.h"
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types. */
+/*===========================================================================*/
+
+/**
+ * @brief Type of STM32 GPIO port setup.
+ */
+typedef struct {
+ uint32_t moder;
+ uint32_t otyper;
+ uint32_t ospeedr;
+ uint32_t pupdr;
+ uint32_t odr;
+ uint32_t afrl;
+ uint32_t afrh;
+} gpio_setup_t;
+
+/**
+ * @brief Type of STM32 GPIO initialization data.
+ */
+typedef struct {
+#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
+ gpio_setup_t PAData;
+#endif
+#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
+ gpio_setup_t PBData;
+#endif
+#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
+ gpio_setup_t PCData;
+#endif
+#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
+ gpio_setup_t PDData;
+#endif
+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
+ gpio_setup_t PEData;
+#endif
+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
+ gpio_setup_t PFData;
+#endif
+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
+ gpio_setup_t PGData;
+#endif
+#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
+ gpio_setup_t PHData;
+#endif
+#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
+ gpio_setup_t PIData;
+#endif
+#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
+ gpio_setup_t PJData;
+#endif
+#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
+ gpio_setup_t PKData;
+#endif
+} gpio_config_t;
+
+/**
+ * @brief STM32 GPIO static initialization data.
+ */
+static const gpio_config_t gpio_default_config = {
+#if STM32_HAS_GPIOA
+ {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
+ VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
+#endif
+#if STM32_HAS_GPIOB
+ {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
+ VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
+#endif
+#if STM32_HAS_GPIOC
+ {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
+ VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
+#endif
+#if STM32_HAS_GPIOD
+ {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
+ VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
+#endif
+#if STM32_HAS_GPIOE
+ {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
+ VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
+#endif
+#if STM32_HAS_GPIOF
+ {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
+ VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
+#endif
+#if STM32_HAS_GPIOG
+ {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
+ VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
+#endif
+#if STM32_HAS_GPIOH
+ {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
+ VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
+#endif
+#if STM32_HAS_GPIOI
+ {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
+ VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
+#endif
+#if STM32_HAS_GPIOJ
+ {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
+ VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
+#endif
+#if STM32_HAS_GPIOK
+ {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
+ VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
+#endif
+};
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
+
+ gpiop->OTYPER = config->otyper;
+ gpiop->OSPEEDR = config->ospeedr;
+ gpiop->PUPDR = config->pupdr;
+ gpiop->ODR = config->odr;
+ gpiop->AFRL = config->afrl;
+ gpiop->AFRH = config->afrh;
+ gpiop->MODER = config->moder;
+}
+
+static void stm32_gpio_init(void) {
+
+ /* Enabling GPIO-related clocks, the mask comes from the
+ registry header file.*/
+ rccResetAHB4(STM32_GPIO_EN_MASK);
+ rccEnableAHB4(STM32_GPIO_EN_MASK, true);
+
+ /* Initializing all the defined GPIO ports.*/
+#if STM32_HAS_GPIOA
+ gpio_init(GPIOA, &gpio_default_config.PAData);
+#endif
+#if STM32_HAS_GPIOB
+ gpio_init(GPIOB, &gpio_default_config.PBData);
+#endif
+#if STM32_HAS_GPIOC
+ gpio_init(GPIOC, &gpio_default_config.PCData);
+#endif
+#if STM32_HAS_GPIOD
+ gpio_init(GPIOD, &gpio_default_config.PDData);
+#endif
+#if STM32_HAS_GPIOE
+ gpio_init(GPIOE, &gpio_default_config.PEData);
+#endif
+#if STM32_HAS_GPIOF
+ gpio_init(GPIOF, &gpio_default_config.PFData);
+#endif
+#if STM32_HAS_GPIOG
+ gpio_init(GPIOG, &gpio_default_config.PGData);
+#endif
+#if STM32_HAS_GPIOH
+ gpio_init(GPIOH, &gpio_default_config.PHData);
+#endif
+#if STM32_HAS_GPIOI
+ gpio_init(GPIOI, &gpio_default_config.PIData);
+#endif
+#if STM32_HAS_GPIOJ
+ gpio_init(GPIOJ, &gpio_default_config.PJData);
+#endif
+#if STM32_HAS_GPIOK
+ gpio_init(GPIOK, &gpio_default_config.PKData);
+#endif
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Early initialization code.
+ * @details GPIO ports and system clocks are initialized before everything
+ * else.
+ */
+void __early_init(void) {
+
+ stm32_gpio_init();
+ stm32_clock_init();
+}
+
+#if HAL_USE_SDC || defined(__DOXYGEN__)
+/**
+ * @brief SDC card detection.
+ */
+bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
+
+ (void)sdcp;
+ /* CHTODO: Fill the implementation.*/
+ return true;
+}
+
+/**
+ * @brief SDC card write protection detection.
+ */
+bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
+
+ (void)sdcp;
+ /* CHTODO: Fill the implementation.*/
+ return false;
+}
+#endif /* HAL_USE_SDC */
+
+#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
+/**
+ * @brief MMC_SPI card detection.
+ */
+bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
+
+ (void)mmcp;
+ /* CHTODO: Fill the implementation.*/
+ return true;
+}
+
+/**
+ * @brief MMC_SPI card write protection detection.
+ */
+bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
+
+ (void)mmcp;
+ /* CHTODO: Fill the implementation.*/
+ return false;
+}
+#endif
+
+/**
+ * @brief Board-specific initialization code.
+ * @note You can add your board-specific code here.
+ */
+void boardInit(void) {
+
+}
diff --git a/os/hal/boards/ST_STM32H750XB_DISCOVERY/board.h b/os/hal/boards/ST_STM32H750XB_DISCOVERY/board.h
index 50b599eb3..0eb831bb6 100644
--- a/os/hal/boards/ST_STM32H750XB_DISCOVERY/board.h
+++ b/os/hal/boards/ST_STM32H750XB_DISCOVERY/board.h
@@ -83,7 +83,7 @@
#define GPIOB_MII_RXD2 0U
#define GPIOB_MII_RXD3 1U
-#define GPIOB_MII_RX_ER 2U
+#define GPIOB_MII_TX_ER_NINT 2U
#define GPIOB_SWO 3U
#define GPIOB_PIN4 4U
#define GPIOB_FDCAN2_RX 5U
@@ -266,7 +266,7 @@
#define LINE_T_JTDI PAL_LINE(GPIOA, 15U)
#define LINE_MII_RXD2 PAL_LINE(GPIOB, 0U)
#define LINE_MII_RXD3 PAL_LINE(GPIOB, 1U)
-#define LINE_MII_RX_ER PAL_LINE(GPIOB, 2U)
+#define LINE_MII_TX_ER_NINT PAL_LINE(GPIOB, 2U)
#define LINE_SWO PAL_LINE(GPIOB, 3U)
#define LINE_FDCAN2_RX PAL_LINE(GPIOB, 5U)
#define LINE_SDIO1_D4 PAL_LINE(GPIOB, 8U)
@@ -551,7 +551,7 @@
*
* PB0 - MII_RXD2 (alternate 11).
* PB1 - MII_RXD3 (alternate 11).
- * PB2 - MII_RX_ER (alternate 11).
+ * PB2 - MII_TX_ER_NINT (alternate 11).
* PB3 - SWO (alternate 0).
* PB4 - PIN4 (input floating).
* PB5 - FDCAN2_RX (input floating).
@@ -568,7 +568,7 @@
*/
#define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(GPIOB_MII_RXD2) | \
PIN_MODE_ALTERNATE(GPIOB_MII_RXD3) | \
- PIN_MODE_ALTERNATE(GPIOB_MII_RX_ER) | \
+ PIN_MODE_ALTERNATE(GPIOB_MII_TX_ER_NINT) |\
PIN_MODE_ALTERNATE(GPIOB_SWO) | \
PIN_MODE_INPUT(GPIOB_PIN4) | \
PIN_MODE_INPUT(GPIOB_FDCAN2_RX) | \
@@ -584,7 +584,7 @@
PIN_MODE_INPUT(GPIOB_PIN15))
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_MII_RXD2) | \
PIN_OTYPE_PUSHPULL(GPIOB_MII_RXD3) | \
- PIN_OTYPE_PUSHPULL(GPIOB_MII_RX_ER) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_MII_TX_ER_NINT) |\
PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOB_FDCAN2_RX) | \
@@ -600,7 +600,7 @@
PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_MII_RXD2) | \
PIN_OSPEED_HIGH(GPIOB_MII_RXD3) | \
- PIN_OSPEED_HIGH(GPIOB_MII_RX_ER) | \
+ PIN_OSPEED_HIGH(GPIOB_MII_TX_ER_NINT) |\
PIN_OSPEED_HIGH(GPIOB_SWO) | \
PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
PIN_OSPEED_HIGH(GPIOB_FDCAN2_RX) | \
@@ -616,7 +616,7 @@
PIN_OSPEED_VERYLOW(GPIOB_PIN15))
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_MII_RXD2) | \
PIN_PUPDR_FLOATING(GPIOB_MII_RXD3) | \
- PIN_PUPDR_FLOATING(GPIOB_MII_RX_ER) | \
+ PIN_PUPDR_FLOATING(GPIOB_MII_TX_ER_NINT) |\
PIN_PUPDR_PULLUP(GPIOB_SWO) | \
PIN_PUPDR_FLOATING(GPIOB_PIN4) | \
PIN_PUPDR_FLOATING(GPIOB_FDCAN2_RX) | \
@@ -632,7 +632,7 @@
PIN_PUPDR_FLOATING(GPIOB_PIN15))
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_MII_RXD2) | \
PIN_ODR_HIGH(GPIOB_MII_RXD3) | \
- PIN_ODR_HIGH(GPIOB_MII_RX_ER) | \
+ PIN_ODR_HIGH(GPIOB_MII_TX_ER_NINT) | \
PIN_ODR_HIGH(GPIOB_SWO) | \
PIN_ODR_HIGH(GPIOB_PIN4) | \
PIN_ODR_HIGH(GPIOB_FDCAN2_RX) | \
@@ -648,7 +648,7 @@
PIN_ODR_HIGH(GPIOB_PIN15))
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_MII_RXD2, 11U) | \
PIN_AFIO_AF(GPIOB_MII_RXD3, 11U) | \
- PIN_AFIO_AF(GPIOB_MII_RX_ER, 11U) | \
+ PIN_AFIO_AF(GPIOB_MII_TX_ER_NINT, 11U) |\
PIN_AFIO_AF(GPIOB_SWO, 0U) | \
PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
PIN_AFIO_AF(GPIOB_FDCAN2_RX, 9U) | \
diff --git a/os/hal/boards/ST_STM32H750XB_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32H750XB_DISCOVERY/cfg/board.chcfg
index adafddec7..ad320200f 100644
--- a/os/hal/boards/ST_STM32H750XB_DISCOVERY/cfg/board.chcfg
+++ b/os/hal/boards/ST_STM32H750XB_DISCOVERY/cfg/board.chcfg
@@ -173,7 +173,7 @@
Mode="Alternate"
Alternate="11" />
+ Alternate="0" >