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Added support for extra DMA channels in STM32F072. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7997 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio 2015-05-30 10:42:39 +00:00
parent b648630b93
commit ffac18dcd1
4 changed files with 46 additions and 8 deletions
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2
os/hal/ports/STM32/LLD/DMAv1/stm32_dma.h
View File

@ -178,7 +178,7 @@
#if !defined(STM32_DMA_STREAMS)
#error "missing STM32_DMA_STREAMS definition in registry"
#error
#endif
#if !defined(STM32_DMA_RELOCATION)
#error "missing STM32_DMA_RELOCATION definition in registry"

24
os/hal/ports/STM32/STM32F0xx/stm32_dma.c
View File

@ -70,7 +70,11 @@ const stm32_dma_stream_t _stm32_dma_streams[STM32_DMA_STREAMS] = {
{DMA1_Channel2, &DMA1->IFCR, 4, 1, DMA1_Channel2_3_IRQn},
{DMA1_Channel3, &DMA1->IFCR, 8, 2, DMA1_Channel2_3_IRQn},
{DMA1_Channel4, &DMA1->IFCR, 12, 3, DMA1_Channel4_5_IRQn},
{DMA1_Channel5, &DMA1->IFCR, 16, 4, DMA1_Channel4_5_IRQn}
{DMA1_Channel5, &DMA1->IFCR, 16, 4, DMA1_Channel4_5_IRQn},
#if STM32_DMA_STREAMS > 5
{DMA1_Channel6, &DMA1->IFCR, 20, 5, DMA1_Channel4_5_6_7_IRQn},
{DMA1_Channel7, &DMA1->IFCR, 24, 6, DMA1_Channel4_5_6_7_IRQn},
#endif
};
/*===========================================================================*/
@ -176,6 +180,24 @@ OSAL_IRQ_HANDLER(Vector6C) {
dma_isr_redir[4].dma_func(dma_isr_redir[4].dma_param, flags);
}
#if STM32_DMA_STREAMS > 5
/* Check on channel 5.*/
flags = (DMA1->ISR >> 20) & STM32_DMA_ISR_MASK;
if (flags & STM32_DMA_ISR_MASK) {
DMA1->IFCR = flags << 20;
if (dma_isr_redir[5].dma_func)
dma_isr_redir[5].dma_func(dma_isr_redir[5].dma_param, flags);
}
/* Check on channel 6.*/
flags = (DMA1->ISR >> 24) & STM32_DMA_ISR_MASK;
if (flags & STM32_DMA_ISR_MASK) {
DMA1->IFCR = flags << 24;
if (dma_isr_redir[7].dma_func)
dma_isr_redir[7].dma_func(dma_isr_redir[7].dma_param, flags);
}
#endif
OSAL_IRQ_EPILOGUE();
}

22
os/hal/ports/STM32/STM32F0xx/stm32_dma.h
View File

@ -32,12 +32,6 @@
/* Driver constants. */
/*===========================================================================*/
/**
* @brief Total number of DMA streams.
* @note This is the total number of streams among all the DMA units.
*/
#define STM32_DMA_STREAMS 5
/**
* @brief Mask of the ISR bits passed to the DMA callback functions.
*/
@ -113,6 +107,10 @@
#define STM32_DMA1_STREAM3 STM32_DMA_STREAM(2)
#define STM32_DMA1_STREAM4 STM32_DMA_STREAM(3)
#define STM32_DMA1_STREAM5 STM32_DMA_STREAM(4)
#if (STM32_DMA_STREAMS > 5) || defined(__DOXYGEN__)
#define STM32_DMA1_STREAM6 STM32_DMA_STREAM(5)
#define STM32_DMA1_STREAM7 STM32_DMA_STREAM(6)
#endif
/** @} */
/**
@ -172,6 +170,18 @@
/* Derived constants and error checks. */
/*===========================================================================*/
#if !defined(STM32_ADVANCED_DMA)
#error "missing STM32_ADVANCED_DMA definition in registry"
#endif
#if !defined(STM32_DMA_STREAMS)
#error "missing STM32_DMA_STREAMS definition in registry"
#endif
#if STM32_ADVANCED_DMA == TRUE
#error "DMAv1 driver does not support STM32_ADVANCED_DMA"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/

6
os/hal/ports/STM32/STM32F0xx/stm32_registry.h
View File

@ -65,6 +65,7 @@
#define STM32_ADVANCED_DMA FALSE
#define STM32_HAS_DMA1 TRUE
#define STM32_HAS_DMA2 FALSE
#define STM32_DMA_STREAMS 5
/* ETH attributes.*/
#define STM32_HAS_ETH FALSE
@ -219,6 +220,7 @@
#define STM32_ADVANCED_DMA FALSE
#define STM32_HAS_DMA1 TRUE
#define STM32_HAS_DMA2 FALSE
#define STM32_DMA_STREAMS 7
/* ETH attributes.*/
#define STM32_HAS_ETH FALSE
@ -380,6 +382,7 @@
#define STM32_ADVANCED_DMA FALSE
#define STM32_HAS_DMA1 TRUE
#define STM32_HAS_DMA2 FALSE
#define STM32_DMA_STREAMS 5
/* ETH attributes.*/
#define STM32_HAS_ETH FALSE
@ -522,6 +525,7 @@
#define STM32_ADVANCED_DMA FALSE
#define STM32_HAS_DMA1 TRUE
#define STM32_HAS_DMA2 FALSE
#define STM32_DMA_STREAMS 5
/* ETH attributes.*/
#define STM32_HAS_ETH FALSE
@ -662,6 +666,7 @@
#define STM32_ADVANCED_DMA FALSE
#define STM32_HAS_DMA1 TRUE
#define STM32_HAS_DMA2 FALSE
#define STM32_DMA_STREAMS 5
/* ETH attributes.*/
#define STM32_HAS_ETH FALSE
@ -799,6 +804,7 @@
#define STM32_ADVANCED_DMA FALSE
#define STM32_HAS_DMA1 TRUE
#define STM32_HAS_DMA2 FALSE
#define STM32_DMA_STREAMS 5
/* ETH attributes.*/
#define STM32_HAS_ETH FALSE