From ffc86d58d804f021ac728e1e1b4b14c5862a02e6 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Thu, 8 Dec 2022 15:02:07 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15866 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- demos/STM32/RT-STM32WL55JC-NUCLEO64/cfg/mcuconf.h | 4 ++-- os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h | 6 ++++-- os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h | 6 ++++-- testhal/STM32/multi/ADC/cfg/stm32wl55jc_nucleo64/mcuconf.h | 4 ++-- testhal/STM32/multi/DAC/cfg/stm32wl55jc_nucleo64/mcuconf.h | 4 ++-- .../STM32/multi/EFL-MFS/cfg/stm32wl55jc_nucleo64/mcuconf.h | 4 ++-- testhal/STM32/multi/PAL/cfg/stm32wl55jc_nucleo64/mcuconf.h | 4 ++-- testhal/STM32/multi/TRNG/cfg/stm32wl55jc_nucleo64/mcuconf.h | 4 ++-- testhal/STM32/multi/UART/cfg/stm32wl55jc_nucleo64/mcuconf.h | 4 ++-- testrt/IRQ_STORM/cfg/stm32wl55jc_nucleo64/mcuconf.h | 4 ++-- testrt/VT_STORM/cfg/stm32wl55jc_nucleo64/mcuconf.h | 4 ++-- testrt/VT_STORM/cfg/stm32wl55jc_nucleo64_v2/mcuconf.h | 4 ++-- 12 files changed, 28 insertions(+), 24 deletions(-) diff --git a/demos/STM32/RT-STM32WL55JC-NUCLEO64/cfg/mcuconf.h b/demos/STM32/RT-STM32WL55JC-NUCLEO64/cfg/mcuconf.h index ff2ce04e4..89ad99be0 100644 --- a/demos/STM32/RT-STM32WL55JC-NUCLEO64/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32WL55JC-NUCLEO64/cfg/mcuconf.h @@ -53,7 +53,7 @@ #define STM32_LSI_ENABLED FALSE #define STM32_LSIPRE STM32_LSIPRE_NODIV #define STM32_HSE32_ENABLED TRUE -#define STM32_HSE32SRC TRUE +#define STM32_HSE32SRC STM32_HSE32_XTAL #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M @@ -128,7 +128,7 @@ */ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_CFGR2 ADC_CFGR2_CKMODE_ADCCLK -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h b/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h index ce097dffd..a012e8449 100644 --- a/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h +++ b/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h @@ -1660,8 +1660,10 @@ /** * @brief PLL1 DIVP field. */ -#if ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \ - ((STM32_PLL1_DIVP_VALUE & 1) == 0)) || defined(__DOXYGEN__) +#if (STM32_PLL1_DIVP_VALUE == 1) || \ + ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \ + ((STM32_PLL1_DIVP_VALUE & 1) == 0)) || \ + defined(__DOXYGEN__) #define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos) #else #error "invalid STM32_PLL1_DIVP_VALUE value specified" diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h b/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h index 959e42018..4f9af0469 100644 --- a/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h +++ b/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h @@ -1725,8 +1725,10 @@ /** * @brief PLL1 DIVP field. */ -#if ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \ - ((STM32_PLL1_DIVP_VALUE & 1) == 0)) || defined(__DOXYGEN__) +#if (STM32_PLL1_DIVP_VALUE == 1) || \ + ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \ + ((STM32_PLL1_DIVP_VALUE & 1) == 0)) || \ + defined(__DOXYGEN__) #define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos) #else #error "invalid STM32_PLL1_DIVP_VALUE value specified" diff --git a/testhal/STM32/multi/ADC/cfg/stm32wl55jc_nucleo64/mcuconf.h b/testhal/STM32/multi/ADC/cfg/stm32wl55jc_nucleo64/mcuconf.h index 78821d69d..af4c405c3 100644 --- a/testhal/STM32/multi/ADC/cfg/stm32wl55jc_nucleo64/mcuconf.h +++ b/testhal/STM32/multi/ADC/cfg/stm32wl55jc_nucleo64/mcuconf.h @@ -53,7 +53,7 @@ #define STM32_LSI_ENABLED FALSE #define STM32_LSIPRE STM32_LSIPRE_NODIV #define STM32_HSE32_ENABLED TRUE -#define STM32_HSE32SRC TRUE +#define STM32_HSE32SRC STM32_HSE32_XTAL #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M @@ -128,7 +128,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_CFGR2 ADC_CFGR2_CKMODE_ADCCLK -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testhal/STM32/multi/DAC/cfg/stm32wl55jc_nucleo64/mcuconf.h b/testhal/STM32/multi/DAC/cfg/stm32wl55jc_nucleo64/mcuconf.h index c44c44c5e..74e92f749 100644 --- a/testhal/STM32/multi/DAC/cfg/stm32wl55jc_nucleo64/mcuconf.h +++ b/testhal/STM32/multi/DAC/cfg/stm32wl55jc_nucleo64/mcuconf.h @@ -53,7 +53,7 @@ #define STM32_LSI_ENABLED FALSE #define STM32_LSIPRE STM32_LSIPRE_NODIV #define STM32_HSE32_ENABLED TRUE -#define STM32_HSE32SRC TRUE +#define STM32_HSE32SRC STM32_HSE32_XTAL #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M @@ -128,7 +128,7 @@ */ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_CFGR2 ADC_CFGR2_CKMODE_ADCCLK -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testhal/STM32/multi/EFL-MFS/cfg/stm32wl55jc_nucleo64/mcuconf.h b/testhal/STM32/multi/EFL-MFS/cfg/stm32wl55jc_nucleo64/mcuconf.h index ff2ce04e4..89ad99be0 100644 --- a/testhal/STM32/multi/EFL-MFS/cfg/stm32wl55jc_nucleo64/mcuconf.h +++ b/testhal/STM32/multi/EFL-MFS/cfg/stm32wl55jc_nucleo64/mcuconf.h @@ -53,7 +53,7 @@ #define STM32_LSI_ENABLED FALSE #define STM32_LSIPRE STM32_LSIPRE_NODIV #define STM32_HSE32_ENABLED TRUE -#define STM32_HSE32SRC TRUE +#define STM32_HSE32SRC STM32_HSE32_XTAL #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M @@ -128,7 +128,7 @@ */ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_CFGR2 ADC_CFGR2_CKMODE_ADCCLK -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testhal/STM32/multi/PAL/cfg/stm32wl55jc_nucleo64/mcuconf.h b/testhal/STM32/multi/PAL/cfg/stm32wl55jc_nucleo64/mcuconf.h index ad3344e40..58fd708f9 100644 --- a/testhal/STM32/multi/PAL/cfg/stm32wl55jc_nucleo64/mcuconf.h +++ b/testhal/STM32/multi/PAL/cfg/stm32wl55jc_nucleo64/mcuconf.h @@ -53,7 +53,7 @@ #define STM32_LSI_ENABLED FALSE #define STM32_LSIPRE STM32_LSIPRE_NODIV #define STM32_HSE32_ENABLED TRUE -#define STM32_HSE32SRC TRUE +#define STM32_HSE32SRC STM32_HSE32_XTAL #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M @@ -128,7 +128,7 @@ */ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_CFGR2 ADC_CFGR2_CKMODE_ADCCLK -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testhal/STM32/multi/TRNG/cfg/stm32wl55jc_nucleo64/mcuconf.h b/testhal/STM32/multi/TRNG/cfg/stm32wl55jc_nucleo64/mcuconf.h index 9c5f605d3..1c24d8e20 100644 --- a/testhal/STM32/multi/TRNG/cfg/stm32wl55jc_nucleo64/mcuconf.h +++ b/testhal/STM32/multi/TRNG/cfg/stm32wl55jc_nucleo64/mcuconf.h @@ -53,7 +53,7 @@ #define STM32_LSI_ENABLED FALSE #define STM32_LSIPRE STM32_LSIPRE_NODIV #define STM32_HSE32_ENABLED TRUE -#define STM32_HSE32SRC TRUE +#define STM32_HSE32SRC STM32_HSE32_XTAL #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M @@ -128,7 +128,7 @@ */ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_CFGR2 ADC_CFGR2_CKMODE_ADCCLK -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testhal/STM32/multi/UART/cfg/stm32wl55jc_nucleo64/mcuconf.h b/testhal/STM32/multi/UART/cfg/stm32wl55jc_nucleo64/mcuconf.h index f63c425b4..cf509fdc9 100644 --- a/testhal/STM32/multi/UART/cfg/stm32wl55jc_nucleo64/mcuconf.h +++ b/testhal/STM32/multi/UART/cfg/stm32wl55jc_nucleo64/mcuconf.h @@ -53,7 +53,7 @@ #define STM32_LSI_ENABLED FALSE #define STM32_LSIPRE STM32_LSIPRE_NODIV #define STM32_HSE32_ENABLED TRUE -#define STM32_HSE32SRC TRUE +#define STM32_HSE32SRC STM32_HSE32_XTAL #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M @@ -128,7 +128,7 @@ */ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_CFGR2 ADC_CFGR2_CKMODE_ADCCLK -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testrt/IRQ_STORM/cfg/stm32wl55jc_nucleo64/mcuconf.h b/testrt/IRQ_STORM/cfg/stm32wl55jc_nucleo64/mcuconf.h index 2a8b8d416..3d263683e 100644 --- a/testrt/IRQ_STORM/cfg/stm32wl55jc_nucleo64/mcuconf.h +++ b/testrt/IRQ_STORM/cfg/stm32wl55jc_nucleo64/mcuconf.h @@ -53,7 +53,7 @@ #define STM32_LSI_ENABLED FALSE #define STM32_LSIPRE STM32_LSIPRE_NODIV #define STM32_HSE32_ENABLED TRUE -#define STM32_HSE32SRC TRUE +#define STM32_HSE32SRC STM32_HSE32_XTAL #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M @@ -128,7 +128,7 @@ */ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_CFGR2 ADC_CFGR2_CKMODE_ADCCLK -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testrt/VT_STORM/cfg/stm32wl55jc_nucleo64/mcuconf.h b/testrt/VT_STORM/cfg/stm32wl55jc_nucleo64/mcuconf.h index 6162110a2..254fb255e 100644 --- a/testrt/VT_STORM/cfg/stm32wl55jc_nucleo64/mcuconf.h +++ b/testrt/VT_STORM/cfg/stm32wl55jc_nucleo64/mcuconf.h @@ -53,7 +53,7 @@ #define STM32_LSI_ENABLED FALSE #define STM32_LSIPRE STM32_LSIPRE_NODIV #define STM32_HSE32_ENABLED TRUE -#define STM32_HSE32SRC TRUE +#define STM32_HSE32SRC STM32_HSE32_XTAL #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M @@ -128,7 +128,7 @@ */ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_CFGR2 ADC_CFGR2_CKMODE_ADCCLK -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY diff --git a/testrt/VT_STORM/cfg/stm32wl55jc_nucleo64_v2/mcuconf.h b/testrt/VT_STORM/cfg/stm32wl55jc_nucleo64_v2/mcuconf.h index 6162110a2..254fb255e 100644 --- a/testrt/VT_STORM/cfg/stm32wl55jc_nucleo64_v2/mcuconf.h +++ b/testrt/VT_STORM/cfg/stm32wl55jc_nucleo64_v2/mcuconf.h @@ -53,7 +53,7 @@ #define STM32_LSI_ENABLED FALSE #define STM32_LSIPRE STM32_LSIPRE_NODIV #define STM32_HSE32_ENABLED TRUE -#define STM32_HSE32SRC TRUE +#define STM32_HSE32SRC STM32_HSE32_XTAL #define STM32_LSE_ENABLED TRUE #define STM32_MSIPLL_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M @@ -128,7 +128,7 @@ */ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_CFGR2 ADC_CFGR2_CKMODE_ADCCLK -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY