mirror of https://github.com/rusefi/ChibiOS.git
199 lines
6.4 KiB
C
199 lines
6.4 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file templates/hal_lld.c
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* @brief HAL Driver subsystem low level driver source template.
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*
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* @addtogroup HAL
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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#define SAM_PM_UNLOCK(addr) \
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PM->PM_UNLOCK = BPM_UNLOCK_KEY(0xAAu) | \
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BPM_UNLOCK_ADDR((uint32_t)(addr) - (uint32_t)PM)
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#define SAM_SCIF_UNLOCK(addr) \
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SCIF->SCIF_UNLOCK = SCIF_UNLOCK_KEY(0xAAu) | \
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SCIF_UNLOCK_ADDR((uint32_t)(addr) - (uint32_t)SCIF)
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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void sam_set_optimal_flash_mode(void) {
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if (SAM_PMCON_PS == SAM_PMCON_PS0) {
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/* Scalability Level 0.*/
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if (SAM_CPU_CLK > SAM_FLASH0WS_MAX) {
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/* One wait state required.*/
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if (SAM_CPU_CLK <= SAM_FLASH1WS_MAX) {
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/* Fast read mode disabled.*/
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}
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else {
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/* Fast read mode enabled.*/
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}
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}
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else {
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/* No wait state required.*/
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}
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}
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else {
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/* Scalability Level 1.*/
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if (SAM_CPU_CLK > SAM_FLASH0WS_MAX) {
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}
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else {
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}
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}
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Enables a module on one of the PBx buses.
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* @note PB bridges are assumed to be already enabled.
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*
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* @param[in] bus_id id of the bus
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* @param[in] module module address
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*/
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void sam_enable_module(uint32_t bus_id, uint32_t module) {
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uint32_t mask;
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mask = *(&PM->PM_CPUMASK + bus_id);
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mask |= 1U << module;
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SAM_PM_UNLOCK((uint32_t)&PM->PM_CPUMASK + (4 * bus_id));
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*(&PM->PM_CPUMASK + bus_id) |= mask;
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}
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/**
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* @brief Disables a module on one of the PBx buses.
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* @note PB bridges are assumed to be already enabled.
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*
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* @param[in] bus_id id of the bus
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* @param[in] module module index
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*/
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void sam_disable_module(uint32_t bus_id, uint32_t module) {
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uint32_t mask;
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mask = *(&PM->PM_CPUMASK + bus_id);
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mask &= ~(1U << module);
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SAM_PM_UNLOCK((uint32_t)&PM->PM_CPUMASK + (4 * bus_id));
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*(&PM->PM_CPUMASK + bus_id) = mask;
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}
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/**
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* @brief Clock initialization.
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*/
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void sam_clock_init(void) {
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#if SAM_NO_INIT
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/* Enables bridges.*/
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sam_enable_module(SAM_CLK_GRP_HSB, SAM_HSB_PBA_BRIDGE);
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sam_enable_module(SAM_CLK_GRP_HSB, SAM_HSB_PBB_BRIDGE);
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sam_enable_module(SAM_CLK_GRP_HSB, SAM_HSB_PBC_BRIDGE);
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sam_enable_module(SAM_CLK_GRP_HSB, SAM_HSB_PBD_BRIDGE);
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#if SAM_USE_PICOCACHE
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/* Enable the PicoCache.*/
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sam_enable_module(SAM_CLK_GRP_PBB, SAM_PBB_HRAMC1_DATA);
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sam_enable_module(SAM_CLK_GRP_PBB, SAM_PBB_HRAMC1_REGS);
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HCACHE->HCACHE_CTRL = HCACHE_CTRL_CEN_YES;
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while ((HCACHE->HCACHE_SR & HCACHE_SR_CSTS_EN) == 0)
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;
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#endif
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/* Setting up prescalers.*/
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SAM_PM_UNLOCK(&PM->PM_CPUSEL);
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PM->PM_CPUSEL = SAM_CPUSEL;
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SAM_PM_UNLOCK(&PM->PM_PBASEL);
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PM->PM_PBASEL = SAM_PBASEL;
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SAM_PM_UNLOCK(&PM->PM_PBBSEL);
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PM->PM_PBBSEL = SAM_PBBSEL;
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SAM_PM_UNLOCK(&PM->PM_PBCSEL);
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PM->PM_PBCSEL = SAM_PBCSEL;
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SAM_PM_UNLOCK(&PM->PM_PBDSEL);
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PM->PM_PBDSEL = SAM_PBDSEL;
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/* Switching to the selected clock source, enabling it if necessary.*/
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#if SAM_MCCTRL_MCSEL == SAM_MCSEL_RCSYS
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/* Nothing to do, already running from SYSIRC.*/
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#endif
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#if SAM_MCCTRL_MCSEL == SAM_MCSEL_OSC0
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SAM_SCIF_UNLOCK(&SCIF->SCIF_OSCCTRL0);
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SCIF->SCIF_OSCCTRL0 = SAM_OSCCTRL_GAIN | SAM_OSCCTRL_MODE |
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SAM_OSCCTRL_STARTUP | SAM_OSCCTRL_OSCEN;
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while (!(SCIF->SCIF_PCLKSR & SCIF_PCLKSR_OSC0RDY))
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;
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sam_set_optimal_flash_mode();
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#endif /* SAM_MCCTRL_MCSEL == SAM_MCSEL_RCSYS */
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#if SAM_MCCTRL_MCSEL == SAM_MCSEL_PLL
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#endif /* SAM_MCCTRL_MCSEL == SAM_MCSEL_PLL */
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#if SAM_MCCTRL_MCSEL == SAM_MCSEL_DFLL
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#endif /* SAM_MCCTRL_MCSEL == SAM_MCSEL_DFLL */
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#if SAM_MCCTRL_MCSEL == SAM_MCSEL_RC80M
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#endif /* SAM_MCCTRL_MCSEL == SAM_MCSEL_RC80M */
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#if SAM_MCCTRL_MCSEL == SAM_MCSEL_RCFAST
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#endif /* SAM_MCCTRL_MCSEL == SAM_MCSEL_RCFAST */
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#if SAM_MCCTRL_MCSEL == SAM_MCSEL_RC1M
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#endif /* SAM_MCCTRL_MCSEL == SAM_MCSEL_RC1M */
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#endif /* SAM_NO_INIT */
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}
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/**
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* @brief Low level HAL driver initialization.
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*
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* @notapi
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*/
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void hal_lld_init(void) {
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}
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/** @} */
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