mirror of https://github.com/rusefi/ChibiOS.git
612 lines
19 KiB
C
612 lines
19 KiB
C
/*
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* Licensed under ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file eTimer_v1/icu_lld.h
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* @brief SPC5xx low level ICU driver header.
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*
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* @addtogroup ICU
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* @{
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*/
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#ifndef _ICU_LLD_H_
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#define _ICU_LLD_H_
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#if HAL_USE_ICU || defined(__DOXYGEN__)
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#include "spc5_etimer.h"
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name Mode options
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* @{
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*/
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/**
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* @brief Skip first capture cycle.
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* @details If set to @p TRUE the first capture cycle is skipped.
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* @note The default is @p FALSE.
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*/
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#if !defined(ICU_JUMP_FIRST_CAPTURE) || defined(__DOXYGEN__)
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#define ICU_SKIP_FIRST_CAPTURE FALSE
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#endif
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#define SPC5_ETIMER_IP_BUS_CLOCK_DIVIDE_BY_1 0x18
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#define SPC5_ETIMER_IP_BUS_CLOCK_DIVIDE_BY_2 0x19
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#define SPC5_ETIMER_IP_BUS_CLOCK_DIVIDE_BY_4 0x1A
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#define SPC5_ETIMER_IP_BUS_CLOCK_DIVIDE_BY_8 0x1B
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#define SPC5_ETIMER_IP_BUS_CLOCK_DIVIDE_BY_16 0x1C
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#define SPC5_ETIMER_IP_BUS_CLOCK_DIVIDE_BY_32 0x1D
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#define SPC5_ETIMER_IP_BUS_CLOCK_DIVIDE_BY_64 0x1E
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#define SPC5_ETIMER_IP_BUS_CLOCK_DIVIDE_BY_128 0x1F
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#define SPC5_ETIMER_COUNTER_0_INPUT_PIN 0U
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#define SPC5_ETIMER_COUNTER_1_INPUT_PIN 1U
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#define SPC5_ETIMER_COUNTER_2_INPUT_PIN 2U
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#define SPC5_ETIMER_COUNTER_3_INPUT_PIN 3U
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#define SPC5_ETIMER_COUNTER_4_INPUT_PIN 4U
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#define SPC5_ETIMER_COUNTER_5_INPUT_PIN 5U
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#define SPC5_ETIMER_CNTMODE_NO_OPERATION 0U
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#define SPC5_ETIMER_CNTMODE_RE 1U
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#define SPC5_ETIMER_CNTMODE_RFE 2U
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#define SPC5_ETIMER_CNTMODE_RFE_SIHA 3U
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#define SPC5_ETIMER_CNTMODE_QUADRATURE 4U
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#define SPC5_ETIMER_CNTMODE_RE_SSSD 5U
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#define SPC5_ETIMER_CNTMODE_ESS_TRIGGER 6U
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#define SPC5_ETIMER_CNTMODE_CASCADE 7U
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#define SPC5_ETIMER_CPT1MODE_DISABLED 0U
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#define SPC5_ETIMER_CPT1MODE_FALLING_EDGE 1U
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#define SPC5_ETIMER_CPT1MODE_RISING_EDGE 2U
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#define SPC5_ETIMER_CPT1MODE_ANY_EDGE 3U
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#define SPC5_ETIMER_CPT2MODE_DISABLED 0U
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#define SPC5_ETIMER_CPT2MODE_FALLING_EDGE 1U
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#define SPC5_ETIMER_CPT2MODE_RISING_EDGE 2U
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#define SPC5_ETIMER_CPT2MODE_ANY_EDGE 3U
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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#if SPC5_HAS_ETIMER0
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/**
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* @brief ICUD1 driver enable switch.
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* @details If set to @p TRUE the support for ICUD1 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD0) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD0 FALSE
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#endif
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/**
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* @brief ICUD2 driver enable switch.
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* @details If set to @p TRUE the support for ICUD2 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD1) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD1 FALSE
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#endif
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/**
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* @brief ICUD3 driver enable switch.
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* @details If set to @p TRUE the support for ICUD3 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD2) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD2 FALSE
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#endif
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/**
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* @brief ICUD4 driver enable switch.
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* @details If set to @p TRUE the support for ICUD4 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD3) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD3 FALSE
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#endif
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/**
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* @brief ICUD5 driver enable switch.
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* @details If set to @p TRUE the support for ICUD5 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD4) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD4 FALSE
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#endif
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/**
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* @brief ICUD6 driver enable switch.
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* @details If set to @p TRUE the support for ICUD6 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD5) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD5 FALSE
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#endif
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/**
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* @brief eTimer0 interrupt priority level setting.
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*/
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#if !defined(SPC5_ICU_ETIMER0_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_ICU_ETIMER0_PRIORITY 7
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#endif
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/**
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* @brief eTIMER0 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_ICU_ETIMER0_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief eTIMER0 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_ICU_ETIMER0_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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#endif
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#if SPC5_HAS_ETIMER1
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/**
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* @brief ICUD6 driver enable switch.
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* @details If set to @p TRUE the support for ICUD6 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD6) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD6 FALSE
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#endif
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/**
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* @brief ICUD7 driver enable switch.
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* @details If set to @p TRUE the support for ICUD7 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD7) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD7 FALSE
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#endif
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/**
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* @brief ICUD8 driver enable switch.
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* @details If set to @p TRUE the support for ICUD8 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD8) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD8 FALSE
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#endif
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/**
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* @brief ICUD9 driver enable switch.
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* @details If set to @p TRUE the support for ICUD9 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD9) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD9 FALSE
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#endif
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/**
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* @brief ICUD10 driver enable switch.
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* @details If set to @p TRUE the support for ICUD10 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD10) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD10 FALSE
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#endif
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/**
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* @brief ICUD11 driver enable switch.
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* @details If set to @p TRUE the support for ICUD11 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD11) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD11 FALSE
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#endif
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/**
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* @brief eTimer1 interrupt priority level setting.
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*/
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#if !defined(SPC5_ICU_ETIMER1_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_ICU_ETIMER1_PRIORITY 7
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#endif
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/**
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* @brief eTIMER1 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_ICU_ETIMER1_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_ICU_ETIMER1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief eTIMER1 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_ICU_ETIMER1_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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#endif
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#if SPC5_HAS_ETIMER2
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/**
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* @brief ICUD13 driver enable switch.
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* @details If set to @p TRUE the support for ICUD13 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD12) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD12 FALSE
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#endif
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/**
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* @brief ICUD14 driver enable switch.
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* @details If set to @p TRUE the support for ICUD14 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD13) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD13 FALSE
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#endif
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/**
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* @brief ICUD15 driver enable switch.
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* @details If set to @p TRUE the support for ICUD15 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD14) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD14 FALSE
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#endif
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/**
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* @brief ICUD16 driver enable switch.
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* @details If set to @p TRUE the support for ICUD16 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD15) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD15 FALSE
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#endif
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/**
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* @brief ICUD17 driver enable switch.
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* @details If set to @p TRUE the support for ICUD17 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD16) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD16 FALSE
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#endif
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/**
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* @brief ICUD18 driver enable switch.
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* @details If set to @p TRUE the support for ICUD18 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(SPC5_ICU_USE_SMOD17) || defined(__DOXYGEN__)
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#define SPC5_ICU_USE_SMOD17 FALSE
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#endif
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/**
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* @brief eTimer2 interrupt priority level setting.
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*/
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#if !defined(SPC5_ICU_ETIMER2_PRIORITY) || defined(__DOXYGEN__)
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#define SPC5_ICU_ETIMER2_PRIORITY 7
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#endif
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/**
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* @brief eTIMER2 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_ICU_ETIMER2_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_ICU_ETIMER2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief eTIMER2 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_ICU_ETIMER2_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_ICU_ETIMER2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if !SPC5_HAS_ETIMER0
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#error "ETIMER0 not present in the selected device"
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#endif
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#if !SPC5_HAS_ETIMER1
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#error "ETIMER1 not present in the selected device"
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#endif
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#if !SPC5_HAS_ETIMER2
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#error "ETIMER2 not present in the selected device"
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#endif
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#define SPC5_ICU_USE_ETIMER0 (SPC5_ICU_USE_SMOD6 || \
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SPC5_ICU_USE_SMOD7 || \
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SPC5_ICU_USE_SMOD8 || \
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SPC5_ICU_USE_SMOD9 || \
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SPC5_ICU_USE_SMOD10 || \
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SPC5_ICU_USE_SMOD11)
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#define SPC5_ICU_USE_ETIMER1 (SPC5_ICU_USE_SMOD12 || \
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SPC5_ICU_USE_SMOD13 || \
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SPC5_ICU_USE_SMOD14 || \
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SPC5_ICU_USE_SMOD15 || \
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SPC5_ICU_USE_SMOD16 || \
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SPC5_ICU_USE_SMOD17)
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#define SPC5_ICU_USE_ETIMER2 (SPC5_ICU_USE_SMOD18 || \
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SPC5_ICU_USE_SMOD19 || \
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SPC5_ICU_USE_SMOD20 || \
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SPC5_ICU_USE_SMOD21 || \
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SPC5_ICU_USE_SMOD22 || \
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SPC5_ICU_USE_SMOD23)
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#if !SPC5_ICU_USE_TIMER0 && !SPC5_ICU_USE_TIMER1 && !SPC5_ICU_USE_TIMER2
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#error "ICU driver activated but no SMOD peripheral assigned"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief ICU driver mode.
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*/
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typedef enum {
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ICU_INPUT_ACTIVE_HIGH = 0, /**< Trigger on rising edge. */
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ICU_INPUT_ACTIVE_LOW = 1, /**< Trigger on falling edge. */
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}icumode_t;
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/**
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* @brief ICU frequency type.
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*/
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typedef uint32_t icufreq_t;
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/**
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* @brief ICU channel.
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*/
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typedef enum {
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ICU_CHANNEL_1 = 0, /**< Use SMODxCH1. */
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ICU_CHANNEL_2 = 1, /**< Use SMODxCH2. */
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ICU_CHANNEL_3 = 2, /**< Use SMODxCH3. */
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ICU_CHANNEL_4 = 3, /**< Use SMODxCH4. */
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ICU_CHANNEL_5 = 4, /**< Use SMODxCH5. */
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ICU_CHANNEL_6 = 5, /**< Use SMODxCH6. */
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}icuchannel_t;
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/**
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* @brief ICU counter type.
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*/
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typedef uint16_t icucnt_t;
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/**
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* @brief Driver configuration structure.
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* @note It could be empty on some architectures.
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*/
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typedef struct {
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/**
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* @brief Driver mode.
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*/
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icumode_t mode;
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/**
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* @brief Timer clock in Hz.
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* @note The low level can use assertions in order to catch invalid
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* frequency specifications.
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*/
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icufreq_t frequency;
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/**
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* @brief Callback for pulse width measurement.
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*/
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icucallback_t width_cb;
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/**
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* @brief Callback for cycle period measurement.
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*/
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icucallback_t period_cb;
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/**
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* @brief Callback for timer overflow.
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*/
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icucallback_t overflow_cb;
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/**
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* @brief eTimer input channel to be used.
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*/
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icuchannel_t channel;
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/* End of the mandatory fields.*/
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}ICUConfig;
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/**
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* @brief Structure representing an ICU driver.
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*/
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struct ICUDriver {
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/**
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* @brief Driver state.
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*/
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icustate_t state;
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/**
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* @brief eTimer submodule number.
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*/
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uint8_t smod_number;
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/**
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* @brief Current configuration data.
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*/
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const ICUConfig *config;
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/**
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* @brief Timer base clock.
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*/
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uint32_t clock;
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the eTimerx registers block.
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*/
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volatile struct spc5_etimer *etimerp;
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/**
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|
* @brief CCR register used for width capture.
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|
*/
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volatile vuint16_t *wccrp;
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/**
|
|
* @brief CCR register used for period capture.
|
|
*/
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|
volatile vuint16_t *pccrp;
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|
};
|
|
|
|
/*===========================================================================*/
|
|
/* Driver macros. */
|
|
/*===========================================================================*/
|
|
|
|
/**
|
|
* @brief Returns the width of the latest pulse.
|
|
* @details The pulse width is defined as number of ticks between the start
|
|
* edge and the stop edge.
|
|
*
|
|
* @param[in] icup pointer to the @p ICUDriver object
|
|
* @return The number of ticks.
|
|
*
|
|
* @notapi
|
|
*/
|
|
#define icu_lld_get_width(icup) (*((icup)->wccrp) + 1)
|
|
|
|
/**
|
|
* @brief Returns the width of the latest cycle.
|
|
* @details The cycle width is defined as number of ticks between a start
|
|
* edge and the next start edge.
|
|
*
|
|
* @param[in] icup pointer to the @p ICUDriver object
|
|
* @return The number of ticks.
|
|
*
|
|
* @notapi
|
|
*/
|
|
#define icu_lld_get_period(icup) (*((icup)->pccrp) + 1)
|
|
|
|
/*===========================================================================*/
|
|
/* External declarations. */
|
|
/*===========================================================================*/
|
|
|
|
#if SPC5_ICU_USE_SMOD0 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD1;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD1 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD2;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD2 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD3;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD3 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD4;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD4 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD5;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD5 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD6;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD6 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD7;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD7 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD8;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD8 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD9;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD9 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD10;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD10 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD11;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD11 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD12;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD12 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD13;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD13 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD14;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD14 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD15;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD15 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD16;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD16 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD17;
|
|
#endif
|
|
|
|
#if SPC5_ICU_USE_SMOD17 && !defined(__DOXYGEN__)
|
|
extern ICUDriver ICUD18;
|
|
#endif
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
void icu_lld_init(void);
|
|
void icu_lld_start(ICUDriver *icup);
|
|
void icu_lld_stop(ICUDriver *icup);
|
|
void icu_lld_enable(ICUDriver *icup);
|
|
void icu_lld_disable(ICUDriver *icup);
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* HAL_USE_ICU */
|
|
|
|
#endif /* _ICU_LLD_H_ */
|
|
|
|
/** @} */
|