mirror of https://github.com/rusefi/ChibiOS.git
304 lines
9.0 KiB
C
304 lines
9.0 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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This file has been contributed by:
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Andrew Hannam aka inmarket.
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*/
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/**
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* @file AT91SAM7/adc_lld.h
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* @brief AT91SAM7 ADC subsystem low level driver header.
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*
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* @addtogroup ADC
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* @{
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*/
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#ifndef _ADC_LLD_H_
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#define _ADC_LLD_H_
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#if HAL_USE_ADC || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name Trigger Sources
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* @{
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*/
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#define ADC_TRIGGER_SOFTWARE 0x8000 /**< @brief Software Triggering - Can be combined with another value */
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#define ADC_TRIGGER_TIMER 0x0001 /**< @brief TIO Timer Counter Channel */
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#define ADC_TRIGGER_EXTERNAL 0x0002 /**< @brief External Trigger */
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief ADC1 driver enable switch.
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* @details If set to @p TRUE the support for ADC1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(ADC_USE_ADC1) || defined(__DOXYGEN__)
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#define ADC_USE_ADC1 TRUE
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#endif
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/**
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* @brief ADC1 Timer to use when a periodic conversion is requested.
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* @details Should be set to 0..2
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* @note The default is 0
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*/
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#if !defined(AT91_ADC1_TIMER) || defined(__DOXYGEN__)
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#define AT91_ADC1_TIMER 0
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#endif
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/**
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* @brief ADC1 Resolution.
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* @details Either 8 or 10 bits
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* @note The default is 10 bits.
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*/
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#if !defined(AT91_ADC1_RESOLUTION) || defined(__DOXYGEN__)
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#define AT91_ADC1_RESOLUTION 10
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#endif
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/**
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* @brief ADC1 Clock
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* @details Maximum is 5MHz for 10bit or 8MHz for 8bit
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* @note The default is calculated from AT91_ADC1_RESOLUTION to give the fastest possible ADCClock
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*/
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#if !defined(AT91_ADC1_CLOCK) || defined(__DOXYGEN__)
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#if AT91_ADC1_RESOLUTION == 8
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#define AT91_ADC1_CLOCK 8000000
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#else
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#define AT91_ADC1_CLOCK 5000000
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#endif
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#endif
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/**
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* @brief ADC1 Sample and Hold Time
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* @details SHTM = RoundUp(ADCClock * SampleHoldTime). Range = RoundUp(ADCClock / 1,666,666) to 15
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* @note Default corresponds to the minimum sample and hold time (600nS from the datasheet)
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* @note Increasing the Sample Hold Time increases the ADC input impedance
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*/
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#if !defined(AT91_ADC1_SHTM) || defined(__DOXYGEN__)
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#define AT91_ADC1_SHTM 0
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#endif
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#if AT91_ADC1_SHTM < ((AT91_ADC1_CLOCK+1666665)/1666666)
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#undef AT91_ADC1_SHTM
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#define AT91_ADC1_SHTM ((AT91_ADC1_CLOCK+1666665)/1666666)
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#endif
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#if AT91_ADC1_SHTM > 15
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#undef AT91_ADC1_SHTM
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#define AT91_ADC1_SHTM 15
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#endif
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/**
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* @brief ADC interrupt priority level setting.
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*/
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#if !defined(AT91_ADC_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define AT91_ADC_IRQ_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if !defined(AT91_DMA_REQUIRED)
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#define AT91_DMA_REQUIRED
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief ADC sample data type.
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*/
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#if AT91_ADC1_RESOLUTION == AT91C_ADC_LOWRES_8_BIT
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typedef uint8_t adcsample_t;
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#else
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typedef uint16_t adcsample_t;
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#endif
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/**
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* @brief Channels number in a conversion group.
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*/
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typedef uint16_t adc_channels_num_t;
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/**
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* @brief Possible ADC failure causes.
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* @note Error codes are architecture dependent and should not relied
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* upon.
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*/
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typedef enum {
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ADC_ERR_OVERFLOW = 0, /**< ADC overflow condition. Something is not working fast enough. */
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} adcerror_t;
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/**
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* @brief Type of a structure representing an ADC driver.
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*/
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typedef struct ADCDriver ADCDriver;
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/**
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* @brief ADC notification callback type.
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*
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* @param[in] adcp pointer to the @p ADCDriver object triggering the
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* callback
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* @param[in] buffer pointer to the most recent samples data
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* @param[in] n number of buffer rows available starting from @p buffer
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*/
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typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n);
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/**
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* @brief ADC error callback type.
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*
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* @param[in] adcp pointer to the @p ADCDriver object triggering the
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* callback
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* @param[in] err ADC error code
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*/
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typedef void (*adcerrorcallback_t)(ADCDriver *adcp, adcerror_t err);
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/**
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* @brief Conversion group configuration structure.
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* @details This implementation-dependent structure describes a conversion
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* operation.
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* @note The use of this configuration structure requires knowledge of
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* STM32 ADC cell registers interface, please refer to the STM32
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* reference manual for details.
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*/
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typedef struct {
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/**
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* @brief Enables the circular buffer mode for the group.
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*/
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bool_t circular;
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/**
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* @brief Number of the analog channels belonging to the conversion group.
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*/
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adc_channels_num_t num_channels;
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/**
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* @brief Callback function associated to the group or @p NULL.
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*/
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adccallback_t end_cb;
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/**
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* @brief Error callback or @p NULL.
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*/
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adcerrorcallback_t error_cb;
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/* End of the mandatory fields.*/
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/**
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* @brief Select the ADC Channels to read.
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* @details The number of bits at logic level one in this register must
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* be equal to the number in the @p num_channels field.
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*/
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uint16_t channelselects;
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/**
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* @brief Select how to trigger the conversion.
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*/
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uint16_t trigger;
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/**
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* @brief When in ADC_TRIGGER_TIMER trigger mode - what frequency?
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*/
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uint32_t frequency;
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} ADCConversionGroup;
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/**
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* @brief Driver configuration structure.
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* @note It could be empty on some architectures.
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*/
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typedef struct {
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} ADCConfig;
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/**
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* @brief Structure representing an ADC driver.
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*/
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struct ADCDriver {
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/**
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* @brief Driver state.
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*/
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adcstate_t state;
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/**
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* @brief Current configuration data.
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*/
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const ADCConfig *config;
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/**
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* @brief Current samples buffer pointer or @p NULL.
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*/
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adcsample_t *samples;
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/**
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* @brief Current samples buffer depth or @p 0.
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*/
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size_t depth;
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/**
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* @brief Current conversion group pointer or @p NULL.
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*/
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const ADCConversionGroup *grpp;
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#if ADC_USE_WAIT || defined(__DOXYGEN__)
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/**
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* @brief Waiting thread.
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*/
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Thread *thread;
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#endif
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#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
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#if CH_USE_MUTEXES || defined(__DOXYGEN__)
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/**
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* @brief Mutex protecting the peripheral.
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*/
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Mutex mutex;
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#elif CH_USE_SEMAPHORES
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Semaphore semaphore;
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#endif
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#endif /* ADC_USE_MUTUAL_EXCLUSION */
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#if defined(ADC_DRIVER_EXT_FIELDS)
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ADC_DRIVER_EXT_FIELDS
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#endif
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/* End of the mandatory fields.*/
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if ADC_USE_ADC1 && !defined(__DOXYGEN__)
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extern ADCDriver ADCD1;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void adc_lld_init(void);
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void adc_lld_start(ADCDriver *adcp);
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void adc_lld_stop(ADCDriver *adcp);
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void adc_lld_start_conversion(ADCDriver *adcp);
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void adc_lld_stop_conversion(ADCDriver *adcp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_ADC */
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#endif /* _ADC_LLD_H_ */
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/** @} */
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