mirror of https://github.com/rusefi/ChibiOS.git
219 lines
9.5 KiB
Plaintext
219 lines
9.5 KiB
Plaintext
GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 1
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1 # 1 "../../os/ports/GCC/ARM7/crt0.s"
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2 # 1 "<built-in>"
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1 /*
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0
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0
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2 ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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3
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4 This file is part of ChibiOS/RT.
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5
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6 ChibiOS/RT is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 3 of the License, or
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9 (at your option) any later version.
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10
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11 ChibiOS/RT is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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15
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16 You should have received a copy of the GNU General Public License
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17 along with this program. If not, see <http://www.gnu.org/licenses/>.
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18 */
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19
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20 /**
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21 * @file ports/ARM7/crt0.s
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22 * @brief Generic ARM7 startup file for ChibiOS/RT.
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23 * @addtogroup ARM7_CORE
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24 * @{
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25 */
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26 /** @cond never */
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27
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28 .set MODE_USR, 0x10
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29 .set MODE_FIQ, 0x11
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30 .set MODE_IRQ, 0x12
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31 .set MODE_SVC, 0x13
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32 .set MODE_ABT, 0x17
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33 .set MODE_UND, 0x1B
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34 .set MODE_SYS, 0x1F
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35
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36 .equ I_BIT, 0x80
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37 .equ F_BIT, 0x40
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38
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39 .text
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40 .code 32
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41 .balign 4
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42
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43 /*
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44 * Reset handler.
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45 */
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46 .global ResetHandler
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47 ResetHandler:
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48 /*
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49 * Stack pointers initialization.
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50 */
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51 ldr r0, =__ram_end__
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52 /* Undefined */
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53 msr CPSR_c, #MODE_UND | I_BIT | F_BIT
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GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 2
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54 ???? 1040 0000 mov sp, r0
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55 ldr r1, =__und_stack_size__
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56 ???? 0080 sub r0, r0, r1
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57 /* Abort */
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58 msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
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59 ???? 1040 0000 mov sp, r0
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60 ldr r1, =__abt_stack_size__
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61 ???? 0080 sub r0, r0, r1
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62 /* FIQ */
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63 msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
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64 ???? 1040 0000 mov sp, r0
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65 ldr r1, =__fiq_stack_size__
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66 ???? 0080 sub r0, r0, r1
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67 /* IRQ */
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68 msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
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69 ???? 1040 0000 mov sp, r0
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70 ldr r1, =__irq_stack_size__
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71 ???? 0080 sub r0, r0, r1
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72 /* Supervisor */
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73 msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
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74 ???? 1040 0000 mov sp, r0
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75 ldr r1, =__svc_stack_size__
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76 ???? 0080 sub r0, r0, r1
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77 /* System */
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78 msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
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79 ???? 1040 0000 mov sp, r0
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80 // ldr r1, =__sys_stack_size__
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81 // sub r0, r0, r1
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82 /*
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83 * Early initialization.
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84 */
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85 #ifndef THUMB_NO_INTERWORKING
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86 bl hwinit0
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87 #else
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88 add r0, pc, #1
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89 bx r0
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90 .code 16
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91 bl hwinit0
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92 mov r0, pc
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93 bx r0
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94 .code 32
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95 #endif
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96 /*
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97 * Data initialization.
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98 * NOTE: It assumes that the DATA size is a multiple of 4.
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99 */
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100 ldr r1, =_textdata
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101 ldr r2, =_data
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102 ldr r3, =_edata
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103 dataloop:
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104 ???? 0392 cmp r2, r3
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105 ldrlo r0, [r1], #4
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106 strlo r0, [r2], #4
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107 blo dataloop
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108 /*
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109 * BSS initialization.
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110 * NOTE: It assumes that the BSS size is a multiple of 4.
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GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 3
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111 */
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112 ???? 0340 mov r0, #0
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113 ldr r1, =_bss_start
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114 ldr r2, =_bss_end
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115 bssloop:
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116 ???? 0291 cmp r1, r2
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117 strlo r0, [r1], #4
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118 blo bssloop
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119 /*
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120 * Late initialization.
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121 */
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122 #ifdef THUMB_NO_INTERWORKING
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123 add r0, pc, #1
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124 bx r0
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125 .code 16
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126 bl hwinit1
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127 mov r0, #0
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128 mov r1, r0
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129 bl main
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130 ldr r1, =MainExitHandler
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131 bx r1
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132 .code 32
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133 #else
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134 bl hwinit1
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135 ???? 0340 mov r0, #0
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136 ???? 0041 mov r1, r0
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137 bl main
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138 b MainExitHandler
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139 #endif
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140
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141 /*
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142 * Default main function exit handler.
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143 */
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144 .weak MainExitHandler
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145 .globl MainExitHandler
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146 MainExitHandler:
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147
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148 .loop: b .loop
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149
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150 /*
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151 * Default early initialization code. It is declared weak in order to be
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152 * replaced by the real initialization code.
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153 * Early initialization is performed just after reset before BSS and DATA
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154 * segments initialization.
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155 */
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156 #ifdef THUMB_NO_INTERWORKING
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157 .thumb_func
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158 .code 16
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159 #endif
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160 .weak hwinit0
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161 hwinit0:
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162 bx lr
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163 .code 32
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164
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165 /*
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166 * Default late initialization code. It is declared weak in order to be
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167 * replaced by the real initialization code.
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GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 4
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168 * Late initialization is performed after BSS and DATA segments initialization
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169 * and before invoking the main() function.
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170 */
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171 #ifdef THUMB_NO_INTERWORKING
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172 .thumb_func
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173 .code 16
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174 #endif
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175 .weak hwinit1
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176 hwinit1:
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177 bx lr
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178 .code 32
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GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 5
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DEFINED SYMBOLS
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*ABS*:00000000 ../../os/ports/GCC/ARM7/crt0.s
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../../os/ports/GCC/ARM7/crt0.s:28 *ABS*:00000010 MODE_USR
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../../os/ports/GCC/ARM7/crt0.s:29 *ABS*:00000011 MODE_FIQ
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../../os/ports/GCC/ARM7/crt0.s:30 *ABS*:00000012 MODE_IRQ
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../../os/ports/GCC/ARM7/crt0.s:31 *ABS*:00000013 MODE_SVC
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../../os/ports/GCC/ARM7/crt0.s:32 *ABS*:00000017 MODE_ABT
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../../os/ports/GCC/ARM7/crt0.s:33 *ABS*:0000001b MODE_UND
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../../os/ports/GCC/ARM7/crt0.s:34 *ABS*:0000001f MODE_SYS
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../../os/ports/GCC/ARM7/crt0.s:36 *ABS*:00000080 I_BIT
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../../os/ports/GCC/ARM7/crt0.s:37 *ABS*:00000040 F_BIT
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../../os/ports/GCC/ARM7/crt0.s:47 .text:00000000 ResetHandler
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../../os/ports/GCC/ARM7/crt0.s:103 .text:00000000 dataloop
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../../os/ports/GCC/ARM7/crt0.s:115 .text:00000000 bssloop
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../../os/ports/GCC/ARM7/crt0.s:146 .text:00000000 MainExitHandler
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../../os/ports/GCC/ARM7/crt0.s:148 .text:00000000 .loop
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../../os/ports/GCC/ARM7/crt0.s:161 .text:00000000 hwinit0
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../../os/ports/GCC/ARM7/crt0.s:176 .text:00000000 hwinit1
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UNDEFINED SYMBOLS
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sp
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