162 lines
4.4 KiB
C
162 lines
4.4 KiB
C
/******************************************************************************/
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/* Copyright (c) 2016 MD Automotive Controls. Original Work. */
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/* License: http://www.gnu.org/licenses/gpl.html GPL version 2 or higher */
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/******************************************************************************/
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/* CONTEXT:KERNEL */
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/* PACKAGE TITLE: SIM Hardware Adaption */
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/* DESCRIPTION: This code is provides functions for clock register */
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/* setting in future will support low power clocking */
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/* for power modes and shutdown etc */
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/* FILE NAME: SIMHA.c */
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/* REVISION HISTORY: 28-03-2016 | 1.0 | Initial revision */
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/* */
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/******************************************************************************/
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#define SIMHA_C
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#include <stddef.h>
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#include "CPUAbstract.h"
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#include "SIM.h"
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#include "declarations.h"
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#include "types.h"
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void SIMHA_vSetRegAddress(SIMHA_tenReg enReg, REGSET_tstReg32Val* pstReg32Val)
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{
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#if defined(BUILD_MK60)
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switch(enReg)
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{
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case SIM_SCGC1:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC1));
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break;
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case SIM_SCGC2:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC2));
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break;
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case SIM_SCGC3:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC3));
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break;
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case SIM_SCGC4:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC4));
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break;
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case SIM_SCGC5:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC5));
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break;
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case SIM_SCGC6:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC6));
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break;
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case SIM_SCGC7:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC7));
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break;
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case SIM_SOPT1:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT1));
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break;
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case SIM_SOPT2:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT2));
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break;
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case SIM_SOPT4:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT4));
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break;
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case SIM_SOPT5:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT5));
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break;
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case SIM_SOPT6:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT6));
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break;
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case SIM_SOPT7:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT7));
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break;
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default:
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break;
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}
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#endif //BUILD_MK60
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#if defined(BUILD_MK64)
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switch(enReg)
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{
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case SIM_SCGC1:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC1));
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break;
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case SIM_SCGC2:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC2));
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break;
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case SIM_SCGC3:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC3));
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break;
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case SIM_SCGC4:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC4));
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break;
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case SIM_SCGC5:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC5));
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break;
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case SIM_SCGC6:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC6));
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break;
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case SIM_SCGC7:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SCGC7));
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break;
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case SIM_SOPT1:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT1));
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break;
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case SIM_SOPT2:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT2));
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break;
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case SIM_SOPT4:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT4));
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break;
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case SIM_SOPT5:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT5));
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break;
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case SIM_SOPT7:
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pstReg32Val->reg = (volatile uint32*)(SIM_BASE + offsetof(SIM_Type, SOPT7));
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break;
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default:
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break;
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}
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#endif //BUILD_MK64
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}
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bool SIMHA_boEnablePeripheralClock(IRQn_Type IRQn)
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{
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#ifdef BUILD_SAM3X8E
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uint32 u32RetVal;
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bool boRetVal;
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u32RetVal = pmc_enable_periph_clk(IRQn);
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boRetVal = (0 == u32RetVal) ? TRUE : FALSE;
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return boRetVal;
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#endif //BUILD_SAM3X8E
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return FALSE;
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}
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