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RabbitECUTeensyMCUXpresso/source/Peripherals/SDHC1HA.h

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/** ###################################################################
** THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : SDHC1.h
** Project : ProcessorExpert
** Processor : MK60DN512ZVMD10
** Component : SDHC_LDD
** Version : Component 00.001, Driver 01.03, CPU db: 3.00.003
** Compiler : CodeWarrior ARM C Compiler
** Date/Time : 2012-07-29, 21:43, # CodeGen: 371
** Abstract :
** This component implements a SD host controller driver
** interface. Handles control and data transfers to/from
** SD and MMC cards.
** Settings :
** Component name : SDHC1
** Device : SDHC
** Settings :
** Interface : 4-bit data mode
** Bus clock : 390.625 kHz
** Data timeout exponent : 20
** DMA :
** Read watermark : 16
** Write watermark : 16
** Buffers :
** Transfer buffer table size : 8
** Interrupt service/event : Enabled
** SDHC : INT_SDHC
** SDHC priority : medium priority
** Pins : 4-bit data mode
** CLK pin : PTE2/SPI1_SCK/UART1_CTS_b/SDHC0_DCLK/ADC1_SE6a
** CLK pin signal : SD_CLK
** CMD pin : PTE3/SPI1_SIN/UART1_RTS_b/SDHC0_CMD/ADC1_SE7a
** CMD pin signal : SD_CMD
** Data :
** DAT0 pin : PTE1/SPI1_SOUT/UART1_RX/SDHC0_D0/I2C1_SCL/ADC1_SE5a
** DAT0 pin signal : SD_DATA0
** DAT1 : Enabled
** DAT1 pin : PTE0/SPI1_PCS1/UART1_TX/SDHC0_D1/I2C1_SDA/ADC1_SE4a
** DAT1 pin signal : SD_DATA1
** DAT2 : Enabled
** DAT2 pin : PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2
** DAT2 pin signal : SD_DATA2
** DAT3 : Enabled
** DAT3 pin : PTE4/SPI1_PCS0/UART3_TX/SDHC0_D3
** DAT3 pin signal : SD_DATA3
** Initialization :
** Enable device : yes
** Auto initialization : no
** Event mask :
** OnCardInserted : Enabled
** OnCardRemoved : Enabled
** OnFinished : Enabled
** CPU clock/configuration selection :
** Clock configuration 0 : This component enabled
** Clock configuration 1 : This component disabled
** Clock configuration 2 : This component disabled
** Contents :
** Init - LDD_TDeviceData* SDHC1_Init(LDD_TUserData *UserDataPtr);
** Deinit - void SDHC1_Deinit(LDD_TDeviceData *DeviceDataPtr);
** Enable - LDD_TError SDHC1_Enable(LDD_TDeviceData *DeviceDataPtr);
** Disable - LDD_TError SDHC1_Disable(LDD_TDeviceData *DeviceDataPtr);
** SetEventMask - LDD_TError SDHC1_SetEventMask(LDD_TDeviceData *DeviceDataPtr, LDD_TEventMask...
** GetEventMask - LDD_TEventMask SDHC1_GetEventMask(LDD_TDeviceData *DeviceDataPtr);
** DetectCards - LDD_TError SDHC1_DetectCards(LDD_TDeviceData *DeviceDataPtr);
** SelectCard - LDD_TError SDHC1_SelectCard(LDD_TDeviceData *DeviceDataPtr, uint8_t Id);
** GetCardInfo - LDD_TError SDHC1_GetCardInfo(LDD_TDeviceData *DeviceDataPtr,...
** TransferBlocks - LDD_TError SDHC1_TransferBlocks(LDD_TDeviceData *DeviceDataPtr,...
** EraseBlocks - LDD_TError SDHC1_EraseBlocks(LDD_TDeviceData *DeviceDataPtr, uint32_t...
** SetDataWidth - LDD_TError SDHC1_SetDataWidth(LDD_TDeviceData *DeviceDataPtr, uint8_t Width);
** SelectBusClock - LDD_TError SDHC1_SelectBusClock(LDD_TDeviceData *DeviceDataPtr,...
** SetVoltage - LDD_TError SDHC1_SetVoltage(LDD_TDeviceData *DeviceDataPtr, LDD_SDHC_TVoltage...
** SetWriteProtection - LDD_TError SDHC1_SetWriteProtection(LDD_TDeviceData *DeviceDataPtr,...
** GetWriteProtection - LDD_TError SDHC1_GetWriteProtection(LDD_TDeviceData *DeviceDataPtr, uint32_t...
** CancelOperation - LDD_TError SDHC1_CancelOperation(LDD_TDeviceData *DeviceDataPtr);
** GetStatus - LDD_SDHC_TStatus SDHC1_GetStatus(LDD_TDeviceData *DeviceDataPtr);
** GetError - LDD_SDHC_TError SDHC1_GetError(LDD_TDeviceData *DeviceDataPtr, uint32_t...
** ConnectPin - LDD_TError SDHC1_ConnectPin(LDD_TDeviceData *DeviceDataPtr, LDD_TPinMask...
** SetOperationMode - LDD_TError SDHC1_SetOperationMode(LDD_TDeviceData *DeviceDataPtr,...
** GetDriverState - LDD_TDriverState SDHC1_GetDriverState(LDD_TDeviceData *DeviceDataPtr);
**
** Copyright : 1997 - 2011 Freescale Semiconductor, Inc. All Rights Reserved.
**
** http : www.freescale.com
** mail : support@freescale.com
** ###################################################################*/
#ifndef SDHC1_H
#define SDHC1_H
/* MODULE SDHC1 */
/* Include shared modules, which are used for whole project */
#include <TYPES.h>
#include "build.h"
#include "sdhcha.h"
/* Configuration constants */
#define SDHC1_MAX_CARD_NUMBER 1U
#define SDHC1_BUFFER_TABLE_SIZE 8U
/* Component constants */
#define SDHC1_OCR_HIGH_VOLTAGE_MASK 0x00FF8000UL
#define SDHC1_OCR_LOW_VOLTAGE_MASK 0x00000080UL
#define SDHC1_OCR_HIGH_CAPACITY_MASK 0x40000000UL
#define SDHC1_IF_COND_LOW_VOLTAGE_MASK 0x00000200UL
#define SDHC1_IF_COND_HIGH_VOLTAGE_MASK 0x00000100UL
#define SDHC1_IF_COND_CHECK_PATTERN 0x000000AAUL
#define SDHC1_VOLT_VALID_RETRY_COUNT 6500U /* Number of OCR (operation conditions register) request repetitions to give the card 1 second to power up (with 400kHz bus clock) */
#define SDHC1_NO_RESPONSE 0U
#define SDHC1_CSD_SIZE 16U /* Card specific data register size */
#define SDHC1_EXT_CSD_SIZE 512U /* Extended card specific data register size */
#define SDHC1_SCR_SIZE 8U /* SD card configuration register size */
#define SDHC1_SFS_SIZE 64U /* Switch function statuses register size */
#define SDHC1_WRITE_PROTECT_MASK_SIZE 4U /* Write protection mask size */
/* Endianness correction macros */
#define SDHC1_BE_TO_NE16(x) ((uint16_t)((uint16_t)(x) >> 8) | (uint16_t)((uint16_t)(x) << 8)) /* Big endian to native endian 16-bit */
#define SDHC1_BE_TO_NE32(x) (((uint32_t)((uint32_t)(x) >> 24) & 0xFFU) | ((uint32_t)((uint32_t)(x) >> 8) & 0xFF00U) | ((uint32_t)((uint32_t)(x) << 8) & 0xFF0000U) | ((uint32_t)((uint32_t)(x) << 24) & 0xFF000000U)) /* Big endian to native endian 32-bit */
#define SDHC1_NE_TO_BE16(x) ((uint16_t)((uint16_t)(x) >> 8) | (uint16_t)((uint16_t)(x) << 8)) /* Native endian to big endian 16-bit */
#define SDHC1_NE_TO_BE32(x) (((uint32_t)((uint32_t)(x) >> 24) & 0xFFU) | ((uint32_t)((uint32_t)(x) >> 8) & 0xFF00U) | ((uint32_t)((uint32_t)(x) << 8) & 0xFF0000U) | ((uint32_t)((uint32_t)(x) << 24) & 0xFF000000U)) /* Native endian to big endian 32-bit */
/* Command arguments macros */
#define SDHC1_CMD_ARG_RCA(RCA) (uint32_t)((uint32_t)(RCA) << 16)
#define SDHC1_SD_CMD6_ARG_MODE(Mode) (uint32_t)((uint32_t)(Mode) << 31)
#define SDHC1_SD_CMD6_CHECK_FUNC 0U
#define SDHC1_SD_CMD6_SWITCH_FUNC 1U
#define SDHC1_SD_CMD6_ARG_GROUP_1(Func) (uint32_t)((uint32_t)(Func) << 0)
#define SDHC1_SD_CMD6_GROUP_1_HIGH_SPEED 1U
#define SDHC1_SD_CMD6_ARG_GROUP_2(Func) (uint32_t)((uint32_t)(Func) << 4)
#define SDHC1_MMC_CMD6_ARG_ACCESS(Access) (uint32_t)((uint32_t)(Access) << 24)
#define SDHC1_MMC_CMD6_COMMAND_SET 0U
#define SDHC1_MMC_CMD6_SET_BITS 1U
#define SDHC1_MMC_CMD6_CLEAR_BITS 2U
#define SDHC1_MMC_CMD6_WRITE_BYTES 3U
#define SDHC1_MMC_CMD6_ARG_INDEX(Index) (uint32_t)((uint32_t)(Index) << 16)
#define SDHC1_MMC_CMD6_ARG_VALUE(Value) (uint32_t)((uint32_t)(Value) << 8)
#define SDHC1_MMC_CMD6_ARG_CMD_SET(Set) (uint32_t)((uint32_t)(Set) << 0)
/* Response 1 status register field access macros */
#define SDHC1_R1_IS_ADDRESS_OUT_OF_RANGE(Response) ((Response)[0] & 0x80000000UL)
#define SDHC1_R1_IS_ADDRESS_MISALIGN(Response) ((Response)[0] & 0x40000000UL)
#define SDHC1_R1_IS_BLOCK_LEN_ERROR(Response) ((Response)[0] & 0x20000000UL)
#define SDHC1_R1_IS_ERASE_SEQ_ERROR(Response) ((Response)[0] & 0x10000000UL)
#define SDHC1_R1_IS_ERASE_PARAM(Response) ((Response)[0] & 0x08000000UL)
#define SDHC1_R1_IS_WP_VIOLATION(Response) ((Response)[0] & 0x04000000UL)
#define SDHC1_R1_IS_CARD_IS_LOCKED(Response) ((Response)[0] & 0x02000000UL)
#define SDHC1_R1_IS_LOCK_UNLOCK_FAILED(Response) ((Response)[0] & 0x01000000UL)
#define SDHC1_R1_IS_COM_CRC_ERROR(Response) ((Response)[0] & 0x00800000UL)
#define SDHC1_R1_IS_ILLEGAL_COMMAND(Response) ((Response)[0] & 0x00400000UL)
#define SDHC1_R1_IS_CARD_ECC_FAILED(Response) ((Response)[0] & 0x00200000UL)
#define SDHC1_R1_IS_CC_ERROR(Response) ((Response)[0] & 0x00100000UL)
#define SDHC1_R1_IS_ERROR(Response) ((Response)[0] & 0x00080000UL)
#define SDHC1_R1_MMC_IS_UNDERRUN(Response) ((Response)[0] & 0x00040000UL)
#define SDHC1_R1_MMC_IS_OVERRUN(Response) ((Response)[0] & 0x00020000UL)
#define SDHC1_R1_IS_CSD_OVERWRITE(Response) ((Response)[0] & 0x00010000UL)
#define SDHC1_R1_IS_WP_ERASE_SKIP(Response) ((Response)[0] & 0x00008000UL)
#define SDHC1_R1_SD_IS_CARD_ECC_DISABLED(Response) ((Response)[0] & 0x00004000UL)
#define SDHC1_R1_IS_ERASE_RESET(Response) ((Response)[0] & 0x00002000UL)
#define SDHC1_R1_GET_CURRENT_STATE(Response) (((Response)[0] & 0x00001E00UL) >> 9)
#define SDHC1_R1_IDLE_STATE 0x00U
#define SDHC1_R1_READY_STATE 0x01U
#define SDHC1_R1_IDENTIFICATION_STATE 0x02U
#define SDHC1_R1_STAND_BY_STATE 0x03U
#define SDHC1_R1_TRANSFER_STATE 0x04U
#define SDHC1_R1_SENDING_DATA_STATE 0x05U
#define SDHC1_R1_RECEIVE_DATA_STATE 0x06U
#define SDHC1_R1_PROGRAMMING_STATE 0x07U
#define SDHC1_R1_DISCONNECT_STATE 0x08U
#define SDHC1_R1_BUS_TEST_STATE 0x09U
#define SDHC1_R1_SLEEP_STATE 0x0AU
#define SDHC1_R1_IS_READY_FOR_DATA(Response) ((Response)[0] & 0x00000100UL)
#define SDHC1_R1_IS_SWITCH_ERROR(Response) ((Response)[0] & 0x00000080UL)
#define SDHC1_R1_IS_APP_CMD(Response) ((Response)[0] & 0x00000020UL)
#define SDHC1_R1_SD_IS_AKE_SEQ_ERROR(Response) ((Response)[0] & 0x00000008UL)
/* Response 2 SD CSD (card specific data) v1, v2 and MMC CSD (card specific data) register field access macros */
#define SDHC1_R2_GET_CSD_STRUCTURE(Response) (((Response)[3] & 0x00C00000UL) >> 22)
#define SDHC1_SD_CSD_VERS_1_0 0U
#define SDHC1_SD_CSD_VERS_2_0 1U
#define SDHC1_MMC_CSD_VERS_1_0 0U
#define SDHC1_MMC_CSD_VERS_1_1 1U
#define SDHC1_MMC_CSD_VERS_1_2 2U
#define SDHC1_MMC_CSD_VERS_IN_EXT_CSD 3U
#define SDHC1_R2_MMC_GET_SPEC_VERS(Response) (((Response)[3] & 0x003C0000UL) >> 18)
#define SDHC1_MMC_CSD_SPEC_VERS_1_X 0U
#define SDHC1_MMC_CSD_SPEC_VERS_1_4 1U
#define SDHC1_MMC_CSD_SPEC_VERS_2_X 2U
#define SDHC1_MMC_CSD_SPEC_VERS_3_X 3U
#define SDHC1_MMC_CSD_SPEC_VERS_4_X 4U
#define SDHC1_R2_GET_TAAC(Response) (((Response)[3] & 0x0000FF00UL) >> 8)
#define SDHC1_R2_GET_NSAC(Response) (((Response)[3] & 0x000000FFUL) >> 0)
#define SDHC1_R2_GET_TRAN_SPEED(Response) (((Response)[2] & 0xFF000000UL) >> 24)
#define SDHC1_R2_GET_CCC(Response) (((Response)[2] & 0x00FFF000UL) >> 12)
#define SDHC1_R2_GET_READ_BL_LEN(Response) (((Response)[2] & 0x00000F00UL) >> 8)
#define SDHC1_R2_GET_READ_BL_PARTIAL(Response) (((Response)[2] & 0x00000080UL) >> 7)
#define SDHC1_R2_GET_WRITE_BLK_MISALIGN(Response) (((Response)[2] & 0x00000040UL) >> 6)
#define SDHC1_R2_GET_READ_BLK_MISALIGN(Response) (((Response)[2] & 0x00000020UL) >> 5)
#define SDHC1_R2_GET_DSR_IMP(Response) (((Response)[2] & 0x00000010UL) >> 4)
/* Response 2 CSD (card specific data) v1 register field access macros */
#define SDHC1_R2_CSD_V1_GET_C_SIZE(Response) ((((Response)[2] & 0x00000003UL) << 10) | (((Response)[1] & 0xFFC00000UL) >> 22))
#define SDHC1_R2_CSD_V1_GET_MIN_VDD_R_CURR(Response) (((Response)[1] & 0x00380000UL) >> 19)
#define SDHC1_R2_CSD_V1_GET_MAX_VDD_R_CURR(Response) (((Response)[1] & 0x00070000UL) >> 16)
#define SDHC1_R2_CSD_V1_GET_MIN_VDD_W_CURR(Response) (((Response)[1] & 0x0000E000UL) >> 13)
#define SDHC1_R2_CSD_V1_GET_MAX_VDD_W_CURR(Response) (((Response)[1] & 0x00001C00UL) >> 10)
#define SDHC1_R2_CSD_V1_GET_C_SIZE_MULT(Response) (((Response)[1] & 0x00000380UL) >> 7)
/* Response 2 SD CSD (card specific data) v2 register field access macros */
#define SDHC1_R2_CSD_V2_GET_C_SIZE(Response) (((Response)[1] & 0x3FFFFF00UL) >> 8)
/* Response 2 SD CSD (card specific data) register field access macros */
#define SDHC1_R2_SD_GET_ERASE_BLOCK_EN(Response) (((Response)[1] & 0x00000040UL) >> 6)
#define SDHC1_R2_SD_GET_SECTOR_SIZE(Response) ((((Response)[1] & 0x0000003FUL) << 1) | (((Response)[0] & 0x80000000UL) >> 31))
#define SDHC1_R2_SD_GET_WP_GRP_SIZE(Response) (((Response)[0] & 0x1F000000UL) >> 24)
/* Response 2 MMC CSD (card specific data) register field access macros */
#define SDHC1_R2_MMC_GET_ERASE_GRP_SIZE(Response) (((Response)[1] & 0x0000007CUL) >> 2)
#define SDHC1_R2_MMC_GET_ERASE_GRP_MULT(Response) ((((Response)[1] & 0x00000003UL) << 3) | (((Response)[0] & 0xE0000000UL) >> 29))
#define SDHC1_R2_MMC_GET_WP_GRP_SIZE(Response) (((Response)[0] & 0x1F000000UL) >> 24)
/* Response 2 CSD (card specific data) register field access macros */
#define SDHC1_R2_GET_WP_GRP_ENABLE(Response) (((Response)[0] & 0x00800000UL) >> 23)
#define SDHC1_R2_GET_DEFAULT_ECC(Response) (((Response)[0] & 0x00600000UL) >> 21)
#define SDHC1_R2_GET_R2W_FACTOR(Response) (((Response)[0] & 0x001C0000UL) >> 18)
#define SDHC1_R2_GET_WRITE_BL_LEN(Response) (((Response)[0] & 0x0003C000UL) >> 14)
#define SDHC1_R2_GET_WRITE_BL_PARTIAL(Response) (((Response)[0] & 0x00002000UL) >> 13)
#define SDHC1_R2_GET_CONTENT_PROT_APP(Response) (((Response)[0] & 0x00000100UL) >> 8)
#define SDHC1_R2_GET_FILE_FORMAT_GRP(Response) (((Response)[0] & 0x00000080UL) >> 7)
#define SDHC1_R2_GET_COPY(Response) (((Response)[0] & 0x00000040UL) >> 6)
#define SDHC1_R2_GET_PERM_WRITE_PROTECT(Response) (((Response)[0] & 0x00000020UL) >> 5)
#define SDHC1_R2_GET_TMP_WRITE_PROTECT(Response) (((Response)[0] & 0x00000010UL) >> 4)
#define SDHC1_R2_GET_FILE_FORMAT(Response) (((Response)[0] & 0x0000000CUL) >> 2)
#define SDHC1_R2_GET_ECC(Response) (((Response)[0] & 0x00000003UL) >> 0)
/* Response 2 CSD (card specific data) register writable field masks */
#define SDHC1_R2_FILE_FORMAT_GRP_MASK 0x00000080UL
#define SDHC1_R2_COPY_MASK 0x00000040UL
#define SDHC1_R2_PERM_WRITE_PROTECT_MASK 0x00000020UL
#define SDHC1_R2_TMP_WRITE_PROTECT_MASK 0x00000010UL
#define SDHC1_R2_FILE_FORMAT_MASK 0x0000000CUL
#define SDHC1_R2_ECC_MASK 0x00000003UL
/* Response 2 CID register field access macros */
#define SDHC1_R2_GET_MANUFACTURER_ID(Response) (((Response)[3] & 0x00FF0000UL) >> 16)
/* Response 2 SD CID register field access macros */
#define SDHC1_R2_SD_GET_OEM_APPLICATION_ID(Response) (((Response)[3] & 0x0000FFFFUL) >> 0)
#define SDHC1_R2_SD_GET_PRODUCT_NAME(Response) ((((Response)[2] & 0xFFFFFFFFUL) << 8) | (((Response)[1] & 0xFF000000UL) >> 24))
#define SDHC1_R2_SD_GET_PRODUCT_REVISION(Response) (((Response)[1] & 0x00FF0000UL) >> 16)
#define SDHC1_R2_SD_GET_PRODUCT_SERIAL_NUMBER(Response) ((((Response)[1] & 0x0000FFFFUL) << 16) | (((Response)[0] & 0xFFFF0000UL) >> 16))
#define SDHC1_R2_SD_GET_MANUFACTURING_DATE(Response) (((Response)[0] & 0x00000FFFUL) >> 0)
/* Response 2 MMC CID register field access macros */
#define SDHC1_R2_MMC_GET_CARD_BGA(Response) (((Response)[3] & 0x00000300UL) >> 8)
#define SDHC1_R2_MMC_GET_OEM_APPLICATION_ID(Response) (((Response)[3] & 0x000000FFUL) >> 0)
#define SDHC1_R2_MMC_GET_PRODUCT_NAME(Response) ((((Response)[2] & 0xFFFFFFFFUL) << 16) | (((Response)[1] & 0xFFFF0000UL) >> 16))
#define SDHC1_R2_MMC_GET_PRODUCT_REVISION(Response) (((Response)[1] & 0x0000FF00UL) >> 8)
#define SDHC1_R2_MMC_GET_PRODUCT_SERIAL_NUMBER(Response) ((((Response)[1] & 0x000000FFUL) << 24) | (((Response)[0] & 0xFFFFFF00UL) >> 8))
#define SDHC1_R2_MMC_GET_MANUFACTURING_DATE(Response) (((Response)[0] & 0x000000FFUL) >> 0)
/* Response 3 OCR (operation conditions register) access macros */
#define SDHC1_R3_OCR_IS_CARD_POWER_UP(Response) ((Response)[0] & 0x80000000UL)
#define SDHC1_R3_OCR_IS_CARD_HIGH_CAPACITY(Response) ((Response)[0] & 0x40000000UL)
/* Response 6 field access macros */
#define SDHC1_R6_GET_RCA(Response) ((Response)[0] >> 16)
/* Extended CSD (card specific data) register data block field indices */
#define SDHC1_EXT_CSD_S_CMD_SET_INDEX 504U
#define SDHC1_EXT_CSD_INI_TIMEOUT_AP_INDEX 241U
#define SDHC1_EXT_CSD_PWR_CL_DDR_52_360_INDEX 239U
#define SDHC1_EXT_CSD_PWR_CL_DDR_52_195_INDEX 238U
#define SDHC1_EXT_CSD_MIN_PERF_DDR_W_8_52_INDEX 235U
#define SDHC1_EXT_CSD_MIN_PERF_DDR_R_8_52_INDEX 234U
#define SDHC1_EXT_CSD_TRIM_MULT_INDEX 232U
#define SDHC1_EXT_CSD_SEC_FEATURE_SUPPORT_INDEX 231U
#define SDHC1_EXT_CSD_SEC_ERASE_MULT_INDEX 230U
#define SDHC1_EXT_CSD_SEC_TRIM_MULT_INDEX 229U
#define SDHC1_EXT_CSD_BOOT_INFO_INDEX 228U
#define SDHC1_EXT_CSD_BOOT_SIZE_MULTI_INDEX 226U
#define SDHC1_EXT_CSD_ACC_SIZE_INDEX 225U
#define SDHC1_EXT_CSD_HC_ERASE_GRP_SIZE_INDEX 224U
#define SDHC1_EXT_CSD_ERASE_TIMEOUT_MULT_INDEX 223U
#define SDHC1_EXT_CSD_REL_WR_SEC_C_INDEX 222U
#define SDHC1_EXT_CSD_HC_WP_GRP_SIZE_INDEX 221U
#define SDHC1_EXT_CSD_S_C_VCC_INDEX 220U
#define SDHC1_EXT_CSD_S_C_VCCQ_INDEX 219U
#define SDHC1_EXT_CSD_S_A_TIMEOUT_INDEX 217U
#define SDHC1_EXT_CSD_SEC_COUNT_INDEX 212U
#define SDHC1_EXT_CSD_MIN_PERF_W_8_52_INDEX 210U
#define SDHC1_EXT_CSD_MIN_PERF_R_8_52_INDEX 209U
#define SDHC1_EXT_CSD_MIN_PERF_W_8_26_4_52_INDEX 208U
#define SDHC1_EXT_CSD_MIN_PERF_R_8_26_4_52_INDEX 207U
#define SDHC1_EXT_CSD_MIN_PERF_W_4_26_INDEX 206U
#define SDHC1_EXT_CSD_MIN_PERF_R_4_26_INDEX 205U
#define SDHC1_EXT_CSD_PWR_CL_26_360_INDEX 203U
#define SDHC1_EXT_CSD_PWR_CL_52_360_INDEX 202U
#define SDHC1_EXT_CSD_PWR_CL_26_195_INDEX 201U
#define SDHC1_EXT_CSD_PWR_CL_52_195_INDEX 200U
#define SDHC1_EXT_CSD_CARD_TYPE_INDEX 196U
#define SDHC1_EXT_CSD_CSD_STRUCTURE_INDEX 194U
#define SDHC1_EXT_CSD_EXT_CSD_REV_INDEX 192U
#define SDHC1_EXT_CSD_CMD_SET_INDEX 191U
#define SDHC1_EXT_CSD_CMD_SET_REV_INDEX 189U
#define SDHC1_EXT_CSD_POWER_CLASS_INDEX 187U
#define SDHC1_EXT_CSD_HS_TIMING_INDEX 185U
#define SDHC1_EXT_CSD_BUS_WIDTH_INDEX 183U
#define SDHC1_EXT_CSD_ERASED_MEM_CONT_INDEX 181U
#define SDHC1_EXT_CSD_PARTITION_CONFIG_INDEX 179U
#define SDHC1_EXT_CSD_BOOT_CONFIG_PROT_INDEX 178U
#define SDHC1_EXT_CSD_BOOT_BUS_WIDTH_INDEX 177U
#define SDHC1_EXT_CSD_ERASE_GROUP_DEF_INDEX 175U
#define SDHC1_EXT_CSD_BOOT_WP_INDEX 173U
#define SDHC1_EXT_CSD_USER_WP_INDEX 171U
#define SDHC1_EXT_CSD_FW_CONFIG_INDEX 169U
#define SDHC1_EXT_CSD_RPMB_SIZE_MULT_INDEX 168U
#define SDHC1_EXT_CSD_RST_N_FUNCTION_INDEX 162U
#define SDHC1_EXT_CSD_PARTITIONING_SUPPORT_INDEX 160U
#define SDHC1_EXT_CSD_MAX_ENH_SIZE_MULT_INDEX 157U
#define SDHC1_EXT_CSD_PARTITIONS_ATTRIBUTE_INDEX 156U
#define SDHC1_EXT_CSD_PARTITION_SETTING_COMPLETED_INDEX 155U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_1_0_INDEX 154U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_1_1_INDEX 153U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_1_2_INDEX 152U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_2_0_INDEX 151U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_2_1_INDEX 150U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_2_2_INDEX 149U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_3_0_INDEX 148U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_3_1_INDEX 147U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_3_2_INDEX 146U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_4_0_INDEX 145U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_4_1_INDEX 144U
#define SDHC1_EXT_CSD_GP_SIZE_MULT_4_2_INDEX 143U
#define SDHC1_EXT_CSD_ENH_SIZE_MULT_INDEX 140U
#define SDHC1_EXT_CSD_ENH_START_ADDR_INDEX 136U
#define SDHC1_EXT_CSD_SEC_BAD_BLK_MGMNT_INDEX 134U
/* SCR (SD card configuration register) data block field access macros */
#define SDHC1_SCR_GET_SCR_STRUCTURE(Response) ((((uint8_t*)(Response))[0] & 0xF0U) >> 4)
#define SDHC1_SCR_GET_SD_SPEC(Response) ((((uint8_t*)(Response))[0] & 0x0FU) >> 0)
#define SDHC1_SCR_SD_SPEC_VERS_1_0X 0U
#define SDHC1_SCR_SD_SPEC_VERS_1_10 1U
#define SDHC1_SCR_SD_SPEC_VERS_2_00 2U
#define SDHC1_SCR_GET_DATA_STAT_AFTER_ERASE(Response) ((((uint8_t*)(Response))[1] & 0x80U) >> 7)
#define SDHC1_SCR_GET_SD_SECURITY(Response) ((((uint8_t*)(Response))[1] & 0x70U) >> 4)
#define SDHC1_SCR_GET_SD_BUS_WIDTHS(Response) ((((uint8_t*)(Response))[1] & 0x0FU) >> 0)
#define SDHC1_SCR_SD_BUS_WIDTH_1_BIT_MASK 0x01U
#define SDHC1_SCR_SD_BUS_WIDTH_4_BIT_MASK 0x04U
/* Switch function status block position in the component's card data structure info block */
#define SDHC1_SFS_BLOCK_START 8U
/* Switch function status block field access macros */
#define SDHC1_SFS_IS_FUNC_SUPPORTED(Response, Group, Index) ((SDHC1_BE_TO_NE16(((uint16_t*)(Response))[6U - ((Group) - 1U)]) >> (Index)) & 1U)
#define SDHC1_SFS_HIGH_SPEED_FUNC_GROUP 1U
#define SDHC1_SFS_HIGH_SPEED_FUNC_INDEX 1U
/* Voltage validation substates */
#define SDHC1_VV_START 0U
#define SDHC1_VV_SDHC_CHECK 1U
#define SDHC1_VV_SD_CHECK 2U
#define SDHC1_VV_MMC_CHECK 3U
#define SDHC1_VV_FINISH 4U
/* Card registration substates */
#define SDHC1_CR_START 0U
#define SDHC1_CR_GET_CID 1U
#define SDHC1_CR_GET_RCA 2U
#define SDHC1_CR_FINISH 3U
/* Card info retrieval substates */
#define SDHC1_CIR_START 0U
#define SDHC1_CIR_STAND_BY_STATE 1U
#define SDHC1_CIR_GET_CSD 2U
#define SDHC1_CIR_TRANSFER_STATE 3U
#define SDHC1_CIR_GET_EXT_CSD 4U
#define SDHC1_CIR_BUS_TEST_4_BIT_WRITE 5U
#define SDHC1_CIR_BUS_TEST_4_BIT_READ 6U
#define SDHC1_CIR_BUS_TEST_8_BIT_WRITE 7U
#define SDHC1_CIR_BUS_TEST_8_BIT_READ 8U
#define SDHC1_CIR_GET_SCR 9U
#define SDHC1_CIR_GET_FUNC_STATUS 10U
#define SDHC1_CIR_FINISH 11U
/* Blocks erasion substates */
#define SDHC1_E_SET_START 0U
#define SDHC1_E_SET_END 1U
#define SDHC1_E_EXECUTE 2U
#define SDHC1_E_FINISH 3U
/* Data width selection substates */
#define SDHC1_DWS_START 0U
#define SDHC1_DWS_BUSY 1U
#define SDHC1_DWS_FINISH 2U
/* Command states */
#define SDHC1_CMD_DATA_LEN 0U
#define SDHC1_CMD_START 1U
#define SDHC1_CMD_ACMD 2U
#define SDHC1_CMD_FINISH 3U
#define SDHC1_CMD_DATA 4U
#define SDHC1_CMD_ERROR 5U
/* ADMA2 transfer buffer descriptor attribute constants */
#define SDHC1_ADMA2_VALID 0x0001U /* Descriptor line is valid */
#define SDHC1_ADMA2_END 0x0002U /* Descriptor line is ending */
#define SDHC1_ADMA2_INT 0x0004U /* Generate interrupt when the descriptor is done*/
#define SDHC1_ADMA2_ATTR_ACT_NOP 0x0000U /* No operation */
#define SDHC1_ADMA2_ATTR_ACT_RSV 0x0010U /* Reserved (no operation) */
#define SDHC1_ADMA2_ATTR_ACT_TRAN 0x0020U /* Transfer data with address and length set in this descriptor line */
#define SDHC1_ADMA2_ATTR_ACT_LINK 0x0030U /* Link to another descriptor */
#define SDHC1_SINGLE_BLOCK_TRANS_ATTRS (SDHC1_ADMA2_VALID | SDHC1_ADMA2_END | SDHC1_ADMA2_ATTR_ACT_TRAN)
#define SDHC1_TRANSFER_TABLE_ALIGN 4U /* Transfer table memory alignment */
#define SDHC1_TRANSFER_BUFFER_ALIGN 4U /* Transfer buffer memory alignment */
/* Pins port register bit indices where to configure pulls */
#define SDHC1_PIN_CMD_PORT_INDEX 3u
#define SDHC1_PIN_DAT0_PORT_INDEX 1u
#define SDHC1_PIN_DAT1_PORT_INDEX 0u
#define SDHC1_PIN_DAT2_PORT_INDEX 5u
#define SDHC1_PIN_DAT3_PORT_INDEX 4u
#define SDHC_BASE_PTR SDHC_BASE
#define LDD_SDHC_CARD_DATA_WIDTH_1_BIT 0x01u /* Card supports 1 bit data bus */
#define LDD_SDHC_CARD_DATA_WIDTH_4_BIT 0x02u /* Card supports 4 bit data bus */
#define LDD_SDHC_CARD_DATA_WIDTH_8_BIT 0x04u /* Card supports 8 bit data bus */
#define LDD_SDHC_CARD_BLOCK_READ 0x01u /* Card supports block reading */
#define LDD_SDHC_CARD_BLOCK_WRITE 0x04u /* Card supports block writing */
#define LDD_SDHC_CARD_ERASE 0x08u /* Card supports block erasion */
#define LDD_SDHC_CARD_WRITE_PROTECTION 0x10u /* Card supports write protection */
#define LDD_SDHC_CARD_IO 0x80u /* Card supports IO */
#define LDD_SDHC_CLK_PIN 0x01u /* SD clock pin mask */
#define LDD_SDHC_CMD_PIN 0x02u /* SD command line pin mask */
#define LDD_SDHC_DAT0_PIN 0x04u /* SD data line 0 pin mask */
#define LDD_SDHC_DAT1_PIN 0x08u /* SD data line 1 pin mask */
#define LDD_SDHC_DAT2_PIN 0x10u /* SD data line 2 pin mask */
#define LDD_SDHC_DAT3_PIN 0x20u /* SD data line 3 pin mask */
#define LDD_SDHC_DAT4_PIN 0x40u /* SD data line 4 pin mask */
#define LDD_SDHC_DAT5_PIN 0x80u /* SD data line 5 pin mask */
#define LDD_SDHC_DAT6_PIN 0x0100u /* SD data line 6 pin mask */
#define LDD_SDHC_DAT7_PIN 0x0200u /* SD data line 7 pin mask */
#define LDD_SDHC_CD_PIN 0x0400u /* SD card detection pin mask */
#define LDD_SDHC_WP_PIN 0x0800u /* SD write protection pin mask */
#define LDD_SDHC_LCTL_PIN 0x1000u /* SD LED control pin mask */
#define LDD_SDHC_VS_PIN 0x2000u /* SD voltage control pin mask */
#define LDD_SDHC_ON_CARD_INSERTED 0x01u /* OnCardInserted event mask */
#define LDD_SDHC_ON_CARD_REMOVED 0x02u /* OnCardRemoved event mask */
#define LDD_SDHC_ON_FINISHED 0x04u /* OnFinished event mask */
#define CPU_CLOCK_CONFIG_0 0x00U /* Clock configuration 0 identifier */
#define SDHC_PDD_CMD0_GO_IDLE_STATE SDHCHA_nCMD0_GO_IDLE_STATE
#define SDHC_PDD_CMD1_SEND_OP_COND SDHCHA_nCMD1_MMC_SEND_OP_COND
#define SDHC_PDD_CMD2_ALL_SEND_CID SDHCHA_nCMD2_ALL_SEND_CID
#define SDHC_PDD_CMD3_SET_RELATIVE_ADDR SDHCHA_nCMD3_SET_RELATIVE_ADDR
#define SDHC_PDD_CMD6_SWITCH SDHCHA_nCMD6_SWITCH
#define SDHC_PDD_CMD7_SELECT_CARD SDHCHA_nCMD7_SELECT_CARD
#define SDHC_PDD_CMD8_SEND_EXT_CSD SDHCHA_nCMD8_SEND_EXT_CSD
#define SDHC_PDD_CMD9_SEND_CSD SDHCHA_nCMD9_SEND_CSD
#define SDHC_PDD_CMD12_STOP_TRANSMISSION SDHCHA_nCMD12_STOP_TRANS
#define SDHC_PDD_CMD13_SEND_STATUS SDHCHA_nCMD13_SEND_STATUS
#define SDHC_PDD_CMD14_BUS_TEST_READ SDHCHA_nCMD14_BUS_TEST_READ
#define SDHC_PDD_CMD16_SET_BLOCKLEN SDHCHA_nCMD16_SET_BLOCKLEN
#define SDHC_PDD_CMD17_READ_SINGLE_BLOCK SDHCHA_nCMD17_READ_SINGLE_BLOCK
#define SDHC_PDD_CMD18_READ_MULTIPLE_BLOCK SDHCHA_nCMD18_READ_MULTIPLE_BLOCK
#define SDHC_PDD_CMD19_BUS_TEST_WRITE SDHCHA_nCMD19_BUS_TEST_WRITE
#define SDHC_PDD_CMD24_WRITE_BLOCK SDHCHA_nCMD24_WRITE_BLOCK
#define SDHC_PDD_CMD25_WRITE_MULTIPLE_BLOCK SDHCHA_nCMD25_WRITE_MULTIPLE_BLOCK
#define SDHC_PDD_CMD27_PROGRAM_CSD SDHCHA_nCMD27_PROGRAM_CSD
#define SDHC_PDD_CMD28_SET_WRITE_PROT SDHCHA_nCMD28_SET_WRITE_PROT
#define SDHC_PDD_CMD29_CLR_WRITE_PROT SDHCHA_nCMD29_CLR_WRITE_PROT
#define SDHC_PDD_CMD30_SEND_WRITE_PROT SDHCHA_nCMD30_SEND_WRITE_PROT
#define SDHC_PDD_CMD32_TAG_SECTOR_START SDHCHA_nCMD32_TAG_SECTOR_START
#define SDHC_PDD_CMD33_TAG_SECTOR_END SDHCHA_nCMD33_TAG_SECTOR_END
#define SDHC_PDD_CMD35_TAG_ERASE_GROUP_START SDHCHA_nCMD35_TAG_ERASE_GROUP_START
#define SDHC_PDD_CMD36_TAG_ERASE_GROUP_END SDHCHA_nCMD36_TAG_ERASE_GROUP_END
#define SDHC_PDD_CMD38_ERASE SDHCHA_nCMD38_ERASE
#define SDHC_PDD_CMD55_APP_CMD SDHCHA_nCMD55_APP_CMD
#define SDHC_PDD_ACMD6_SET_BUS_WIDTH SDHCHA_nACMD6_SET_BUS_WIDTH
#define SDHC_PDD_ACMD41_SD_APP_OP_COND SDHCHA_nACMD41_SEND_OP_COND
#define SDHC_PDD_ACMD51_SEND_SCR SDHCHA_nACMD51_MMC_SEND_SCR
#define SDHC_PDD_NO_RESPONSE SDHCHA_nRESPONSE_NIL
#define SDHC_PDD_RESPONSE_LENGTH_136 SDHCHA_nRESPONSE_136
#define SDHC_PDD_RESPONSE_LENGTH_48 SDHCHA_nRESPONSE_48
#define SDHC_PDD_RESPONSE_LENGTH_48_BUSY_CHECK SDHCHA_nRESPONSE_48_BUSY
#define SDHC_PDD_ENABLE_DMA SDHCHA_nENABLE_DMA
#define SDHC_PDD_DATA_PRESENT SDHCHA_nDATA_PRESENT
#define SDHC_PDD_DATA_READ SDHCHA_nDATA_READ
#define SDHC_PDD_DATA_WRITE SDHCHA_nDATA_WRITE
#define SDHC_PDD_ENABLE_BLOCK_COUNT SDHCHA_nENABLE_BLOCK_COUNT
#define SDHC_PDD_ENABLE_AUTO_CMD12 SDHCHA_nENABLE_AUTO_CMD12
#define SDHC_PDD_MULTIPLE_BLOCK SDHCHA_nMULTIPLE_BLOCK
#define SDHC_PDD_DATA_TIMEOUT_ERROR_INT SDHCHA_nDATA_TIMEOUT_ERROR_INT
#define SDHC_PDD_DATA_END_BIT_ERROR_INT SDHCHA_nDATA_END_BIT_ERROR_INT
#define SDHC_PDD_DATA_CRC_ERROR_INT SDHCHA_nDATA_CRC_ERROR_INT
#define SDHC_PDD_DMA_ERROR_INT SDHCHA_nDMA_ERROR_INT
#define SDHC_PDD_COMMAND_TIMEOUT_ERROR_INT SDHCHA_nCOMMAND_TIMEOUT_ERROR_INT
#define SDHC_PDD_COMMAND_CRC_ERROR_INT SDHCHA_nCOMMAND_CRC_ERROR_INT
#define SDHC_PDD_COMMAND_END_BIT_ERROR_INT SDHCHA_nCOMMAND_END_BIT_ERROR_INT
#define SDHC_PDD_COMMAND_INDEX_ERROR_INT SDHCHA_nCOMMAND_INDEX_ERROR_INT
#define SDHC_PDD_COMMAND_COMPLETE_INT SDHCHA_nCOMMAND_COMPLETE_INT
#define SDHC_PDD_TRANSFER_COMPLETE_INT SDHCHA_nTRANSFER_COMPLETE_INT
#define SDHC_PDD_BUFFER_READ_READY_INT SDHCHA_nBUFFER_READ_READY_INT
#define SDHC_PDD_BUFFER_WRITE_READY_INT SDHCHA_nBUFFER_WRITE_READY_INT
#define SDHC_PDD_AUTO_CMD12_CRC_ERROR SDHCHA_nAUTO_CMD12_CRC_ERROR
#define SDHC_PDD_AUTO_CMD12_END_BIT_ERROR SDHCHA_nAUTO_CMD12_END_BIT_ERROR
#define SDHC_PDD_AUTO_CMD12_INDEX_ERROR SDHCHA_nAUTO_CMD12_INDEX_ERROR
#define SDHC_PDD_AUTO_CMD12_ERROR_INT SDHCHA_nAUTO_CMD12_ERROR_INT
#define SDHC_PDD_AUTO_CMD12_TIMEOUT_ERROR SDHCHA_nAUTO_CMD12_TIMEOUT_ERROR
#define SDHC_PDD_1_BIT_MODE SDHCHA_n1_BIT_MODE
#define SDHC_PDD_4_BIT_MODE SDHCHA_n4_BIT_MODE
#define SDHC_PDD_8_BIT_MODE SDHCHA_n8_BIT_MODE
#define PDD_ENABLE true
#define PDD_DISABLE false
/* Peripheral base address of a device allocated by the component. This constant can be used directly in PDD macros. */
#define SDHC1_PRPH_BASE_ADDRESS 0x400B1000U
/* Methods configuration constants - generated for all enabled component's methods */
#define SDHC1_Init_METHOD_ENABLED
#define SDHC1_Deinit_METHOD_ENABLED
#define SDHC1_Enable_METHOD_ENABLED
#define SDHC1_Disable_METHOD_ENABLED
#define SDHC1_SetEventMask_METHOD_ENABLED
#define SDHC1_GetEventMask_METHOD_ENABLED
#define SDHC1_DetectCards_METHOD_ENABLED
#define SDHC1_SelectCard_METHOD_ENABLED
#define SDHC1_GetCardInfo_METHOD_ENABLED
#define SDHC1_TransferBlocks_METHOD_ENABLED
#define SDHC1_EraseBlocks_METHOD_ENABLED
#define SDHC1_SetDataWidth_METHOD_ENABLED
#define SDHC1_SelectBusClock_METHOD_ENABLED
#define SDHC1_SetVoltage_METHOD_ENABLED
#define SDHC1_SetWriteProtection_METHOD_ENABLED
#define SDHC1_GetWriteProtection_METHOD_ENABLED
#define SDHC1_CancelOperation_METHOD_ENABLED
#define SDHC1_GetStatus_METHOD_ENABLED
#define SDHC1_GetError_METHOD_ENABLED
#define SDHC1_ConnectPin_METHOD_ENABLED
#define SDHC1_SetOperationMode_METHOD_ENABLED
#define SDHC1_GetDriverState_METHOD_ENABLED
/* Events configuration constants - generated for all enabled component's events */
#define SDHC1_OnCardInserted_EVENT_ENABLED
#define SDHC1_OnCardRemoved_EVENT_ENABLED
#define SDHC1_OnFinished_EVENT_ENABLED
#define SDHC1_NO_CARD 1 /* Special card ID for the SelectCard method indicating that no card should be selected (unselect all). */
#define SDHC_DSADDR *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, DSADDR ) )
#define SDHC_BLKATTR *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, BLKATTR ) )
#define SDHC_CMDARG *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, CMDARG ) )
#define SDHC_XFERTYP *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, XFERTYP ) )
#define SDHC_CMDRSP *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, CMDRSP[0]) )
#define SDHC_DATPORT *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, DATPORT) )
#define SDHC_PRSSTAT *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, PRSSTAT) )
#define SDHC_PROCTL *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, PROCTL ) )
#define SDHC_SYSCTL *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, SYSCTL ) )
#define SDHC_IRQSTAT *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, IRQSTAT ) )
#define SDHC_IRQSTATEN *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, IRQSTATEN ) )
#define SDHC_IRQSIGEN *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, IRQSIGEN ) )
#define SDHC_AC12ERR *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, AC12ERR ) )
#define SDHC_HTCAPBLT *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, HTCAPBLT ) )
#define SDHC_WML *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, WML ) )
#define SDHC_FEVT *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, FEVT ) )
#define SDHC_ADMAES *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, ADMAES ) )
#define SDHC_ADSADDR *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, ADSADDR ) )
#define SDHC_VENDOR *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, VENDOR ) )
#define SDHC_MMCBOOT *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, MMCBOOT ) )
#define SDHC_HOSTVER *(volatile uint32*)( SDHC_BASE + offsetof( SDHC_Type, HOSTVER ) )
/* typedefs */
typedef void LDD_TUserData;
typedef uint8 LDD_TClockConfiguration;
typedef uint32 LDD_TEventMask;
typedef uint32 LDD_TPinMask;
typedef uint32 LDD_TCallbackParam;
typedef void ( *LDD_TCallback )( LDD_TCallbackParam* );
/* enums */
/* non media specific */
typedef enum
{
ERR_OK,
ERR_DISABLED,
ERR_PARAM_MASK,
ERR_PARAM_BUFFER_COUNT,
ERR_PARAM_WIDTH,
ERR_PARAM_ID,
ERR_PARAM_MODE,
ERR_NOTAVAIL,
ERR_BUSY
} LDD_TError;
typedef enum
{
DOM_RUN,
DOM_WAIT,
DOM_SLEEP,
DOM_STOP
} LDD_TDriverOperationMode;
typedef enum
{
LDD_DRIVER_DISABLED_IN_CLOCK_CONFIGURATION,
LDD_DRIVER_DISABLED_BY_USER,
LDD_DRIVER_BUSY,
} LDD_TDriverState;
/* SD card specific */
typedef enum
{ /* Component states */
LDD_SDHC_DISABLED,
LDD_SDHC_RESET,
LDD_SDHC_IDLE,
LDD_SDHC_VOLTAGE_VALIDATION,
LDD_SDHC_CARD_REGISTRATION,
LDD_SDHC_CARD_SELECTION,
LDD_SDHC_CARD_INFO_RETRIEVAL,
LDD_SDHC_TRANSFER,
LDD_SDHC_ERASION,
LDD_SDHC_IO_REG_TRANSFER,
LDD_SDHC_DATA_WIDTH_SELECTION,
LDD_SDHC_BUS_CLOCK_SELECTION,
LDD_SDHC_WRITE_PROTECTION_SETUP,
LDD_SDHC_WRITE_PROTECTION_RETRIEVAL
} LDD_SDHC_TStatus;
typedef enum
{ /* Operation completion error codes */
LDD_SDHC_ERR_OK, /* No error */
LDD_SDHC_ERR_DMA, /* DMA or block size error */
LDD_SDHC_ERR_NOT_SUPPORTED, /* Initiated operation is not supported by the card (supported operations are contained in the card information structure) */
LDD_SDHC_ERR_TIMEOUT, /* Command or data timeout */
LDD_SDHC_ERR_COMMAND_CRC, /* Command CRC check failed */
LDD_SDHC_ERR_DATA_CRC, /* Data CRC check failed */
LDD_SDHC_ERR_ADDRESS_OUT_OF_RANGE, /* The card address is beyond the card capacity */
LDD_SDHC_ERR_ADDRESS_MISALIGN, /* The card address does not align with physical blocks of the card */
LDD_SDHC_ERR_BLOCK_LEN_ERROR, /* Block length exceeds the maximum value for the card */
LDD_SDHC_ERR_WP_VIOLATION, /* Attempt to program a write protected block */
LDD_SDHC_ERR_CARD_IS_LOCKED, /* The card is locked by the host */
LDD_SDHC_ERR_WP_ERASE_SKIP, /* Only partial address space was erased due to existing write protected blocks */
LDD_SDHC_ERR_INTERNAL_FAILURE, /* Internal component error */
LDD_SDHC_ERR_CARD_FAILURE /* The card was unable to complete the operation */
} LDD_SDHC_TError;
typedef enum
{
LDD_SDHC_LOW_VOLTAGE,
LDD_SDHC_HIGH_VOLTAGE
} LDD_SDHC_TVoltage;
typedef enum {
SDHC1_IDLE = 0,
SDHC1_READY = 1,
SDHC1_IDENT = 2,
SDHC1_STAND_BY = 3,
SDHC1_TRANSFER = 4,
SDHC1_SENDING = 5,
SDHC1_RECEIVE = 6,
SDHC1_PROGRAMMING = 7,
SDHC1_DISCONNECT = 8,
SDHC1_BUS_TEST = 9,
SDHC1_SLEEP = 10
} SDHC1_TCardState;
typedef enum { /* Card types */
LDD_SDHC_SD, /* Secure Digital memory card */
LDD_SDHC_SDIO, /* Secure Digital IO card */
LDD_SDHC_SDCOMBO, /* Combined Secure Digital memory and IO card */
LDD_SDHC_MMC, /* MultiMediaCard memory card */
LDD_SDHC_CE_ATA /* Consumer Electronics ATA card */
} LDD_SDHC_TCardType;
typedef enum { /* Transfer operations */
LDD_SDHC_READ,
LDD_SDHC_WRITE
} LDD_SDHC_TTransferOperation;
typedef enum { /* Write protection types */
LDD_SDHC_GROUP, /* Write protection by groups */
LDD_SDHC_CARD /* Whole card write protection */
} LDD_SDHC_TWriteProtectType;
typedef enum {
SDHC1_BUS_CLOCK_390_625kHz,
SDHC1_BUS_CLOCK_12_5MHz,
SDHC1_BUS_CLOCK_25MHz
} SDHC1_TBusClock;
/* structure type definitions */
typedef struct {
bool Initialized; /* Indicates if the structure contains valid card data */
LDD_SDHC_TCardType Type; /* Card type (see SDHC1_TCardType) */
uint32_t CID[4]; /* Card ID (from the card) */
uint16_t RCA; /* Relative card address */
uint32_t CSD[4]; /* The CSD (card specific data) register value retrieved from the card */
uint8_t Block[512]; /* The extended CSD (card specific data) or SCR (SD card configuration register) value retrieved from the card */
uint8_t DataWidths; /* Data widths succeeded in bus test */
bool HighCapacity; /* Indicates block addressing requirement */
} SDHC1_TCardInfo;
typedef struct {
uint16_t Attributes; /* Transfer buffer attributes */
uint16_t Length; /* Transfer buffer data length */
uint32_t Address; /* Transfer buffer data address */
} SDHC1_TTransferBufferDesc;
typedef struct { /* Card write protection properties */
uint16_t GroupSize; /* The size of write protected group in number of erase groups */
bool Permanent; /* Indicates whether card is permanently write protected (read-only) */
} LDD_SDHC_TCardWriteProtect;
typedef struct { /* Card access properties */
uint16_t MaxBlockLength; /* Max. transferable block length */
bool MisalignBlock; /* Indicates if the data block can be spread over more than one physical block of the memory device */
bool PartialBlock; /* Indicates whether partial block sizes can be used in block access */
} LDD_SDHC_TCardAccess;
typedef struct { /* Card erasion properties */
uint16_t SectorSize; /* The size of an erasable unit */
uint8_t Pattern; /* Memory content after erase */
} LDD_SDHC_TCardErase;
typedef struct { /* Transfer buffer descriptor */
uint16_t Size; /* Buffer data size */
uint8_t *DataPtr; /* Pointer to buffer data */
} LDD_SDHC_TBufferDesc;
typedef struct { /* Card capabilities */
uint8_t DataWidths; /* Bit mask of supported data bus widths */
uint8_t Operations; /* Bit mask of supported operations */
bool HighSpeed; /* Indicates whether the card supports high clock configuration (SD bus clock frequency higher than about 25MHz) */
bool HighCapacity; /* Indicates whether the card requires block addressing instead of byte addressing */
bool LowVoltage; /* Indicates whether the card supports the host's low voltage range */
LDD_SDHC_TCardAccess Read; /* Card data read access capabilities */
LDD_SDHC_TCardAccess Write; /* Card data write access capabilities */
LDD_SDHC_TCardErase Erase; /* Card data erasion capabilities */
LDD_SDHC_TCardWriteProtect WriteProtect; /* Write protection properties */
} LDD_SDHC_TCardCaps;
typedef struct { /* Card features description */
LDD_SDHC_TCardType Type; /* Card type */
uint16_t BlockLength; /* Physical memory block length */
uint32_t BlockCount; /* Number of physical memory blocks */
LDD_SDHC_TCardCaps Caps; /* Card capabilities */
} LDD_SDHC_TCardInfo;
/* unusual forward declaration because both
structures contain pointers to the other type! */
typedef struct LDD_SDHC1_TDeviceData LDD_SDHC1_TDeviceData;
typedef struct LDD_SDHC_TSDData LDD_SDHC_TSDData;
struct LDD_SDHC_TSDData
{
LDD_SDHC1_TDeviceData *SDHCPtr; /* SDHC component data */
//LDD_TDeviceData *GPIOPtr; /* GPIO component data */
bool Finished; /* Operation end indication */
bool Inserted; /* Card insertion indication */
uint8 CardId; /* Initialized card ID */
LDD_SDHC_TCardInfo CardInfo; /* Initialized card info */
};
struct LDD_SDHC1_TDeviceData
{
bool Enabled; /* Indicates whether the device is enabled */
LDD_SDHC_TSDData *UserDataPtr; /* User data structure pointer */
LDD_TEventMask EventMask; /* Event mask used for run-time enabling and disabling of events */
LDD_SDHC_TStatus State; /* Main state of the component */
uint8_t Substate; /* Substate of main state */
uint8_t CmdState; /* Card command state */
uint8_t CardId; /* Card ID of the selected card */
uint8_t NewCardId; /* Card ID actually registered during card registration */
LDD_SDHC_TCardType CardType; /* Card type actually identified during voltage validation or the type of the selected card */
bool HighCapacity; /* High capacity card indication. Needed for special initialization of SDHC cards. */
SDHC1_TCardState CardState; /* State of the selected card */
bool HighVoltage; /* Indicates whether high bus voltage is currently set */
uint32_t CardsVoltages; /* Mask of voltages supported by all cards */
uint16_t RetryCounter; /* Counter for command timeout until give up */
SDHC1_TCardInfo Cards[SDHC1_MAX_CARD_NUMBER]; /* Card data structures list */
LDD_SDHC_TError LastError; /* The last error that has occurred during a card operation */
uint32_t LastErrorAddress; /* Card memory address of the last correctly accessed location before an error has occurred */
uint8_t TransferTableMem[(SDHC1_BUFFER_TABLE_SIZE * sizeof(SDHC1_TTransferBufferDesc)) + SDHC1_TRANSFER_TABLE_ALIGN]; /* Memory for the transfer buffer descriptors table */
SDHC1_TTransferBufferDesc *TransferTable; /* Pointer to the transfer buffer descriptors table */
uint32_t TransferBlockSize; /* Size of buffers to transfer */
uint32_t TransferBlockCount; /* Number of buffers to transfer */
LDD_SDHC_TCardInfo *CardInfoPtr; /* Card info structure pointer where to store the result of the GetCardInfo method call */
LDD_SDHC_TWriteProtectType WriteProtType; /* Write protection type to set */
uint32_t *WriteProtMaskPtr; /* Write protection mask pointer where to store the result of the GetWriteProtection method call */
bool WriteProtFlag; /* Write protection flag value to be set */
LDD_SDHC_TTransferOperation TransferOperation; /* Ongoing transfer operation */
uint32_t Address; /* Card memory address used in an ongoing operation */
uint8_t CSDMem[SDHC1_CSD_SIZE + SDHC1_TRANSFER_BUFFER_ALIGN]; /* Buffer for card CSD (card specific data) register programming */
uint8_t *CSDPtr; /* Aligned CSD (card specific data) register buffer pointer */
uint8_t BusTestMem[8U + SDHC1_TRANSFER_BUFFER_ALIGN]; /* Bus test result buffer for MMC cards */
uint8_t *BusTestPtr; /* Aligned pointer to bus test result */
uint8_t DataWidth; /* Communication data width currently set */
SDHC1_TBusClock Frequency; /* Bus clock frequency currently set */
uint32_t ErasionStart; /* Start address of the erased memory range */
uint32_t ErasionEnd; /* End address of the erased memory range */
bool Cancel; /* Indicates ongoing operation cancelation */
LDD_TClockConfiguration SpeedMode; /* Clock configuration currently set */
bool EnabledMode; /* Indicates whether the device is enabled in the current clock configuration */
};
#define SDHC_PDD_IsSDClockStable( x ) \
(SDHC_PRSSTAT_SDSTB_MASK == ( SDHC_PRSSTAT & SDHC_PRSSTAT_SDSTB_MASK ))
#define SDHC_PDD_InitCard( x ) \
{ \
SDHC_SYSCTL |= SDHC_SYSCTL_RSTA_MASK; \
SDHC_SYSCTL |= SDHC_SYSCTL_INITA_MASK; \
}
#define SDHC_PDD_IsCardInitComplete( x ) \
( 0 == ( SDHC_SYSCTL & SDHC_SYSCTL_INITA_MASK ) )
#define SDHC_PDD_SetCommandArgument( x, y ) \
( SDHC_CMDARG = y )
#define SDHC_PDD_SendCommand( x, y, z ) \
( SDHC_XFERTYP = ( y << SDHC_XFERTYP_CMDINX_SHIFT ) | z ) \
#define PE_LDD_RegisterDeviceStructure( x, y ) \
#define PE_LDD_UnregisterDeviceStructure( x, y ) \
#define PE_LDD_UnregisterDeviceStructure( x ) \
#define SDHC1_OnFinished( x ) \
( ( x -> Finished = true ) )
#define SDHC1_OnCardRemoved( x, y )
/* TODO */
// #define SDHC_PDD_EnableSDHCClock( x, y )
// if( true == y ) SDHC_SYSCTL |= ( SDHC_SYSCTL_IPGEN_MASK |
// SDHC_SYSCTL_HCKEN_MASK |
// SDHC_SYSCTL_PEREN_MASK |
// SDHC_SYSCTL_SDCLKEN_MASK );
#define SDHC_PDD_EnableSDHCClock( x, y ) \
if( true == y ) SDHC_SYSCTL |= ( SDHC_SYSCTL_SDCLKEN_MASK ); \
if( false == y ) SDHC_SYSCTL &= ~( SDHC_SYSCTL_SDCLKEN_MASK )
#define SDHC1_OnCardInserted( x, y ) \
#define SDHC_PDD_SetDataTransferWidth( x, y ) \
( SDHC_PROCTL = ( SDHC_PROCTL & ~SDHC_PROCTL_DTW_MASK ) | SDHC_PROCTL_DTW( y ) )
#define SDHC_PDD_ClearInterruptFlags( x, y ) \
( SDHC_IRQSTAT = y )
#define SDHC_PDD_GetAutoCMD12ErrorFlags( x ) \
( SDHC_AC12ERR )
#define SDHC_PDD_GetCommandResponse( x, y ) \
( memcpy( (uint32*)&y, (const void*) \
( SDHC_BASE + offsetof( SDHC_Type, CMDRSP[0] ) ) , 16 ) )
#define SDHC_PDD_GetDMAAddress( x ) \
( SDHC_DSADDR & SDHC_DSADDR_DSADDR_MASK )
#define SDHC_PDD_GetInterruptFlags( x ) \
( SDHC_IRQSTAT )
#define SDHC_PDD_ResetDevice( x ) \
#define SDHC_PDD_SetADMAAddress( x, y ) \
( SDHC_ADSADDR = (uint32)y )
#define SDHC_PDD_SetBlockCount( x, y ) \
( SDHC_BLKATTR = ( SDHC_BLKATTR & ~SDHC_BLKATTR_BLKCNT_MASK ) | \
SDHC_BLKATTR_BLKCNT( y ) )
#define SDHC_PDD_SetBlockSize( x, y ) \
( SDHC_BLKATTR = ( SDHC_BLKATTR & ~SDHC_BLKATTR_BLKSIZE_MASK ) | \
SDHC_BLKATTR_BLKSIZE( y ) )
#define SDHC_PDD_SetSDHCClockDivisor( x, y ) \
( SDHC_SYSCTL = ( SDHC_SYSCTL & ~SDHC_SYSCTL_DVS_MASK ) | \
SDHC_SYSCTL_DVS( y ) )
#define SDHC_PDD_SetSDHCClockFrequency( x, y ) \
( SDHC_SYSCTL = ( SDHC_SYSCTL & ~SDHC_SYSCTL_SDCLKFS_MASK ) | \
SDHC_SYSCTL_SDCLKFS( y ) )
LDD_SDHC1_TDeviceData* SDHC1_Init(LDD_TUserData *UserDataPtr);
/*
** ===================================================================
** Method : SDHC1_Init (component SDHC_LDD)
**
** Description :
** Initializes the device. Allocates memory for the device data
** structure, allocates interrupt vectors and sets interrupt
** priority, sets pin routing, sets timing, etc. If the
** property <"Enable device"> is set to "yes" then the device
** is also enabled (see the description of the <Enable> method).
** In this case the <Enable> method is not necessary and need
** not to be generated. This method can be called only once.
** Before the second call of Init the <Deinit> method must be
** called first.
** Parameters :
** NAME - DESCRIPTION
** * UserDataPtr - Pointer to user data
** structure pointer.
** Returns :
** --- - Pointer to the device data structure.
** ===================================================================
*/
void SDHC1_Deinit(LDD_SDHC1_TDeviceData *DeviceDataPtr);
/*
** ===================================================================
** Method : SDHC1_Deinit (component SDHC_LDD)
**
** Description :
** Deinitializes the device. Switches off the device, frees the
** device data structure memory, interrupt vectors, etc.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Returns : Nothing
** ===================================================================
*/
LDD_TError SDHC1_Enable(LDD_SDHC1_TDeviceData *DeviceDataPtr);
/*
** ===================================================================
** Method : SDHC1_Enable (component SDHC_LDD)
**
** Description :
** Enables the component.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - OK
** ===================================================================
*/
LDD_TError SDHC1_Disable(LDD_SDHC1_TDeviceData *DeviceDataPtr);
/*
** ===================================================================
** Method : SDHC1_Disable (component SDHC_LDD)
**
** Description :
** Disables the component.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - OK
** ===================================================================
*/
LDD_TError SDHC1_SetEventMask(LDD_SDHC1_TDeviceData *DeviceDataPtr, LDD_TEventMask EventMask);
/*
** ===================================================================
** Method : SDHC1_SetEventMask (component SDHC_LDD)
**
** Description :
** Sets event mask.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** EventMask - Event mask
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - OK
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_PARAM_MASK - Invalid mask (one or more
** event is unmaskable)
** ===================================================================
*/
LDD_TEventMask SDHC1_GetEventMask(LDD_SDHC1_TDeviceData *DeviceDataPtr);
/*
** ===================================================================
** Method : SDHC1_GetEventMask (component SDHC_LDD)
**
** Description :
** Returns event mask.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Returns :
** --- - Current event mask.
** ===================================================================
*/
LDD_TError SDHC1_DetectCards(LDD_SDHC1_TDeviceData *DeviceDataPtr);
/*
** ===================================================================
** Method : SDHC1_DetectCards (component SDHC_LDD)
**
** Description :
** Detects newly inserted and removed cards. The OnCardInserted
** event will be called for every new card and the
** OnCardRemoved event will be called for every removed card.
** This method should be used when card detection pin is not
** available.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Card detection started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_BUSY - Another card operation is in
** progress
** ===================================================================
*/
LDD_TError SDHC1_SelectCard(LDD_SDHC1_TDeviceData *DeviceDataPtr, uint8_t Id);
/*
** ===================================================================
** Method : SDHC1_SelectCard (component SDHC_LDD)
**
** Description :
** Selects a card by its identification number. All further
** operations will apply to this card. Special card
** identification number <compId>_NO_CARD will deselect the
** active card.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Id - Card identification number passed by the
** OnCardInserted event parameter.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Card selection started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_BUSY - Another card operation is in
** progress
** ERR_PARAM_ID - Invalid card ID
** ===================================================================
*/
LDD_TError SDHC1_GetCardInfo(LDD_SDHC1_TDeviceData *DeviceDataPtr, LDD_SDHC_TCardInfo *InfoPtr);
/*
** ===================================================================
** Method : SDHC1_GetCardInfo (component SDHC_LDD)
**
** Description :
** Returns card information about the selected card. Method
** call starts the card information retrieval process. After
** the card information has been received, the OnFinished event
** is called (the component state changes to idle) and the
** information is stored in the specified variable.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** * InfoPtr - Pointer to a variable, where card
** information will be stored.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Card information retrieval started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_BUSY - Another card operation is in
** progress
** ===================================================================
*/
LDD_TError SDHC1_TransferBlocks(LDD_SDHC1_TDeviceData *DeviceDataPtr, LDD_SDHC_TTransferOperation Operation, uint32_t Address, LDD_SDHC_TBufferDesc *BufferDescListPtr, uint16_t BufferDescCount);
/*
** ===================================================================
** Method : SDHC1_TransferBlocks (component SDHC_LDD)
**
** Description :
** Initiates a data block transfer on the selected card.
** Transfer can be a read or write operation depending on the
** transfer operation parameter. Read operation reads data
** blocks from the specified address on a memory card and
** stores their content into buffers specified by the buffer
** descriptor list. Write operation writes data blocks
** specified by the buffer descriptor list to a card memory on
** the specified address. Data blocks should be the same size
** and the block size should be supported by the memory card.
** Buffer addresses should be aligned to a hardware specific
** address boundary.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Operation - Transfer operation
** Address - Card memory address. Byte address
** in case of standard capacity memory cards,
** 512 byte block number in case of high
** capacity memory cards.
** * BufferDescListPtr - Pointer to
** data block buffer descriptor list.
** BufferDescCount - Data block buffer
** descriptor list item count
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Transfer started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_BUSY - Another card operation is in
** progress
** ERR_PARAM_ADDRESS - Invalid buffer address
** (one or more buffer address from the list
** of buffer descriptors is misaligned)
** ERR_PARAM_BUFFER_COUNT - Buffer count
** exceeds the internal buffer table size
** ===================================================================
*/
LDD_TError SDHC1_EraseBlocks(LDD_SDHC1_TDeviceData *DeviceDataPtr, uint32_t Address, uint32_t Size);
/*
** ===================================================================
** Method : SDHC1_EraseBlocks (component SDHC_LDD)
**
** Description :
** Initiates a memory area erasion on the selected card. Erase
** operation erases a memory area of the specified size from
** the specified address on a memory card.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Address - Address of the beginning of the
** erased area. Byte address in case of
** standard capacity memory card and 512 byte
** block number in case of high capacity
** memory card.
** Size - Size of the erased area. Byte size in
** case of standard capacity memory card and
** 512 byte blocks count in case of high
** capacity memory card.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Erasing started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_BUSY - Another card operation is in
** progress
** ===================================================================
*/
LDD_TError SDHC1_SetDataWidth(LDD_SDHC1_TDeviceData *DeviceDataPtr, uint8_t Width);
/*
** ===================================================================
** Method : SDHC1_SetDataWidth (component SDHC_LDD)
**
** Description :
** Initiates a data width setup. The card has to support the
** specified data width.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Width - Data bus bit count.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Setup started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_BUSY - Another card operation is in
** progress
** ERR_PARAM_WIDTH - Invalid data width
** ===================================================================
*/
LDD_TError SDHC1_SelectBusClock(LDD_SDHC1_TDeviceData *DeviceDataPtr, SDHC1_TBusClock Frequency);
/*
** ===================================================================
** Method : SDHC1_SelectBusClock (component SDHC_LDD)
**
** Description :
** Initiates a SD bus clock frequency change. If the frequency
** is for high speed mode, initiates a high speed mode setup on
** the selected card. The card has to support the specified bus
** clock frequency. This method is enabled only if a list of
** bus clock frequencies is specified.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Frequency - Bus clock frequency identifier.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Setup started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_BUSY - Another card operation is in
** progress
** ===================================================================
*/
LDD_TError SDHC1_SetVoltage(LDD_SDHC1_TDeviceData *DeviceDataPtr, LDD_SDHC_TVoltage Voltage);
/*
** ===================================================================
** Method : SDHC1_SetVoltage (component SDHC_LDD)
**
** Description :
** Initiates a bus voltage change. The card has to support the
** specified voltage.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Voltage - Voltage identifier.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Setup started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_BUSY - Another card operation is in
** progress
** ===================================================================
*/
LDD_TError SDHC1_SetWriteProtection(LDD_SDHC1_TDeviceData *DeviceDataPtr, LDD_SDHC_TWriteProtectType Type, uint32_t Address, bool Protected);
/*
** ===================================================================
** Method : SDHC1_SetWriteProtection (component SDHC_LDD)
**
** Description :
** Initiates a write protection setup for the selected card. If
** the write protection type is LDD_SDHC_GROUP, write
** protection will be set for the addressed write protection
** group. Write protection group size is contained within the
** card information structure. If the write protection type is
** LDD_SDHC_CARD, write protection will be set for the whole
** card and the address parameter will be ignored. Only a whole
** card write protection clear can remove this protection. The
** card has to support write protection.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Type - Write protection type.
** Address - Address of the write protection
** group, if the write protection type is
** LDD_SDHC_GROUP. Byte address in case of
** standard capacity memory card and 512 byte
** block number in case of high capacity
** memory card.
** Protected - Indicates whether the
** addressed write protection group or card
** should be write protected or not.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Setup started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_BUSY - Another card operation is in
** progress
** ===================================================================
*/
LDD_TError SDHC1_GetWriteProtection(LDD_SDHC1_TDeviceData *DeviceDataPtr, uint32_t Address, uint32_t *MaskPtr);
/*
** ===================================================================
** Method : SDHC1_GetWriteProtection (component SDHC_LDD)
**
** Description :
** Initiates a write protection mask retrieval for the selected
** card. After the mask has been received, the OnFinished event
** is called and the mask is stored in the specified variable.
** The returned mask contains a bit mask of write protected
** write protection groups starting at the specified address.
** The least significant bit represents the status of the first
** write protection group. Bits of write protection groups out
** of range are cleared. The card has to support write
** protection.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Address - Address of the write protection
** group. Byte address in case of standard
** capacity memory card and 512 byte block
** number in case of high capacity memory card.
** * MaskPtr - Pointer to a variable, where the
** write protection groups status mask will be
** stored.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Write protection mask retrieval
** started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_BUSY - Another card operation is in
** progress
** ===================================================================
*/
LDD_TError SDHC1_CancelOperation(LDD_SDHC1_TDeviceData *DeviceDataPtr);
/*
** ===================================================================
** Method : SDHC1_CancelOperation (component SDHC_LDD)
**
** Description :
** Initiates a cancelation of the ongoing operation. The
** OnFinished event will be called for the stopped operation.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - Operation cancelation started
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_NOTAVAIL - No operation is in progress
** ===================================================================
*/
LDD_SDHC_TStatus SDHC1_GetStatus(LDD_SDHC1_TDeviceData *DeviceDataPtr);
/*
** ===================================================================
** Method : SDHC1_GetStatus (component SDHC_LDD)
**
** Description :
** Returns the current component status, specifying the ongoing
** operation.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** Returns :
** --- - Component status.
** ===================================================================
*/
LDD_SDHC_TError SDHC1_GetError(LDD_SDHC1_TDeviceData *DeviceDataPtr, uint32_t *AddressPtr);
/*
** ===================================================================
** Method : SDHC1_GetError (component SDHC_LDD)
**
** Description :
** Returns the last error code and the memory address where the
** error occurred (if applicable).
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to the device
** data structure.
** * AddressPtr - Pointer to a variable, where
** the error address will be stored.
** Returns :
** --- - The last error code.
** ===================================================================
*/
LDD_TError SDHC1_ConnectPin(LDD_SDHC1_TDeviceData *DeviceDataPtr, LDD_TPinMask PinMask);
/*
** ===================================================================
** Method : SDHC1_ConnectPin (component SDHC_LDD)
**
** Description :
** This method reconnects the requested pins associated with
** the selected peripheral in the component. This method is
** only available for CPU derivatives and peripherals that
** support the runtime pin sharing with other internal on-chip
** peripherals.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Pointer to device data
** structure.
** PinMask - Mask for the requested pins. The
** peripheral pins are reconnected according
** to this mask.
** Returns :
** --- -
** Error code, possible values:
** ERR_OK - OK
** ERR_PARAM_MASK - Invalid pin mask
** ===================================================================
*/
LDD_TError SDHC1_SetOperationMode(LDD_SDHC1_TDeviceData *DeviceDataPtr, LDD_TDriverOperationMode OperationMode, LDD_TCallback ModeChangeCallback, LDD_TCallbackParam *ModeChangeCallbackParamPtr);
/*
** ===================================================================
** Method : SDHC1_SetOperationMode (component SDHC_LDD)
**
** Description :
** This method requests to change the component's operation
** mode. Upon a request to change the operation mode, the
** component will finish a pending job first and then notify a
** caller that an operation mode has been changed. When no job
** is pending (ERR_OK), the component changes an operation mode
** immediately and notify a caller about this change.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Device data structure
** pointer returned by Init method.
** OperationMode - Requested driver
** operation mode.
** ModeChangeCallback - Callback to
** notify the upper layer once a mode has been
** changed.
** * ModeChangeCallbackParamPtr
** - Pointer to callback parameter to notify
** the upper layer once a mode has been
** changed.
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_DISABLED - The component is disabled
** ERR_SPEED - The component does not work in
** the active clock configuration
** ERR_PARAM_MODE - Invalid operation mode
** ERR_BUSY - A job is pending
** ===================================================================
*/
LDD_TDriverState SDHC1_GetDriverState(LDD_SDHC1_TDeviceData *DeviceDataPtr);
/*
** ===================================================================
** Method : SDHC1_GetDriverState (component SDHC_LDD)
**
** Description :
** This method returns the current driver status.
** Parameters :
** NAME - DESCRIPTION
** * DeviceDataPtr - Device data structure
** pointer returned by Init method.
** Returns :
** --- -
** The current driver status mask. The
** following status masks defined in PE_LDD.h
** can be used to check the current driver
** status:
** PE_LDD_DRIVER_DISABLED_IN_CLOCK_CONFIGURATION -
** Driver is disabled in the current speed
** mode
** PE_LDD_DRIVER_DISABLED_BY_USER - Driver is
** disabled by the user
** PE_LDD_DRIVER_BUSY - Driver is in the BUSY
** state
** ===================================================================
*/
/* {FreeRTOS RTOS Adapter} ISR function prototype */
//PE_ISR(SDHC1_Interrupt);
/*
** ===================================================================
** Method : SDHC1_Interrupt (component SDHC_LDD)
**
** Description :
** The method services the interrupt of the selected peripheral(s)
** and eventually invokes event(s) of the component.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
/* END SDHC1 */
#endif
/* ifndef SDHC1_H */
/*
** ###################################################################
**
** This file was created by Processor Expert 5.3 [05.01]
** for the Freescale Kinetis series of microcontrollers.
**
** ###################################################################
*/
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