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parent
bba4732fa9
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Subproject commit 4b2987f141be103e6708a54ecadcec790d51ef8f
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Subproject commit 568b68e12a2df30d583b81b581547f96c92e5f95
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21548
alphax_8ch.kicad_pcb
21548
alphax_8ch.kicad_pcb
File diff suppressed because it is too large
Load Diff
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@ -86,20 +86,26 @@
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"rule_severities": {
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"annular_width": "error",
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"clearance": "error",
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"connection_width": "warning",
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"copper_edge_clearance": "error",
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"copper_sliver": "warning",
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"footprint": "error",
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"footprint_type_mismatch": "error",
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"hole_clearance": "ignore",
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"hole_near_hole": "error",
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"invalid_outline": "error",
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"isolated_copper": "warning",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"length_out_of_range": "error",
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"lib_footprint_issues": "warning",
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"lib_footprint_mismatch": "warning",
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"malformed_courtyard": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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@ -109,9 +115,14 @@
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"padstack": "error",
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"pth_inside_courtyard": "ignore",
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"shorting_items": "error",
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"silk_edge_clearance": "warning",
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"silk_over_copper": "ignore",
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"silk_overlap": "ignore",
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"skew_out_of_range": "error",
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"solder_mask_bridge": "error",
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"starved_thermal": "error",
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"text_height": "warning",
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"text_thickness": "warning",
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"through_hole_pad_without_hole": "error",
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"too_many_vias": "error",
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"track_dangling": "error",
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@ -120,7 +131,6 @@
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "ignore",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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"rule_severitieslegacy_courtyards_overlap": true,
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@ -130,18 +140,63 @@
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"allow_microvias": false,
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"max_error": 0.005,
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"min_clearance": 0.15,
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"min_connection": 0.0,
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"min_copper_edge_clearance": 0.09999999999999999,
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"min_hole_clearance": 0.25,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.508,
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"min_microvia_drill": 0.127,
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"min_resolved_spokes": 2,
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"min_silk_clearance": 0.0,
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"min_text_height": 0.7999999999999999,
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"min_text_thickness": 0.08,
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"min_through_hole_diameter": 0.29999,
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"min_track_width": 0.15,
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"min_via_annular_width": 0.15,
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"min_via_diameter": 0.3,
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"solder_mask_to_copper_clearance": 0.0,
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"use_height_for_length_calcs": true
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},
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"teardrop_options": [
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{
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"td_allow_use_two_tracks": true,
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"td_curve_segcount": 5,
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"td_on_pad_in_zone": false,
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"td_onpadsmd": true,
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"td_onroundshapesonly": false,
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"td_ontrackend": false,
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"td_onviapad": true
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}
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],
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"teardrop_parameters": [
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_round_shape",
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"td_width_to_size_filter_ratio": 0.9
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},
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_rect_shape",
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"td_width_to_size_filter_ratio": 0.9
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},
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_track_end",
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"td_width_to_size_filter_ratio": 0.9
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}
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],
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"track_widths": [
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0.0,
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0.2,
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@ -411,7 +466,7 @@
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"net_settings": {
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"classes": [
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.2,
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"diff_pair_via_gap": 0.25,
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@ -425,10 +480,10 @@
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"track_width": 0.2,
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"via_diameter": 0.6,
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"via_drill": 0.3,
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"wire_width": 6.0
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"wire_width": 6
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},
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.254,
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"diff_pair_via_gap": 0.25,
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@ -437,16 +492,15 @@
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"microvia_diameter": 0.508,
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"microvia_drill": 0.127,
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"name": "GND",
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"nets": [],
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.2,
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"via_diameter": 0.6,
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"via_drill": 0.3,
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"wire_width": 6.0
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"wire_width": 6
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},
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 0.4,
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"diff_pair_gap": 0.2,
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"diff_pair_via_gap": 0.25,
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@ -455,50 +509,20 @@
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"microvia_diameter": 0.508,
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"microvia_drill": 0.127,
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"name": "IN_CRANK",
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"nets": [],
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.2,
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"via_diameter": 0.6,
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"via_drill": 0.3,
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"wire_width": 6.0
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"wire_width": 6
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}
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],
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"meta": {
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"version": 2
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"version": 3
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},
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"net_colors": null,
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"netclass_assignments": null,
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"netclass_patterns": [
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{
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"netclass": "GND",
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"pattern": "GND"
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},
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{
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"netclass": "IN_CRANK",
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"pattern": "/A8"
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},
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{
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"netclass": "IN_CRANK",
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"pattern": "/A9"
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},
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{
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"netclass": "IN_CRANK",
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"pattern": "/IN_CAM_VR+"
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},
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{
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"netclass": "IN_CRANK",
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"pattern": "/IN_CAM_VR-"
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},
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{
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"netclass": "IN_CRANK",
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"pattern": "/IN_CRANK+"
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},
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{
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"netclass": "IN_CRANK",
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"pattern": "/IN_CRANK-"
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}
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]
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"netclass_patterns": []
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},
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"pcbnew": {
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"last_paths": {
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@ -1 +1 @@
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Subproject commit a31162bae51eef4db6cbb0029feda82056933ad8
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Subproject commit 03bf83bc41a94493b883625a0875a41faefd3c53
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@ -1 +1 @@
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Subproject commit c9ba42002ae083f678554f688317d031e38309e6
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Subproject commit a94ebd3fa1f0d04625b9a04affa1ee210521cff5
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