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HAL - Fix issues with HAL USB timeouts on fast processors. 

* Occurs more frequently on >=480Mhz CPUs.
* Occurs more frequently on RELEASE builds due to optimizations.

Patch comes from here:

https://community.st.com/s/question/0D50X0000BCMFx0SQH/usbhs-ulpi-on-stm32h750

Confirmed fixed on H730 @ 520Mhz RELEASE build.
This commit is contained in:
Dominic Clifton 2021-05-30 18:56:18 +02:00
parent a708578c5e
commit 115a584713
1 changed files with 47 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

62
lib/main/STM32H7/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_usb.c
View File

@ -49,6 +49,27 @@
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/** @defgroup USB_OTG_GRSTCTL_AHBIDL_TIMEOUT_MS AHB master idle timeout
* @{
*/
#define USB_OTG_GRSTCTL_AHBIDL_TIMEOUT_MS ((uint32_t)50U)
/** @defgroup USB_OTG_GRSTCTL_CSRST_TIMEOUT_MS Core soft reset timeout
* @{
*/
#define USB_OTG_GRSTCTL_CSRST_TIMEOUT_MS ((uint32_t)10U)
/** @defgroup USB_OTG_GRSTCTL_TXFFLSH_TIMEOUT_MS Tx FIFO flush timeout
* @{
*/
#define USB_OTG_GRSTCTL_TXFFLSH_TIMEOUT_MS ((uint32_t)5U)
/** @defgroup USB_OTG_GRSTCTL_RXFFLSH_TIMEOUT_MS Rx FIFO flush timeout
* @{
*/
#define USB_OTG_GRSTCTL_RXFFLSH_TIMEOUT_MS ((uint32_t)5U)
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
@ -432,18 +453,21 @@ HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cf
*/
HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
{
uint32_t count = 0U;
uint32_t tickstart;
USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6));
do
/* Get tick */
tickstart = HAL_GetTick();
/* Wait for AHB master IDLE state. */
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH)
{
if (++count > 200000U)
if ((HAL_GetTick() - tickstart) > USB_OTG_GRSTCTL_TXFFLSH_TIMEOUT_MS)
{
return HAL_TIMEOUT;
}
}
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
return HAL_OK;
}
@ -455,18 +479,21 @@ HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
*/
HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
{
uint32_t count = 0;
uint32_t tickstart;
USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
do
/* Get tick */
tickstart = HAL_GetTick();
/* Wait for AHB master IDLE state. */
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH)
{
if (++count > 200000U)
if ((HAL_GetTick() - tickstart) > USB_OTG_GRSTCTL_RXFFLSH_TIMEOUT_MS)
{
return HAL_TIMEOUT;
}
}
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
return HAL_OK;
}
@ -1295,30 +1322,33 @@ HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uin
*/
static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
{
uint32_t count = 0U;
uint32_t tickstart;
/* Get tick */
tickstart = HAL_GetTick();
/* Wait for AHB master IDLE state. */
do
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U)
{
if (++count > 200000U)
if ((HAL_GetTick() - tickstart) > USB_OTG_GRSTCTL_AHBIDL_TIMEOUT_MS)
{
return HAL_TIMEOUT;
}
}
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
/* Core Soft Reset */
count = 0U;
USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
do
/* Get tick */
tickstart = HAL_GetTick();
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST)
{
if (++count > 200000U)
if ((HAL_GetTick() - tickstart) > USB_OTG_GRSTCTL_CSRST_TIMEOUT_MS)
{
return HAL_TIMEOUT;
}
}
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
return HAL_OK;
}