[H7] Add USE_DMA_SPEC to H7
This commit is contained in:
parent
c6041e1ed6
commit
16f2392458
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@ -648,7 +648,7 @@ static const char *dumpPgValue(const clivalue_t *value, dumpFlags_t dumpMask, co
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#ifdef DEBUG
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if (!pg) {
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cliPrintLinef("VALUE %s ERROR", value->name);
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return; // if it's not found, the pgn shouldn't be in the value table!
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return headingStr; // if it's not found, the pgn shouldn't be in the value table!
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}
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#endif
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@ -5064,9 +5064,12 @@ static void cliDmaopt(char *cmdline)
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if (!pch) {
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if (entry) {
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printPeripheralDmaoptDetails(entry, index, *optaddr, true, DUMP_MASTER, cliDumpPrintLinef);
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} else {
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}
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#if defined(USE_TIMER_MGMT)
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else {
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printTimerDmaoptDetails(ioTag, timer, orgval, true, DUMP_MASTER, cliDumpPrintLinef);
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}
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#endif
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return;
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} else if (strcasecmp(pch, "list") == 0) {
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@ -69,7 +69,7 @@ typedef struct adcDevice_s {
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#else
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DMA_Channel_TypeDef* DMAy_Channelx;
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#endif
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#endif
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#endif // !defined(USE_DMA_SPEC)
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#if defined(STM32F7) || defined(STM32H7)
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ADC_HandleTypeDef ADCHandle;
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DMA_HandleTypeDef DmaHandle;
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@ -28,6 +28,7 @@
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#include "build/debug.h"
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#include "drivers/dma_reqmap.h"
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#include "drivers/io.h"
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#include "drivers/io_impl.h"
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#include "drivers/rcc.h"
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@ -82,20 +83,26 @@ const adcDevice_t adcHardware[ADCDEV_COUNT] = {
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{
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.ADCx = ADC1_INSTANCE,
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.rccADC = RCC_AHB1(ADC12),
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#if !defined(USE_DMA_SPEC)
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.DMAy_Streamx = ADC1_DMA_STREAM,
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.channel = DMA_REQUEST_ADC1,
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#endif
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},
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{ .ADCx = ADC2_INSTANCE,
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.rccADC = RCC_AHB1(ADC12),
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#if !defined(USE_DMA_SPEC)
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.DMAy_Streamx = ADC2_DMA_STREAM,
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.channel = DMA_REQUEST_ADC2,
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#endif
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},
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// ADC3 can be serviced by BDMA also, but we settle for DMA1 or 2 (for now).
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{
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.ADCx = ADC3_INSTANCE,
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.rccADC = RCC_AHB4(ADC3),
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#if !defined(USE_DMA_SPEC)
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.DMAy_Streamx = ADC3_DMA_STREAM,
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.channel = DMA_REQUEST_ADC3,
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#endif
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}
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};
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@ -266,7 +273,11 @@ void adcInit(const adcConfig_t *config)
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// Find an ADC device that can handle this input pin
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for (dev = 0; dev < ADCDEV_COUNT; dev++) {
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if (!(adcDevice[dev].ADCx && adcDevice[dev].DMAy_Streamx)) {
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if (!adcDevice[dev].ADCx
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#ifndef USE_DMA_SPEC
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|| !adcDevice[dev].DMAy_Streamx
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#endif
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) {
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// Instance not activated
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continue;
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}
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@ -357,11 +368,22 @@ void adcInit(const adcConfig_t *config)
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// Configure DMA for this ADC peripheral
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dmaIdentifier_e dmaIdentifier = dmaGetIdentifier(adc->DMAy_Streamx);
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dmaInit(dmaIdentifier, OWNER_ADC, RESOURCE_INDEX(dev));
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dmaIdentifier_e dmaIdentifier;
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#ifdef USE_DMA_SPEC
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const dmaChannelSpec_t *dmaSpec = dmaGetChannelSpecByPeripheral(DMA_PERIPH_ADC, dev, config->dmaopt[dev]);
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if (!dmaSpec) {
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return;
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}
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adc->DmaHandle.Instance = dmaSpec->ref;
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adc->DmaHandle.Init.Request = dmaSpec->channel;
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dmaIdentifier = dmaGetIdentifier(dmaSpec->ref);
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#else
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dmaIdentifier = dmaGetIdentifier(adc->DMAy_Streamx);
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adc->DmaHandle.Instance = adc->DMAy_Streamx;
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adc->DmaHandle.Init.Request = adc->channel;
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#endif
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adc->DmaHandle.Init.Direction = DMA_PERIPH_TO_MEMORY;
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adc->DmaHandle.Init.PeriphInc = DMA_PINC_DISABLE;
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adc->DmaHandle.Init.MemInc = DMA_MINC_ENABLE;
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@ -374,6 +396,8 @@ void adcInit(const adcConfig_t *config)
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HAL_DMA_DeInit(&adc->DmaHandle);
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HAL_DMA_Init(&adc->DmaHandle);
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dmaInit(dmaIdentifier, OWNER_ADC, RESOURCE_INDEX(dev));
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// Associate the DMA handle
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@ -37,16 +37,149 @@
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typedef struct dmaPeripheralMapping_s {
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dmaPeripheral_e device;
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uint8_t index;
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#if defined(STM32H7)
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uint8_t dmaRequest;
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#else
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dmaChannelSpec_t channelSpec[MAX_PERIPHERAL_DMA_OPTIONS];
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#endif
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} dmaPeripheralMapping_t;
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typedef struct dmaTimerMapping_s {
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TIM_TypeDef *tim;
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uint8_t channel;
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#if defined(STM32H7)
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uint8_t dmaRequest;
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#else
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dmaChannelSpec_t channelSpec[MAX_TIMER_DMA_OPTIONS];
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#endif
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} dmaTimerMapping_t;
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#if defined(STM32F4) || defined(STM32F7)
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#if defined(STM32H7)
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#define REQMAP_SGL(periph) { DMA_PERIPH_ ## periph, 0, DMA_REQUEST_ ## periph }
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#define REQMAP(periph, device) { DMA_PERIPH_ ## periph, periph ## DEV_ ## device, DMA_REQUEST_ ## periph ## device }
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#define REQMAP_DIR(periph, device, dir) { DMA_PERIPH_ ## periph ## _ ## dir, periph ## DEV_ ## device, DMA_REQUEST_ ## periph ## device ## _ ## dir }
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// Resolve UART/UART mess
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#define DMA_REQUEST_UART1_RX DMA_REQUEST_USART1_RX
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#define DMA_REQUEST_UART1_TX DMA_REQUEST_USART1_TX
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#define DMA_REQUEST_UART2_RX DMA_REQUEST_USART2_RX
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#define DMA_REQUEST_UART2_TX DMA_REQUEST_USART2_TX
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#define DMA_REQUEST_UART3_RX DMA_REQUEST_USART3_RX
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#define DMA_REQUEST_UART3_TX DMA_REQUEST_USART3_TX
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#define DMA_REQUEST_UART6_RX DMA_REQUEST_USART6_RX
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#define DMA_REQUEST_UART6_TX DMA_REQUEST_USART6_TX
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static const dmaPeripheralMapping_t dmaPeripheralMapping[] = {
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#ifdef USE_SPI
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REQMAP_DIR(SPI, 1, TX),
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REQMAP_DIR(SPI, 1, RX),
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REQMAP_DIR(SPI, 2, TX),
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REQMAP_DIR(SPI, 2, RX),
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REQMAP_DIR(SPI, 3, TX),
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REQMAP_DIR(SPI, 3, RX),
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REQMAP_DIR(SPI, 4, TX),
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REQMAP_DIR(SPI, 4, RX),
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// REQMAP_DIR(SPI, 5, TX), // Not available in smaller packages
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// REQMAP_DIR(SPI, 5, TX), // ditto
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// REQMAP_DIR(SPI, 6, TX), // SPI6 is on BDMA (todo)
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// REQMAP_DIR(SPI, 6, TX), // ditto
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#endif // USE_SPI
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#ifdef USE_ADC
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REQMAP(ADC, 1),
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REQMAP(ADC, 2),
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REQMAP(ADC, 3),
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#endif
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#ifdef USE_SDCARD_SDIO
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REQMAP_SGL(SDIO),
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#endif
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#ifdef USE_UART
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REQMAP_DIR(UART, 1, TX),
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REQMAP_DIR(UART, 1, RX),
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REQMAP_DIR(UART, 2, TX),
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REQMAP_DIR(UART, 2, RX),
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REQMAP_DIR(UART, 3, TX),
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REQMAP_DIR(UART, 3, RX),
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REQMAP_DIR(UART, 4, TX),
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REQMAP_DIR(UART, 4, RX),
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REQMAP_DIR(UART, 5, TX),
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REQMAP_DIR(UART, 5, RX),
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REQMAP_DIR(UART, 6, TX),
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REQMAP_DIR(UART, 6, RX),
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REQMAP_DIR(UART, 7, TX),
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REQMAP_DIR(UART, 7, RX),
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REQMAP_DIR(UART, 8, TX),
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REQMAP_DIR(UART, 8, RX),
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#endif
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};
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#undef REQMAP
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#undef REQMAP_SGL
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#undef REQMAP_DIR
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#define TC(chan) DEF_TIM_CHANNEL(CH_ ## chan)
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#define REQMAP_TIM(tim, chan) { tim, TC(chan), DEF_TIM_DMA_REQ__BTCH_ ## tim ## _ ## chan }
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static const dmaTimerMapping_t dmaTimerMapping[] = {
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REQMAP_TIM(TIM1, CH1),
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REQMAP_TIM(TIM1, CH2),
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REQMAP_TIM(TIM1, CH3),
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REQMAP_TIM(TIM1, CH4),
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REQMAP_TIM(TIM2, CH1),
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REQMAP_TIM(TIM2, CH2),
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REQMAP_TIM(TIM2, CH3),
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REQMAP_TIM(TIM2, CH4),
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REQMAP_TIM(TIM3, CH1),
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REQMAP_TIM(TIM3, CH2),
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REQMAP_TIM(TIM3, CH3),
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REQMAP_TIM(TIM3, CH4),
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REQMAP_TIM(TIM4, CH1),
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REQMAP_TIM(TIM4, CH2),
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REQMAP_TIM(TIM4, CH3),
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REQMAP_TIM(TIM5, CH1),
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REQMAP_TIM(TIM5, CH2),
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REQMAP_TIM(TIM5, CH3),
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REQMAP_TIM(TIM5, CH4),
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REQMAP_TIM(TIM8, CH1),
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REQMAP_TIM(TIM8, CH2),
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REQMAP_TIM(TIM8, CH3),
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REQMAP_TIM(TIM8, CH4),
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REQMAP_TIM(TIM15, CH1),
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REQMAP_TIM(TIM16, CH1),
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REQMAP_TIM(TIM17, CH1),
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};
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#undef TC
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#undef REQMAP_TIM
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#define DMA(d, s) { DMA_CODE(d, s, 0), DMA ## d ## _Stream ## s, 0 }
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static dmaChannelSpec_t dmaChannelSpec[MAX_PERIPHERAL_DMA_OPTIONS] = {
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DMA(1, 0),
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DMA(1, 1),
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DMA(1, 2),
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DMA(1, 3),
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DMA(1, 4),
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DMA(1, 5),
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DMA(1, 6),
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DMA(1, 7),
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DMA(2, 0),
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DMA(2, 1),
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DMA(2, 2),
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DMA(2, 3),
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DMA(2, 4),
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DMA(2, 5),
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DMA(2, 6),
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DMA(2, 7),
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};
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#undef DMA
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#elif defined(STM32F4) || defined(STM32F7)
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#if defined(STM32F4)
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#define DMA(d, s, c) { DMA_CODE(d, s, c), DMA ## d ## _Stream ## s, DMA_Channel_ ## c }
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@ -225,6 +358,18 @@ static const dmaTimerMapping_t dmaTimerMapping[] = {
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#undef DMA
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#endif
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#if defined(STM32H7)
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static void dmaSetupRequest(dmaChannelSpec_t *dmaSpec, uint8_t request)
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{
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// Setup request as channel
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dmaSpec->channel = request;
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// Insert DMA request into code
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dmaCode_t code = dmaSpec->code;
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dmaSpec->code = DMA_CODE(DMA_CODE_CONTROLLER(code), DMA_CODE_STREAM(code), dmaSpec->channel);
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}
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#endif
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const dmaChannelSpec_t *dmaGetChannelSpecByPeripheral(dmaPeripheral_e device, uint8_t index, int8_t opt)
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{
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if (opt < 0 || opt >= MAX_PERIPHERAL_DMA_OPTIONS) {
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@ -233,9 +378,17 @@ const dmaChannelSpec_t *dmaGetChannelSpecByPeripheral(dmaPeripheral_e device, ui
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for (unsigned i = 0 ; i < ARRAYLEN(dmaPeripheralMapping) ; i++) {
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const dmaPeripheralMapping_t *periph = &dmaPeripheralMapping[i];
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#if defined(STM32H7)
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if (periph->device == device && periph->index == index) {
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dmaChannelSpec_t *dmaSpec = &dmaChannelSpec[opt];
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dmaSetupRequest(dmaSpec, periph->dmaRequest);
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return dmaSpec;
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}
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#else
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if (periph->device == device && periph->index == index && periph->channelSpec[opt].ref) {
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return &periph->channelSpec[opt];
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}
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#endif
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}
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return NULL;
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@ -250,6 +403,18 @@ dmaoptValue_t dmaoptByTag(ioTag_t ioTag)
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}
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}
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#else
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#if defined(STM32H7)
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const timerHardware_t *timhw = timerGetByTag(ioTag);
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if (timhw && timhw->dmaRefConfigured && timhw->dmaChannelConfigured) {
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// Reverse lookup dmaopt from dmaRefConfigured by utilizing dmaChannelSpec array
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unsigned opt;
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for (opt = 0; opt < ARRAYLEN(dmaChannelSpec); opt++) {
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if (timhw->dmaRefConfigured == dmaChannelSpec[opt].ref) {
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return (dmaoptValue_t)opt;
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}
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}
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}
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#endif
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UNUSED(ioTag);
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#endif
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@ -264,9 +429,17 @@ const dmaChannelSpec_t *dmaGetChannelSpecByTimerValue(TIM_TypeDef *tim, uint8_t
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for (unsigned i = 0 ; i < ARRAYLEN(dmaTimerMapping) ; i++) {
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const dmaTimerMapping_t *timerMapping = &dmaTimerMapping[i];
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#if defined(STM32H7)
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if (timerMapping->tim == tim && timerMapping->channel == channel) {
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dmaChannelSpec_t *dmaSpec = &dmaChannelSpec[dmaopt];
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dmaSetupRequest(dmaSpec, timerMapping->dmaRequest);
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return dmaSpec;
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}
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#else
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if (timerMapping->tim == tim && timerMapping->channel == channel && timerMapping->channelSpec[dmaopt].ref) {
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return &timerMapping->channelSpec[dmaopt];
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}
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#endif
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}
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return NULL;
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@ -287,6 +460,9 @@ dmaoptValue_t dmaGetOptionByTimer(const timerHardware_t *timer)
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for (unsigned i = 0 ; i < ARRAYLEN(dmaTimerMapping); i++) {
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const dmaTimerMapping_t *timerMapping = &dmaTimerMapping[i];
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if (timerMapping->tim == timer->tim && timerMapping->channel == timer->channel) {
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#if defined(STM32H7)
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return timerMapping->dmaRequest;
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#else
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for (unsigned j = 0; j < MAX_TIMER_DMA_OPTIONS; j++) {
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const dmaChannelSpec_t *dma = &timerMapping->channelSpec[j];
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if (dma->ref == timer->dmaRefConfigured
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@ -297,7 +473,7 @@ dmaoptValue_t dmaGetOptionByTimer(const timerHardware_t *timer)
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return j;
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}
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}
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#endif
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}
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}
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@ -55,8 +55,13 @@ typedef int8_t dmaoptValue_t;
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#define DMA_OPT_UNUSED (-1)
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#if defined(STM32H7)
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#define MAX_PERIPHERAL_DMA_OPTIONS 16
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#define MAX_TIMER_DMA_OPTIONS 16
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#else
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#define MAX_PERIPHERAL_DMA_OPTIONS 2
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#define MAX_TIMER_DMA_OPTIONS 3
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#endif
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dmaoptValue_t dmaoptByTag(ioTag_t ioTag);
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const dmaChannelSpec_t *dmaGetChannelSpecByPeripheral(dmaPeripheral_e device, uint8_t index, int8_t opt);
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@ -27,6 +27,7 @@
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#ifdef USE_DSHOT
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#include "drivers/dma_reqmap.h"
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#include "drivers/io.h"
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#include "timer.h"
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#include "pwm_output.h"
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@ -152,7 +153,13 @@ void pwmWriteDshotInt(uint8_t index, uint16_t value)
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}
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}
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if (!motor->timerHardware || !motor->timerHardware->dmaRef) {
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if (!motor->timerHardware
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#ifndef USE_DMA_SPEC
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// When USE_DMA_SPEC is in effect, motor->timerHardware remains NULL if valid DMA is not assigned.
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|| !motor->timerHardware->dmaRef
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#endif
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)
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{
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return;
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}
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@ -228,16 +235,27 @@ static void motor_DMA_IRQHandler(dmaChannelDescriptor_t* descriptor)
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void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t motorIndex, motorPwmProtocolTypes_e pwmProtocolType, uint8_t output)
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{
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DMA_Stream_TypeDef *dmaRef;
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DMA_Stream_TypeDef *dmaRef = NULL;
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uint32_t dmaChannel;
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#ifdef USE_DMA_SPEC
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const dmaChannelSpec_t *dmaSpec = dmaGetChannelSpecByTimer(timerHardware);
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if (dmaSpec) {
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dmaRef = dmaSpec->ref;
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dmaChannel = dmaSpec->channel;
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}
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#else
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dmaRef = timerHardware->dmaRef;
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dmaChannel = timerHardware->dmaChannel;
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#endif
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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dmaRef = timerHardware->dmaTimUPRef;
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} else
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#endif
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{
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dmaRef = timerHardware->dmaRef;
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dmaChannel = timerHardware->dmaTimUPChannel;
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}
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#endif
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if (dmaRef == NULL) {
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return;
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@ -352,7 +370,7 @@ P - High - High -
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/* Set hdma_tim instance */
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motor->timer->hdma_tim.Instance = timerHardware->dmaTimUPRef;
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motor->timer->hdma_tim.Init.Request = timerHardware->dmaTimUPRequest;
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motor->timer->hdma_tim.Init.Request = timerHardware->dmaTimUPChannel;
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/* Link hdma_tim to hdma[TIM_DMA_ID_UPDATE] (update) */
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__HAL_LINKDMA(&motor->timer->timHandle, hdma[TIM_DMA_ID_UPDATE], motor->timer->hdma_tim);
|
||||
|
@ -379,8 +397,8 @@ P - High - High -
|
|||
motor->dmaBuffer[DSHOT_DMA_BUFFER_SIZE-2] = 0; // XXX Is this necessary? -> probably.
|
||||
motor->dmaBuffer[DSHOT_DMA_BUFFER_SIZE-1] = 0; // XXX Is this necessary?
|
||||
|
||||
motor->hdma_tim.Instance = timerHardware->dmaRef;
|
||||
motor->hdma_tim.Init.Request = timerHardware->dmaChannel;
|
||||
motor->hdma_tim.Instance = dmaRef;
|
||||
motor->hdma_tim.Init.Request = dmaChannel;
|
||||
|
||||
/* Link hdma_tim to hdma[x] (channelx) */
|
||||
__HAL_LINKDMA(&motor->TimHandle, hdma[motor->timerDmaIndex], motor->hdma_tim);
|
||||
|
@ -402,7 +420,7 @@ P - High - High -
|
|||
} else
|
||||
#endif
|
||||
{
|
||||
dmaIdentifier_e identifier = dmaGetIdentifier(timerHardware->dmaRef);
|
||||
dmaIdentifier_e identifier = dmaGetIdentifier(dmaRef);
|
||||
dmaInit(identifier, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
|
||||
dmaSetHandler(identifier, motor_DMA_IRQHandler, NVIC_BUILD_PRIORITY(1, 2), motorIndex);
|
||||
}
|
||||
|
|
|
@ -123,10 +123,8 @@ typedef struct timerHardware_s {
|
|||
#else
|
||||
#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
|
||||
DMA_Stream_TypeDef *dmaRef;
|
||||
|
||||
// For F4 and F7, dmaChannel is channel for DMA1 or DMA2.
|
||||
// For H7, dmaChannel is DMA request number for DMAMUX
|
||||
|
||||
uint32_t dmaChannel; // XXX Can be much smaller (e.g. uint8_t)
|
||||
#else
|
||||
DMA_Channel_TypeDef *dmaRef;
|
||||
|
@ -137,11 +135,10 @@ typedef struct timerHardware_s {
|
|||
// TIMUP
|
||||
#ifdef STM32F3
|
||||
DMA_Channel_TypeDef *dmaTimUPRef;
|
||||
#elif defined(STM32H7)
|
||||
DMA_Stream_TypeDef *dmaTimUPRef;
|
||||
uint8_t dmaTimUPRequest;
|
||||
#else
|
||||
DMA_Stream_TypeDef *dmaTimUPRef;
|
||||
// For F4 and F7, dmaTimUpChannel is channel for DMA1 or DMA2.
|
||||
// For H7, dmaTimUpChannel is DMA request number for DMAMUX
|
||||
uint32_t dmaTimUPChannel;
|
||||
#endif
|
||||
uint8_t dmaTimUPIrqHandler;
|
||||
|
|
|
@ -104,6 +104,7 @@
|
|||
#define USE_GYRO_DATA_ANALYSE
|
||||
#define USE_ADC_INTERNAL
|
||||
#define USE_USB_CDC_HID
|
||||
#define USE_DMA_SPEC
|
||||
#endif
|
||||
|
||||
#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
|
||||
|
|
Loading…
Reference in New Issue