Removed trailing spaces from device drivers
This commit is contained in:
parent
c00e49ed72
commit
19901730fc
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@ -270,7 +270,7 @@ void mpuIntExtiInit(void)
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EXTIEnable(mpuIntIO, true);
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#endif
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#endif
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mpuExtiInitDone = true;
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}
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@ -120,7 +120,7 @@
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typedef bool (*mpuReadRegisterFunc)(uint8_t reg, uint8_t length, uint8_t* data);
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typedef bool (*mpuWriteRegisterFunc)(uint8_t reg, uint8_t data);
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typedef void(*mpuResetFuncPtr)(void);
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typedef void(*mpuResetFuncPtr)(void);
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typedef struct mpuConfiguration_s {
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uint8_t gyroReadXRegister; // Y and Z must registers follow this, 2 words each
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@ -97,7 +97,7 @@ void mpu6500GyroInit(uint8_t lpf)
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mpuConfiguration.write(MPU_RA_INT_PIN_CFG, MPU6500_BIT_INT_ANYRD_2CLEAR); // INT_ANYRD_2CLEAR
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#endif
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delay(15);
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#ifdef USE_MPU_DATA_READY_SIGNAL
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mpuConfiguration.write(MPU_RA_INT_ENABLE, MPU6500_BIT_RAW_RDY_EN); // RAW_RDY_EN interrupt enable
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#endif
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@ -82,9 +82,9 @@ bool icm20689SpiDetect(void)
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{
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uint8_t tmp;
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uint8_t attemptsRemaining = 20;
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icm20689SpiInit();
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spiSetDivisor(ICM20689_SPI_INSTANCE, SPI_CLOCK_INITIALIZATON); //low speed
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icm20689WriteRegister(MPU_RA_PWR_MGMT_1, ICM20689_BIT_RESET);
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@ -145,7 +145,7 @@ void icm20689AccInit(acc_t *acc)
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void icm20689GyroInit(uint8_t lpf)
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{
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mpuIntExtiInit();
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spiSetDivisor(ICM20689_SPI_INSTANCE, SPI_CLOCK_INITIALIZATON);
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mpuConfiguration.write(MPU_RA_PWR_MGMT_1, ICM20689_BIT_RESET);
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@ -170,7 +170,7 @@ void icm20689GyroInit(uint8_t lpf)
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mpuConfiguration.write(MPU_RA_INT_PIN_CFG, 0x10); // INT_ANYRD_2CLEAR, BYPASS_EN
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delay(15);
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#ifdef USE_MPU_DATA_READY_SIGNAL
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mpuConfiguration.write(MPU_RA_INT_ENABLE, 0x01); // RAW_RDY_EN interrupt enable
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#endif
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@ -204,7 +204,7 @@ bool mpu6000SpiDetect(void)
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return false;
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}
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static void mpu6000AccAndGyroInit(void)
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static void mpu6000AccAndGyroInit(void)
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{
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if (mpuSpi6000InitDone) {
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return;
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@ -84,9 +84,9 @@ bool mpu6500SpiDetect(void)
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mpu6500ReadRegister(MPU_RA_WHO_AM_I, 1, &tmp);
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if (tmp == MPU6500_WHO_AM_I_CONST ||
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tmp == MPU9250_WHO_AM_I_CONST ||
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tmp == ICM20608G_WHO_AM_I_CONST ||
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if (tmp == MPU6500_WHO_AM_I_CONST ||
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tmp == MPU9250_WHO_AM_I_CONST ||
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tmp == ICM20608G_WHO_AM_I_CONST ||
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tmp == ICM20602_WHO_AM_I_CONST) {
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return true;
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}
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@ -103,13 +103,13 @@ void mpu6500SpiGyroInit(uint8_t lpf)
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{
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spiSetDivisor(MPU6500_SPI_INSTANCE, SPI_CLOCK_SLOW);
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delayMicroseconds(1);
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mpu6500GyroInit(lpf);
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// Disable Primary I2C Interface
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mpu6500WriteRegister(MPU_RA_USER_CTRL, MPU6500_BIT_I2C_IF_DIS);
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delay(100);
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spiSetDivisor(MPU6500_SPI_INSTANCE, SPI_CLOCK_FAST);
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delayMicroseconds(1);
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}
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@ -19,7 +19,7 @@
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bool mpu6500SpiDetect(void);
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void mpu6500SpiAccInit(acc_t *acc);
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void mpu6500SpiAccInit(acc_t *acc);
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void mpu6500SpiGyroInit(uint8_t lpf);
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bool mpu6500SpiAccDetect(acc_t *acc);
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@ -39,7 +39,7 @@
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#endif
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const adcDevice_t adcHardware[] = {
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{ .ADCx = ADC1, .rccADC = RCC_APB2(ADC1), .DMAy_Channelx = DMA1_Channel1 }
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{ .ADCx = ADC1, .rccADC = RCC_APB2(ADC1), .DMAy_Channelx = DMA1_Channel1 }
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};
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ADCDevice adcDeviceByInstance(ADC_TypeDef *instance)
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@ -64,7 +64,7 @@ const adcTagMap_t adcTagMap[] = {
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{ DEFIO_TAG_E__PA6, ADC_Channel_6 }, // ADC12
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{ DEFIO_TAG_E__PA7, ADC_Channel_7 }, // ADC12
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{ DEFIO_TAG_E__PB0, ADC_Channel_8 }, // ADC12
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{ DEFIO_TAG_E__PB1, ADC_Channel_9 }, // ADC12
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{ DEFIO_TAG_E__PB1, ADC_Channel_9 }, // ADC12
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};
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// Driver for STM32F103CB onboard ADC
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@ -39,11 +39,11 @@
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#endif
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const adcDevice_t adcHardware[] = {
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{ .ADCx = ADC1, .rccADC = RCC_AHB(ADC12), .DMAy_Channelx = DMA1_Channel1 },
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{ .ADCx = ADC1, .rccADC = RCC_AHB(ADC12), .DMAy_Channelx = DMA1_Channel1 },
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#ifdef ADC24_DMA_REMAP
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{ .ADCx = ADC2, .rccADC = RCC_AHB(ADC12), .DMAy_Channelx = DMA2_Channel3 }
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{ .ADCx = ADC2, .rccADC = RCC_AHB(ADC12), .DMAy_Channelx = DMA2_Channel3 }
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#else
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{ .ADCx = ADC2, .rccADC = RCC_AHB(ADC12), .DMAy_Channelx = DMA2_Channel1 }
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{ .ADCx = ADC2, .rccADC = RCC_AHB(ADC12), .DMAy_Channelx = DMA2_Channel1 }
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#endif
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};
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@ -38,8 +38,8 @@
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#endif
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const adcDevice_t adcHardware[] = {
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{ .ADCx = ADC1, .rccADC = RCC_APB2(ADC1), .DMAy_Streamx = DMA2_Stream4, .channel = DMA_Channel_0 },
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//{ .ADCx = ADC2, .rccADC = RCC_APB2(ADC2), .DMAy_Streamx = DMA2_Stream1, .channel = DMA_Channel_0 }
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{ .ADCx = ADC1, .rccADC = RCC_APB2(ADC1), .DMAy_Streamx = DMA2_Stream4, .channel = DMA_Channel_0 },
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//{ .ADCx = ADC2, .rccADC = RCC_APB2(ADC2), .DMAy_Streamx = DMA2_Stream1, .channel = DMA_Channel_0 }
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};
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/* note these could be packed up for saving space */
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@ -127,7 +127,7 @@ void adcInit(drv_adc_config_t *init)
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if (device == ADCINVALID)
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return;
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adcDevice_t adc = adcHardware[device];
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adcDevice_t adc = adcHardware[device];
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for (uint8_t i = 0; i < ADC_CHANNEL_COUNT; i++) {
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if (!adcConfig[i].tag)
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@ -37,13 +37,13 @@
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#define ADC_INSTANCE ADC1
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#endif
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const adcDevice_t adcHardware[] = {
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const adcDevice_t adcHardware[] = {
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{ .ADCx = ADC1, .rccADC = RCC_APB2(ADC1), .DMAy_Streamx = DMA2_Stream4, .channel = DMA_CHANNEL_0 },
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//{ .ADCx = ADC2, .rccADC = RCC_APB2(ADC2), .DMAy_Streamx = DMA2_Stream1, .channel = DMA_Channel_0 }
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//{ .ADCx = ADC2, .rccADC = RCC_APB2(ADC2), .DMAy_Streamx = DMA2_Stream1, .channel = DMA_Channel_0 }
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};
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/* note these could be packed up for saving space */
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const adcTagMap_t adcTagMap[] = {
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const adcTagMap_t adcTagMap[] = {
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/*
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{ DEFIO_TAG_E__PF3, ADC_Channel_9 },
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{ DEFIO_TAG_E__PF4, ADC_Channel_14 },
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@ -142,15 +142,15 @@ static bool i2cHandleHardwareFailure(I2CDevice device)
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bool i2cWriteBuffer(I2CDevice device, uint8_t addr_, uint8_t reg_, uint8_t len_, uint8_t *data)
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{
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HAL_StatusTypeDef status;
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if(reg_ == 0xFF)
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status = HAL_I2C_Master_Transmit(&i2cHandle[device].Handle,addr_ << 1,data, len_, I2C_DEFAULT_TIMEOUT);
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else
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status = HAL_I2C_Mem_Write(&i2cHandle[device].Handle,addr_ << 1, reg_, I2C_MEMADD_SIZE_8BIT,data, len_, I2C_DEFAULT_TIMEOUT);
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if(status != HAL_OK)
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return i2cHandleHardwareFailure(device);
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return true;
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}
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@ -162,15 +162,15 @@ bool i2cWrite(I2CDevice device, uint8_t addr_, uint8_t reg_, uint8_t data)
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bool i2cRead(I2CDevice device, uint8_t addr_, uint8_t reg_, uint8_t len, uint8_t* buf)
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{
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HAL_StatusTypeDef status;
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if(reg_ == 0xFF)
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status = HAL_I2C_Master_Receive(&i2cHandle[device].Handle,addr_ << 1,buf, len, I2C_DEFAULT_TIMEOUT);
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else
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status = HAL_I2C_Mem_Read(&i2cHandle[device].Handle,addr_ << 1, reg_, I2C_MEMADD_SIZE_8BIT,buf, len, I2C_DEFAULT_TIMEOUT);
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if(status != HAL_OK)
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return i2cHandleHardwareFailure(device);
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return true;
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}
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@ -228,7 +228,7 @@ void i2cInit(I2CDevice device)
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#endif
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// Init I2C peripheral
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HAL_I2C_DeInit(&i2cHandle[device].Handle);
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i2cHandle[device].Handle.Instance = i2cHardwareMap[device].dev;
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/// TODO: HAL check if I2C timing is correct
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i2cHandle[device].Handle.Init.Timing = 0x00B01B59;
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@ -239,12 +239,12 @@ void i2cInit(I2CDevice device)
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i2cHandle[device].Handle.Init.OwnAddress2 = 0x0;
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i2cHandle[device].Handle.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
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i2cHandle[device].Handle.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
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HAL_I2C_Init(&i2cHandle[device].Handle);
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/* Enable the Analog I2C Filter */
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HAL_I2CEx_ConfigAnalogFilter(&i2cHandle[device].Handle,I2C_ANALOGFILTER_ENABLE);
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HAL_NVIC_SetPriority(i2cHardwareMap[device].er_irq, NVIC_PRIORITY_BASE(NVIC_PRIO_I2C_ER), NVIC_PRIORITY_SUB(NVIC_PRIO_I2C_ER));
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HAL_NVIC_EnableIRQ(i2cHardwareMap[device].er_irq);
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HAL_NVIC_SetPriority(i2cHardwareMap[device].ev_irq, NVIC_PRIORITY_BASE(NVIC_PRIO_I2C_EV), NVIC_PRIORITY_SUB(NVIC_PRIO_I2C_EV));
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@ -83,7 +83,7 @@ void i2cInit(I2CDevice device)
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I2C_TypeDef *I2Cx;
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I2Cx = i2c->dev;
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IO_t scl = IOGetByTag(i2c->scl);
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IO_t sda = IOGetByTag(i2c->sda);
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@ -109,7 +109,7 @@ void i2cInit(I2CDevice device)
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I2C_Init(I2Cx, &i2cInit);
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I2C_StretchClockCmd(I2Cx, ENABLE);
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I2C_Cmd(I2Cx, ENABLE);
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}
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@ -286,11 +286,11 @@ bool spiTransfer(SPI_TypeDef *instance, uint8_t *out, const uint8_t *in, int len
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HAL_StatusTypeDef status;
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#define SPI_DEFAULT_TIMEOUT 10
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if(!out) // Tx only
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{
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status = HAL_SPI_Transmit(&spiHandle[spiDeviceByInstance(instance)].Handle, (uint8_t *)in, len, SPI_DEFAULT_TIMEOUT);
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}
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}
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else if(!in) // Rx only
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{
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status = HAL_SPI_Receive(&spiHandle[spiDeviceByInstance(instance)].Handle, out, len, SPI_DEFAULT_TIMEOUT);
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@ -299,10 +299,10 @@ bool spiTransfer(SPI_TypeDef *instance, uint8_t *out, const uint8_t *in, int len
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{
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status = HAL_SPI_TransmitReceive(&spiHandle[spiDeviceByInstance(instance)].Handle, (uint8_t *)in, out, len, SPI_DEFAULT_TIMEOUT);
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}
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if( status != HAL_OK)
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spiTimeoutUserCallback(instance);
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return true;
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}
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@ -93,7 +93,7 @@ resourceOwner_e dmaGetOwner(dmaIdentifier_e identifier)
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uint8_t dmaGetResourceIndex(dmaIdentifier_e identifier)
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{
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return dmaDescriptors[identifier].resourceIndex;
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return dmaDescriptors[identifier].resourceIndex;
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}
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dmaIdentifier_e dmaGetIdentifier(const DMA_Channel_TypeDef* channel)
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@ -103,5 +103,5 @@ dmaIdentifier_e dmaGetIdentifier(const DMA_Channel_TypeDef* channel)
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return i;
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}
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}
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return 0;
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return 0;
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}
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@ -84,7 +84,7 @@ typedef enum {
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#define DMA_IT_FEIF ((uint32_t)0x00000001)
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dmaIdentifier_e dmaGetIdentifier(const DMA_Stream_TypeDef* stream);
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#else
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typedef enum {
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@ -95,7 +95,7 @@ typedef enum {
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DMA1_CH5_HANDLER,
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DMA1_CH6_HANDLER,
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DMA1_CH7_HANDLER,
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#if defined(STM32F3) || defined(STM32F10X_CL)
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#if defined(STM32F3) || defined(STM32F10X_CL)
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DMA2_CH1_HANDLER,
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DMA2_CH2_HANDLER,
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DMA2_CH3_HANDLER,
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@ -112,7 +112,7 @@ resourceOwner_e dmaGetOwner(dmaIdentifier_e identifier)
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uint8_t dmaGetResourceIndex(dmaIdentifier_e identifier)
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{
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return dmaDescriptors[identifier].resourceIndex;
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return dmaDescriptors[identifier].resourceIndex;
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}
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dmaIdentifier_e dmaGetIdentifier(const DMA_Stream_TypeDef* stream)
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@ -104,7 +104,7 @@ resourceOwner_e dmaGetOwner(dmaIdentifier_e identifier)
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uint8_t dmaGetResourceIndex(dmaIdentifier_e identifier)
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{
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return dmaDescriptors[identifier].resourceIndex;
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return dmaDescriptors[identifier].resourceIndex;
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}
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dmaIdentifier_e dmaGetIdentifier(const DMA_Stream_TypeDef* stream)
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@ -205,16 +205,16 @@ static bool m25p16_readIdentification()
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*/
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bool m25p16_init(ioTag_t csTag)
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{
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/*
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if we have already detected a flash device we can simply exit
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/*
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if we have already detected a flash device we can simply exit
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TODO: change the init param in favour of flash CFG when ParamGroups work is done
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then cs pin can be specified in hardware_revision.c or config.c (dependent on revision).
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*/
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if (geometry.sectors) {
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return true;
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}
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if (csTag) {
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m25p16CsPin = IOGetByTag(csTag);
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} else {
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@ -20,14 +20,14 @@
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#include "platform.h"
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#ifdef INVERTER
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#ifdef INVERTER
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#include "io.h"
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#include "io_impl.h"
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#include "inverter.h"
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/*
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/*
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TODO: move this to support multiple inverters on different UARTs etc
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possibly move to put it in the UART driver itself.
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*/
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@ -22,31 +22,31 @@
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#define WS2811_LED_STRIP_LENGTH 32
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#define WS2811_BITS_PER_LED 24
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// for 50us delay
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#define WS2811_DELAY_BUFFER_LENGTH 42
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#define WS2811_DELAY_BUFFER_LENGTH 42
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#define WS2811_DATA_BUFFER_SIZE (WS2811_BITS_PER_LED * WS2811_LED_STRIP_LENGTH)
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// number of bytes needed is #LEDs * 24 bytes + 42 trailing bytes)
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#define WS2811_DMA_BUFFER_SIZE (WS2811_DATA_BUFFER_SIZE + WS2811_DELAY_BUFFER_LENGTH)
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#define WS2811_DMA_BUFFER_SIZE (WS2811_DATA_BUFFER_SIZE + WS2811_DELAY_BUFFER_LENGTH)
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#if defined(STM32F40_41xxx)
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#define WS2811_TIMER_HZ 84000000
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#define WS2811_TIMER_PERIOD 104
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// timer compare value for logical 1
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#define BIT_COMPARE_1 67
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#define BIT_COMPARE_1 67
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// timer compare value for logical 0
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#define BIT_COMPARE_0 33
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#define BIT_COMPARE_0 33
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#elif defined(STM32F7)
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// timer compare value for logical 1
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#define BIT_COMPARE_1 76
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#define BIT_COMPARE_1 76
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// timer compare value for logical 0
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#define BIT_COMPARE_0 38
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#define BIT_COMPARE_0 38
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#else
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#define WS2811_TIMER_HZ 24000000
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#define WS2811_TIMER_PERIOD 29
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// timer compare value for logical 1
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#define BIT_COMPARE_1 17
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#define BIT_COMPARE_1 17
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// timer compare value for logical 0
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#define BIT_COMPARE_0 9
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#define BIT_COMPARE_0 9
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#endif
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void ws2811LedStripInit(ioTag_t ioTag);
|
||||
|
|
|
@ -72,7 +72,7 @@ void ws2811LedStripHardwareInit(ioTag_t ioTag)
|
|||
|
||||
/* Compute the prescaler value */
|
||||
uint16_t prescalerValue = (uint16_t) (SystemCoreClock / WS2811_TIMER_HZ) - 1;
|
||||
|
||||
|
||||
/* Time base configuration */
|
||||
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
|
||||
TIM_TimeBaseStructure.TIM_Period = WS2811_TIMER_PERIOD; // 800kHz
|
||||
|
|
|
@ -43,7 +43,7 @@ static void pwmOCConfig(TIM_TypeDef *tim, uint8_t channel, uint16_t value, uint8
|
|||
|
||||
TIM_OCStructInit(&TIM_OCInitStructure);
|
||||
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
|
||||
|
||||
|
||||
if (output & TIMER_OUTPUT_N_CHANNEL) {
|
||||
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
|
||||
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset;
|
||||
|
@ -162,7 +162,7 @@ void motorInit(const motorConfig_t *motorConfig, uint16_t idlePulse, uint8_t mot
|
|||
pwmWriteFuncPtr pwmWritePtr;
|
||||
bool useUnsyncedPwm = motorConfig->useUnsyncedPwm;
|
||||
bool isDigital = false;
|
||||
|
||||
|
||||
switch (motorConfig->motorPwmProtocol) {
|
||||
default:
|
||||
case PWM_TYPE_ONESHOT125:
|
||||
|
@ -202,16 +202,16 @@ void motorInit(const motorConfig_t *motorConfig, uint16_t idlePulse, uint8_t mot
|
|||
if (!useUnsyncedPwm && !isDigital) {
|
||||
pwmCompleteWritePtr = pwmCompleteOneshotMotorUpdate;
|
||||
}
|
||||
|
||||
|
||||
for (int motorIndex = 0; motorIndex < MAX_SUPPORTED_MOTORS && motorIndex < motorCount; motorIndex++) {
|
||||
const ioTag_t tag = motorConfig->ioTags[motorIndex];
|
||||
|
||||
|
||||
if (!tag) {
|
||||
break;
|
||||
}
|
||||
|
||||
const timerHardware_t *timerHardware = timerGetByTag(tag, TIM_USE_ANY);
|
||||
|
||||
|
||||
if (timerHardware == NULL) {
|
||||
/* flag failure and disable ability to arm */
|
||||
break;
|
||||
|
@ -227,10 +227,10 @@ void motorInit(const motorConfig_t *motorConfig, uint16_t idlePulse, uint8_t mot
|
|||
continue;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
IOInit(motors[motorIndex].io, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
|
||||
IOConfigGPIO(motors[motorIndex].io, IOCFG_AF_PP);
|
||||
|
||||
|
||||
motors[motorIndex].pwmWritePtr = pwmWritePtr;
|
||||
if (useUnsyncedPwm) {
|
||||
const uint32_t hz = timerMhzCounter * 1000000;
|
||||
|
@ -242,7 +242,7 @@ void motorInit(const motorConfig_t *motorConfig, uint16_t idlePulse, uint8_t mot
|
|||
}
|
||||
}
|
||||
|
||||
bool pwmIsSynced(void)
|
||||
bool pwmIsSynced(void)
|
||||
{
|
||||
return pwmCompleteWritePtr != NULL;
|
||||
}
|
||||
|
@ -264,23 +264,23 @@ void servoInit(const servoConfig_t *servoConfig)
|
|||
{
|
||||
for (uint8_t servoIndex = 0; servoIndex < MAX_SUPPORTED_SERVOS; servoIndex++) {
|
||||
const ioTag_t tag = servoConfig->ioTags[servoIndex];
|
||||
|
||||
|
||||
if (!tag) {
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
servos[servoIndex].io = IOGetByTag(tag);
|
||||
|
||||
|
||||
IOInit(servos[servoIndex].io, OWNER_SERVO, RESOURCE_INDEX(servoIndex));
|
||||
IOConfigGPIO(servos[servoIndex].io, IOCFG_AF_PP);
|
||||
|
||||
|
||||
const timerHardware_t *timer = timerGetByTag(tag, TIM_USE_ANY);
|
||||
|
||||
|
||||
if (timer == NULL) {
|
||||
/* flag failure and disable ability to arm */
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
pwmOutConfig(&servos[servoIndex], timer, PWM_TIMER_MHZ, 1000000 / servoConfig->servoPwmRate, servoConfig->servoCenterPulse);
|
||||
servos[servoIndex].enabled = true;
|
||||
}
|
||||
|
|
|
@ -41,7 +41,7 @@ static void pwmOCConfig(TIM_TypeDef *tim, uint8_t channel, uint16_t value, uint8
|
|||
{
|
||||
TIM_HandleTypeDef* Handle = timerFindTimerHandle(tim);
|
||||
if(Handle == NULL) return;
|
||||
|
||||
|
||||
TIM_OC_InitTypeDef TIM_OCInitStructure;
|
||||
TIM_OCInitStructure.OCMode = TIM_OCMODE_PWM2;
|
||||
TIM_OCInitStructure.Pulse = value;
|
||||
|
@ -50,7 +50,7 @@ static void pwmOCConfig(TIM_TypeDef *tim, uint8_t channel, uint16_t value, uint8
|
|||
TIM_OCInitStructure.OCIdleState = TIM_OCIDLESTATE_SET;
|
||||
TIM_OCInitStructure.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||
TIM_OCInitStructure.OCFastMode = TIM_OCFAST_DISABLE;
|
||||
|
||||
|
||||
HAL_TIM_PWM_ConfigChannel(Handle, &TIM_OCInitStructure, channel);
|
||||
//HAL_TIM_PWM_Start(Handle, channel);
|
||||
}
|
||||
|
@ -173,7 +173,7 @@ void motorInit(const motorConfig_t *motorConfig, uint16_t idlePulse, uint8_t mot
|
|||
pwmWriteFuncPtr pwmWritePtr;
|
||||
bool useUnsyncedPwm = motorConfig->useUnsyncedPwm;
|
||||
bool isDigital = false;
|
||||
|
||||
|
||||
switch (motorConfig->motorPwmProtocol) {
|
||||
default:
|
||||
case PWM_TYPE_ONESHOT125:
|
||||
|
@ -213,16 +213,16 @@ void motorInit(const motorConfig_t *motorConfig, uint16_t idlePulse, uint8_t mot
|
|||
if (!useUnsyncedPwm && !isDigital) {
|
||||
pwmCompleteWritePtr = pwmCompleteOneshotMotorUpdate;
|
||||
}
|
||||
|
||||
|
||||
for (int motorIndex = 0; motorIndex < MAX_SUPPORTED_MOTORS && motorIndex < motorCount; motorIndex++) {
|
||||
const ioTag_t tag = motorConfig->ioTags[motorIndex];
|
||||
|
||||
|
||||
if (!tag) {
|
||||
break;
|
||||
}
|
||||
|
||||
const timerHardware_t *timerHardware = timerGetByTag(tag, TIMER_OUTPUT_ENABLED);
|
||||
|
||||
|
||||
if (timerHardware == NULL) {
|
||||
/* flag failure and disable ability to arm */
|
||||
break;
|
||||
|
@ -237,11 +237,11 @@ void motorInit(const motorConfig_t *motorConfig, uint16_t idlePulse, uint8_t mot
|
|||
}
|
||||
#endif
|
||||
motors[motorIndex].io = IOGetByTag(tag);
|
||||
|
||||
|
||||
IOInit(motors[motorIndex].io, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
|
||||
//IOConfigGPIO(motors[motorIndex].io, IOCFG_AF_PP);
|
||||
IOConfigGPIOAF(motors[motorIndex].io, IOCFG_AF_PP, timerHardware->alternateFunction);
|
||||
|
||||
|
||||
motors[motorIndex].pwmWritePtr = pwmWritePtr;
|
||||
if (useUnsyncedPwm) {
|
||||
const uint32_t hz = timerMhzCounter * 1000000;
|
||||
|
@ -253,7 +253,7 @@ void motorInit(const motorConfig_t *motorConfig, uint16_t idlePulse, uint8_t mot
|
|||
}
|
||||
}
|
||||
|
||||
bool pwmIsSynced(void)
|
||||
bool pwmIsSynced(void)
|
||||
{
|
||||
return pwmCompleteWritePtr != NULL;
|
||||
}
|
||||
|
@ -275,24 +275,24 @@ void servoInit(const servoConfig_t *servoConfig)
|
|||
{
|
||||
for (uint8_t servoIndex = 0; servoIndex < MAX_SUPPORTED_SERVOS; servoIndex++) {
|
||||
const ioTag_t tag = servoConfig->ioTags[servoIndex];
|
||||
|
||||
|
||||
if (!tag) {
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
servos[servoIndex].io = IOGetByTag(tag);
|
||||
|
||||
|
||||
IOInit(servos[servoIndex].io, OWNER_SERVO, RESOURCE_INDEX(servoIndex));
|
||||
//IOConfigGPIO(servos[servoIndex].io, IOCFG_AF_PP);
|
||||
|
||||
|
||||
const timerHardware_t *timer = timerGetByTag(tag, TIMER_OUTPUT_ENABLED);
|
||||
IOConfigGPIOAF(servos[servoIndex].io, IOCFG_AF_PP, timer->alternateFunction);
|
||||
|
||||
|
||||
if (timer == NULL) {
|
||||
/* flag failure and disable ability to arm */
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
pwmOutConfig(&servos[servoIndex], timer, PWM_TIMER_MHZ, 1000000 / servoConfig->servoPwmRate, servoConfig->servoCenterPulse);
|
||||
servos[servoIndex].enabled = true;
|
||||
}
|
||||
|
|
|
@ -83,7 +83,7 @@ void pwmWriteDigital(uint8_t index, uint16_t value)
|
|||
packet <<= 1;
|
||||
}
|
||||
|
||||
DMA_SetCurrDataCounter(motor->timerHardware->dmaChannel, MOTOR_DMA_BUFFER_SIZE);
|
||||
DMA_SetCurrDataCounter(motor->timerHardware->dmaChannel, MOTOR_DMA_BUFFER_SIZE);
|
||||
DMA_Cmd(motor->timerHardware->dmaChannel, ENABLE);
|
||||
}
|
||||
|
||||
|
@ -94,10 +94,10 @@ void pwmCompleteDigitalMotorUpdate(uint8_t motorCount)
|
|||
if (!pwmMotorsEnabled) {
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
for (int i = 0; i < dmaMotorTimerCount; i++) {
|
||||
TIM_SetCounter(dmaMotorTimers[i].timer, 0);
|
||||
TIM_DMACmd(dmaMotorTimers[i].timer, dmaMotorTimers[i].timerDmaSources, ENABLE);
|
||||
TIM_DMACmd(dmaMotorTimers[i].timer, dmaMotorTimers[i].timerDmaSources, ENABLE);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -118,18 +118,18 @@ void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t
|
|||
|
||||
motorDmaOutput_t * const motor = &dmaMotors[motorIndex];
|
||||
motor->timerHardware = timerHardware;
|
||||
|
||||
|
||||
TIM_TypeDef *timer = timerHardware->tim;
|
||||
const IO_t motorIO = IOGetByTag(timerHardware->tag);
|
||||
|
||||
|
||||
const uint8_t timerIndex = getTimerIndex(timer);
|
||||
const bool configureTimer = (timerIndex == dmaMotorTimerCount-1);
|
||||
|
||||
|
||||
IOInit(motorIO, OWNER_MOTOR, 0);
|
||||
IOConfigGPIOAF(motorIO, IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_UP), timerHardware->alternateFunction);
|
||||
|
||||
if (configureTimer) {
|
||||
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
|
||||
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
|
||||
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
|
||||
|
||||
RCC_ClockCmd(timerRCC(timer), ENABLE);
|
||||
|
@ -155,7 +155,7 @@ void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t
|
|||
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||
TIM_TimeBaseInit(timer, &TIM_TimeBaseStructure);
|
||||
}
|
||||
|
||||
|
||||
TIM_OCStructInit(&TIM_OCInitStructure);
|
||||
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
|
||||
if (timerHardware->output & TIMER_OUTPUT_N_CHANNEL) {
|
||||
|
@ -177,16 +177,16 @@ void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t
|
|||
TIM_CCxCmd(timer, timerHardware->channel, TIM_CCx_Enable);
|
||||
|
||||
if (configureTimer) {
|
||||
TIM_CtrlPWMOutputs(timer, ENABLE);
|
||||
TIM_ARRPreloadConfig(timer, ENABLE);
|
||||
TIM_Cmd(timer, ENABLE);
|
||||
TIM_CtrlPWMOutputs(timer, ENABLE);
|
||||
TIM_ARRPreloadConfig(timer, ENABLE);
|
||||
TIM_Cmd(timer, ENABLE);
|
||||
}
|
||||
|
||||
DMA_Channel_TypeDef *channel = timerHardware->dmaChannel;
|
||||
|
||||
dmaInit(timerHardware->dmaIrqHandler, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
|
||||
dmaSetHandler(timerHardware->dmaIrqHandler, motor_DMA_IRQHandler, NVIC_BUILD_PRIORITY(1, 2), motorIndex);
|
||||
|
||||
|
||||
DMA_Cmd(channel, DISABLE);
|
||||
DMA_DeInit(channel);
|
||||
DMA_StructInit(&DMA_InitStructure);
|
||||
|
|
|
@ -81,7 +81,7 @@ void pwmWriteDigital(uint8_t index, uint16_t value)
|
|||
packet <<= 1;
|
||||
}
|
||||
|
||||
DMA_SetCurrDataCounter(motor->timerHardware->dmaStream, MOTOR_DMA_BUFFER_SIZE);
|
||||
DMA_SetCurrDataCounter(motor->timerHardware->dmaStream, MOTOR_DMA_BUFFER_SIZE);
|
||||
DMA_Cmd(motor->timerHardware->dmaStream, ENABLE);
|
||||
}
|
||||
|
||||
|
@ -92,10 +92,10 @@ void pwmCompleteDigitalMotorUpdate(uint8_t motorCount)
|
|||
if (!pwmMotorsEnabled) {
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
for (int i = 0; i < dmaMotorTimerCount; i++) {
|
||||
TIM_SetCounter(dmaMotorTimers[i].timer, 0);
|
||||
TIM_DMACmd(dmaMotorTimers[i].timer, dmaMotorTimers[i].timerDmaSources, ENABLE);
|
||||
TIM_DMACmd(dmaMotorTimers[i].timer, dmaMotorTimers[i].timerDmaSources, ENABLE);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -116,23 +116,23 @@ void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t
|
|||
|
||||
motorDmaOutput_t * const motor = &dmaMotors[motorIndex];
|
||||
motor->timerHardware = timerHardware;
|
||||
|
||||
|
||||
TIM_TypeDef *timer = timerHardware->tim;
|
||||
const IO_t motorIO = IOGetByTag(timerHardware->tag);
|
||||
|
||||
|
||||
const uint8_t timerIndex = getTimerIndex(timer);
|
||||
const bool configureTimer = (timerIndex == dmaMotorTimerCount-1);
|
||||
|
||||
|
||||
IOInit(motorIO, OWNER_MOTOR, 0);
|
||||
IOConfigGPIOAF(motorIO, IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_UP), timerHardware->alternateFunction);
|
||||
|
||||
if (configureTimer) {
|
||||
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
|
||||
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
|
||||
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
|
||||
|
||||
RCC_ClockCmd(timerRCC(timer), ENABLE);
|
||||
TIM_Cmd(timer, DISABLE);
|
||||
|
||||
|
||||
uint32_t hz;
|
||||
switch (pwmProtocolType) {
|
||||
case(PWM_TYPE_DSHOT600):
|
||||
|
@ -149,11 +149,11 @@ void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t
|
|||
TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock / timerClockDivisor(timer) / hz) - 1;
|
||||
TIM_TimeBaseStructure.TIM_Period = MOTOR_BITLENGTH;
|
||||
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
|
||||
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
|
||||
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
|
||||
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||
TIM_TimeBaseInit(timer, &TIM_TimeBaseStructure);
|
||||
TIM_TimeBaseInit(timer, &TIM_TimeBaseStructure);
|
||||
}
|
||||
|
||||
|
||||
TIM_OCStructInit(&TIM_OCInitStructure);
|
||||
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
|
||||
if (timerHardware->output & TIMER_OUTPUT_N_CHANNEL) {
|
||||
|
@ -171,20 +171,20 @@ void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t
|
|||
timerOCPreloadConfig(timer, timerHardware->channel, TIM_OCPreload_Enable);
|
||||
motor->timerDmaSource = timerDmaSource(timerHardware->channel);
|
||||
dmaMotorTimers[timerIndex].timerDmaSources |= motor->timerDmaSource;
|
||||
|
||||
|
||||
TIM_CCxCmd(timer, motor->timerHardware->channel, TIM_CCx_Enable);
|
||||
|
||||
|
||||
if (configureTimer) {
|
||||
TIM_CtrlPWMOutputs(timer, ENABLE);
|
||||
TIM_ARRPreloadConfig(timer, ENABLE);
|
||||
TIM_Cmd(timer, ENABLE);
|
||||
TIM_ARRPreloadConfig(timer, ENABLE);
|
||||
TIM_Cmd(timer, ENABLE);
|
||||
}
|
||||
|
||||
DMA_Stream_TypeDef *stream = timerHardware->dmaStream;
|
||||
|
||||
dmaInit(timerHardware->dmaIrqHandler, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
|
||||
dmaSetHandler(timerHardware->dmaIrqHandler, motor_DMA_IRQHandler, NVIC_BUILD_PRIORITY(1, 2), motorIndex);
|
||||
|
||||
|
||||
DMA_Cmd(stream, DISABLE);
|
||||
DMA_DeInit(stream);
|
||||
|
||||
|
|
|
@ -91,7 +91,7 @@ void pwmWriteDigital(uint8_t index, uint16_t value)
|
|||
void pwmCompleteDigitalMotorUpdate(uint8_t motorCount)
|
||||
{
|
||||
UNUSED(motorCount);
|
||||
|
||||
|
||||
if (!pwmMotorsEnabled) {
|
||||
return;
|
||||
}
|
||||
|
@ -123,13 +123,13 @@ void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t
|
|||
{
|
||||
motorDmaOutput_t * const motor = &dmaMotors[motorIndex];
|
||||
motor->timerHardware = timerHardware;
|
||||
|
||||
|
||||
TIM_TypeDef *timer = timerHardware->tim;
|
||||
const IO_t motorIO = IOGetByTag(timerHardware->tag);
|
||||
|
||||
|
||||
const uint8_t timerIndex = getTimerIndex(timer);
|
||||
const bool configureTimer = (timerIndex == dmaMotorTimerCount-1);
|
||||
|
||||
|
||||
IOInit(motorIO, OWNER_MOTOR, 0);
|
||||
IOConfigGPIOAF(motorIO, IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP), timerHardware->alternateFunction);
|
||||
|
||||
|
@ -137,7 +137,7 @@ void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t
|
|||
|
||||
if (configureTimer) {
|
||||
RCC_ClockCmd(timerRCC(timer), ENABLE);
|
||||
|
||||
|
||||
uint32_t hz;
|
||||
switch (pwmProtocolType) {
|
||||
case(PWM_TYPE_DSHOT600):
|
||||
|
@ -168,7 +168,7 @@ void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t
|
|||
{
|
||||
motor->TimHandle = dmaMotors[timerIndex].TimHandle;
|
||||
}
|
||||
|
||||
|
||||
switch (timerHardware->channel) {
|
||||
case TIM_CHANNEL_1:
|
||||
motor->timerDmaSource = TIM_DMA_ID_CC1;
|
||||
|
@ -220,7 +220,7 @@ void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t
|
|||
/* Initialization Error */
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
TIM_OC_InitTypeDef TIM_OCInitStructure;
|
||||
|
||||
/* PWM1 Mode configuration: Channel1 */
|
||||
|
|
|
@ -349,7 +349,7 @@ void pwmICConfig(TIM_TypeDef *tim, uint8_t channel, uint16_t polarity)
|
|||
{
|
||||
TIM_HandleTypeDef* Handle = timerFindTimerHandle(tim);
|
||||
if(Handle == NULL) return;
|
||||
|
||||
|
||||
TIM_IC_InitTypeDef TIM_ICInitStructure;
|
||||
|
||||
TIM_ICInitStructure.ICPolarity = polarity;
|
||||
|
@ -390,16 +390,16 @@ void pwmICConfig(TIM_TypeDef *tim, uint8_t channel, uint16_t polarity)
|
|||
void pwmRxInit(const pwmConfig_t *pwmConfig)
|
||||
{
|
||||
for (int channel = 0; channel < PWM_INPUT_PORT_COUNT; channel++) {
|
||||
|
||||
|
||||
pwmInputPort_t *port = &pwmInputPorts[channel];
|
||||
|
||||
const timerHardware_t *timer = timerGetByTag(pwmConfig->ioTags[channel], TIM_USE_PWM);
|
||||
|
||||
|
||||
if (!timer) {
|
||||
/* TODO: maybe fail here if not enough channels? */
|
||||
continue;
|
||||
}
|
||||
|
||||
|
||||
port->state = 0;
|
||||
port->missedEvents = 0;
|
||||
port->channel = channel;
|
||||
|
@ -433,7 +433,7 @@ void ppmAvoidPWMTimerClash(TIM_TypeDef *pwmTimer, uint8_t pwmProtocol)
|
|||
if (!motors[motorIndex].enabled || motors[motorIndex].tim != pwmTimer) {
|
||||
continue;
|
||||
}
|
||||
|
||||
|
||||
switch (pwmProtocol)
|
||||
{
|
||||
case PWM_TYPE_ONESHOT125:
|
||||
|
@ -464,9 +464,9 @@ void ppmRxInit(const ppmConfig_t *ppmConfig, uint8_t pwmProtocol)
|
|||
/* TODO: fail here? */
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
ppmAvoidPWMTimerClash(timer->tim, pwmProtocol);
|
||||
|
||||
|
||||
port->mode = INPUT_MODE_PPM;
|
||||
port->timerHardware = timer;
|
||||
|
||||
|
|
|
@ -68,16 +68,16 @@ typedef struct uartDevice_s {
|
|||
|
||||
//static uartPort_t uartPort[MAX_UARTS];
|
||||
#ifdef USE_UART1
|
||||
static uartDevice_t uart1 =
|
||||
{
|
||||
static uartDevice_t uart1 =
|
||||
{
|
||||
.DMAChannel = DMA_CHANNEL_4,
|
||||
#ifdef USE_UART1_RX_DMA
|
||||
.rxDMAStream = DMA2_Stream5,
|
||||
#endif
|
||||
.txDMAStream = DMA2_Stream7,
|
||||
.dev = USART1,
|
||||
.rx = IO_TAG(UART1_RX_PIN),
|
||||
.tx = IO_TAG(UART1_TX_PIN),
|
||||
.dev = USART1,
|
||||
.rx = IO_TAG(UART1_RX_PIN),
|
||||
.tx = IO_TAG(UART1_TX_PIN),
|
||||
.af = GPIO_AF7_USART1,
|
||||
#ifdef UART1_AHB1_PERIPHERALS
|
||||
.rcc_ahb1 = UART1_AHB1_PERIPHERALS,
|
||||
|
@ -91,16 +91,16 @@ static uartDevice_t uart1 =
|
|||
#endif
|
||||
|
||||
#ifdef USE_UART2
|
||||
static uartDevice_t uart2 =
|
||||
{
|
||||
static uartDevice_t uart2 =
|
||||
{
|
||||
.DMAChannel = DMA_CHANNEL_4,
|
||||
#ifdef USE_UART2_RX_DMA
|
||||
.rxDMAStream = DMA1_Stream5,
|
||||
#endif
|
||||
.txDMAStream = DMA1_Stream6,
|
||||
.dev = USART2,
|
||||
.rx = IO_TAG(UART2_RX_PIN),
|
||||
.tx = IO_TAG(UART2_TX_PIN),
|
||||
.dev = USART2,
|
||||
.rx = IO_TAG(UART2_RX_PIN),
|
||||
.tx = IO_TAG(UART2_TX_PIN),
|
||||
.af = GPIO_AF7_USART2,
|
||||
#ifdef UART2_AHB1_PERIPHERALS
|
||||
.rcc_ahb1 = UART2_AHB1_PERIPHERALS,
|
||||
|
@ -114,16 +114,16 @@ static uartDevice_t uart2 =
|
|||
#endif
|
||||
|
||||
#ifdef USE_UART3
|
||||
static uartDevice_t uart3 =
|
||||
{
|
||||
static uartDevice_t uart3 =
|
||||
{
|
||||
.DMAChannel = DMA_CHANNEL_4,
|
||||
#ifdef USE_UART3_RX_DMA
|
||||
.rxDMAStream = DMA1_Stream1,
|
||||
#endif
|
||||
.txDMAStream = DMA1_Stream3,
|
||||
.dev = USART3,
|
||||
.rx = IO_TAG(UART3_RX_PIN),
|
||||
.tx = IO_TAG(UART3_TX_PIN),
|
||||
.dev = USART3,
|
||||
.rx = IO_TAG(UART3_RX_PIN),
|
||||
.tx = IO_TAG(UART3_TX_PIN),
|
||||
.af = GPIO_AF7_USART3,
|
||||
#ifdef UART3_AHB1_PERIPHERALS
|
||||
.rcc_ahb1 = UART3_AHB1_PERIPHERALS,
|
||||
|
@ -137,16 +137,16 @@ static uartDevice_t uart3 =
|
|||
#endif
|
||||
|
||||
#ifdef USE_UART4
|
||||
static uartDevice_t uart4 =
|
||||
{
|
||||
static uartDevice_t uart4 =
|
||||
{
|
||||
.DMAChannel = DMA_CHANNEL_4,
|
||||
#ifdef USE_UART4_RX_DMA
|
||||
.rxDMAStream = DMA1_Stream2,
|
||||
#endif
|
||||
.txDMAStream = DMA1_Stream4,
|
||||
.dev = UART4,
|
||||
.rx = IO_TAG(UART4_RX_PIN),
|
||||
.tx = IO_TAG(UART4_TX_PIN),
|
||||
.dev = UART4,
|
||||
.rx = IO_TAG(UART4_RX_PIN),
|
||||
.tx = IO_TAG(UART4_TX_PIN),
|
||||
.af = GPIO_AF8_UART4,
|
||||
#ifdef UART4_AHB1_PERIPHERALS
|
||||
.rcc_ahb1 = UART4_AHB1_PERIPHERALS,
|
||||
|
@ -160,16 +160,16 @@ static uartDevice_t uart4 =
|
|||
#endif
|
||||
|
||||
#ifdef USE_UART5
|
||||
static uartDevice_t uart5 =
|
||||
{
|
||||
static uartDevice_t uart5 =
|
||||
{
|
||||
.DMAChannel = DMA_CHANNEL_4,
|
||||
#ifdef USE_UART5_RX_DMA
|
||||
.rxDMAStream = DMA1_Stream0,
|
||||
#endif
|
||||
.txDMAStream = DMA1_Stream7,
|
||||
.dev = UART5,
|
||||
.rx = IO_TAG(UART5_RX_PIN),
|
||||
.tx = IO_TAG(UART5_TX_PIN),
|
||||
.dev = UART5,
|
||||
.rx = IO_TAG(UART5_RX_PIN),
|
||||
.tx = IO_TAG(UART5_TX_PIN),
|
||||
.af = GPIO_AF8_UART5,
|
||||
#ifdef UART5_AHB1_PERIPHERALS
|
||||
.rcc_ahb1 = UART5_AHB1_PERIPHERALS,
|
||||
|
@ -183,16 +183,16 @@ static uartDevice_t uart5 =
|
|||
#endif
|
||||
|
||||
#ifdef USE_UART6
|
||||
static uartDevice_t uart6 =
|
||||
{
|
||||
static uartDevice_t uart6 =
|
||||
{
|
||||
.DMAChannel = DMA_CHANNEL_5,
|
||||
#ifdef USE_UART6_RX_DMA
|
||||
.rxDMAStream = DMA2_Stream1,
|
||||
#endif
|
||||
.txDMAStream = DMA2_Stream6,
|
||||
.dev = USART6,
|
||||
.rx = IO_TAG(UART6_RX_PIN),
|
||||
.tx = IO_TAG(UART6_TX_PIN),
|
||||
.dev = USART6,
|
||||
.rx = IO_TAG(UART6_RX_PIN),
|
||||
.tx = IO_TAG(UART6_TX_PIN),
|
||||
.af = GPIO_AF8_USART6,
|
||||
#ifdef UART6_AHB1_PERIPHERALS
|
||||
.rcc_ahb1 = UART6_AHB1_PERIPHERALS,
|
||||
|
@ -414,7 +414,7 @@ uartPort_t *serialUART(UARTDevice device, uint32_t baudRate, portMode_t mode, po
|
|||
IOInit(tx, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
|
||||
IOConfigGPIOAF(tx, IOCFG_AF_PP, uart->af);
|
||||
}
|
||||
|
||||
|
||||
if (mode & MODE_RX) {
|
||||
IOInit(rx, OWNER_SERIAL_RX, RESOURCE_INDEX(device));
|
||||
IOConfigGPIOAF(rx, IOCFG_AF_PP, uart->af);
|
||||
|
|
|
@ -167,16 +167,16 @@ static const struct serialPortVTable usbVTable[] = {
|
|||
serialPort_t *usbVcpOpen(void)
|
||||
{
|
||||
vcpPort_t *s;
|
||||
|
||||
|
||||
/* Init Device Library */
|
||||
USBD_Init(&USBD_Device, &VCP_Desc, 0);
|
||||
|
||||
|
||||
/* Add Supported Class */
|
||||
USBD_RegisterClass(&USBD_Device, USBD_CDC_CLASS);
|
||||
|
||||
|
||||
/* Add CDC Interface Class */
|
||||
USBD_CDC_RegisterInterface(&USBD_Device, &USBD_CDC_fops);
|
||||
|
||||
|
||||
/* Start Device Process */
|
||||
USBD_Start(&USBD_Device);
|
||||
|
||||
|
|
|
@ -32,7 +32,7 @@
|
|||
typedef struct beeperConfig_s {
|
||||
ioTag_t ioTag;
|
||||
uint8_t isInverted;
|
||||
uint8_t isOD;
|
||||
uint8_t isOD;
|
||||
} beeperConfig_t;
|
||||
|
||||
void systemBeep(bool on);
|
||||
|
|
|
@ -815,7 +815,7 @@ void timerOCPreloadConfig(TIM_TypeDef *tim, uint8_t channel, uint16_t preload)
|
|||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
volatile timCCR_t* timerCCR(TIM_TypeDef *tim, uint8_t channel)
|
||||
{
|
||||
|
|
|
@ -95,13 +95,13 @@ typedef struct timerHardware_s {
|
|||
#endif
|
||||
#if defined(USE_DSHOT) || defined(LED_STRIP)
|
||||
#if defined(STM32F4) || defined(STM32F7)
|
||||
DMA_Stream_TypeDef *dmaStream;
|
||||
DMA_Stream_TypeDef *dmaStream;
|
||||
uint32_t dmaChannel;
|
||||
#elif defined(STM32F3) || defined(STM32F1)
|
||||
DMA_Channel_TypeDef *dmaChannel;
|
||||
#endif
|
||||
uint8_t dmaIrqHandler;
|
||||
#endif
|
||||
#endif
|
||||
} timerHardware_t;
|
||||
|
||||
typedef enum {
|
||||
|
@ -122,7 +122,7 @@ typedef enum {
|
|||
#endif
|
||||
#elif defined(STM32F3)
|
||||
#define HARDWARE_TIMER_DEFINITION_COUNT 10
|
||||
#elif defined(STM32F411xE)
|
||||
#elif defined(STM32F411xE)
|
||||
#define HARDWARE_TIMER_DEFINITION_COUNT 10
|
||||
#elif defined(STM32F4)
|
||||
#define HARDWARE_TIMER_DEFINITION_COUNT 14
|
||||
|
|
|
@ -73,21 +73,21 @@
|
|||
#define DEF_TIM_DMA__TIM15_COM DMA1_CH5
|
||||
#define DEF_TIM_DMA__TIM15_CH1N DMA1_CH5
|
||||
|
||||
#ifdef REMAP_TIM16_DMA
|
||||
#ifdef REMAP_TIM16_DMA
|
||||
#define DEF_TIM_DMA__TIM16_CH1 DMA1_CH6
|
||||
#define DEF_TIM_DMA__TIM16_UP DMA1_CH6
|
||||
#else
|
||||
#define DEF_TIM_DMA__TIM16_CH1 DMA1_CH3
|
||||
#define DEF_TIM_DMA__TIM16_UP DMA1_CH3
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef REMAP_TIM17_DMA
|
||||
#ifdef REMAP_TIM17_DMA
|
||||
#define DEF_TIM_DMA__TIM17_CH1 DMA1_CH7
|
||||
#define DEF_TIM_DMA__TIM17_UP DMA1_CH7
|
||||
#else
|
||||
#define DEF_TIM_DMA__TIM17_CH1 DMA1_CH1
|
||||
#define DEF_TIM_DMA__TIM17_UP DMA1_CH1
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define DEF_TIM_DMA__TIM8_CH3 DMA2_CH1
|
||||
#define DEF_TIM_DMA__TIM8_UP DMA2_CH1
|
||||
|
@ -134,9 +134,9 @@
|
|||
#define GPIO_AF__PA15_TIM8_CH1 GPIO_AF_2
|
||||
|
||||
#define GPIO_AF__PA7_TIM8_CH1N GPIO_AF_4
|
||||
|
||||
|
||||
#define GPIO_AF__PA14_TIM4_CH2 GPIO_AF_5
|
||||
|
||||
|
||||
#define GPIO_AF__PA7_TIM1_CH1N GPIO_AF_6
|
||||
#define GPIO_AF__PA8_TIM1_CH1 GPIO_AF_6
|
||||
#define GPIO_AF__PA9_TIM1_CH2 GPIO_AF_6
|
||||
|
@ -165,7 +165,7 @@
|
|||
#define GPIO_AF__PB11_TIM2_CH4 GPIO_AF_1
|
||||
#define GPIO_AF__PB14_TIM15_CH1 GPIO_AF_1
|
||||
#define GPIO_AF__PB15_TIM15_CH2 GPIO_AF_1
|
||||
|
||||
|
||||
#define GPIO_AF__PB0_TIM3_CH3 GPIO_AF_2
|
||||
#define GPIO_AF__PB1_TIM3_CH4 GPIO_AF_2
|
||||
#define GPIO_AF__PB4_TIM3_CH1 GPIO_AF_2
|
||||
|
@ -175,35 +175,35 @@
|
|||
#define GPIO_AF__PB8_TIM4_CH3 GPIO_AF_2
|
||||
#define GPIO_AF__PB9_TIM4_CH4 GPIO_AF_2
|
||||
#define GPIO_AF__PB15_TIM15_CH1N GPIO_AF_2
|
||||
|
||||
|
||||
#define GPIO_AF__PB0_TIM8_CH2N GPIO_AF_4
|
||||
#define GPIO_AF__PB1_TIM8_CH3N GPIO_AF_4
|
||||
#define GPIO_AF__PB3_TIM8_CH1N GPIO_AF_4
|
||||
#define GPIO_AF__PB4_TIM8_CH2N GPIO_AF_4
|
||||
#define GPIO_AF__PB15_TIM1_CH3N GPIO_AF_4
|
||||
|
||||
|
||||
#define GPIO_AF__PB6_TIM8_CH1 GPIO_AF_5
|
||||
|
||||
|
||||
#define GPIO_AF__PB0_TIM1_CH2N GPIO_AF_6
|
||||
#define GPIO_AF__PB1_TIM1_CH3N GPIO_AF_6
|
||||
#define GPIO_AF__PB13_TIM1_CH1N GPIO_AF_6
|
||||
#define GPIO_AF__PB14_TIM1_CH2N GPIO_AF_6
|
||||
|
||||
|
||||
#define GPIO_AF__PB5_TIM17_CH1 GPIO_AF_10
|
||||
#define GPIO_AF__PB7_TIM3_CH4 GPIO_AF_10
|
||||
#define GPIO_AF__PB8_TIM8_CH2 GPIO_AF_10
|
||||
#define GPIO_AF__PB9_TIM8_CH3 GPIO_AF_10
|
||||
|
||||
|
||||
#define GPIO_AF__PC6_TIM3_CH1 GPIO_AF_2
|
||||
#define GPIO_AF__PC7_TIM3_CH2 GPIO_AF_2
|
||||
#define GPIO_AF__PC8_TIM3_CH3 GPIO_AF_2
|
||||
#define GPIO_AF__PC9_TIM3_CH4 GPIO_AF_2
|
||||
|
||||
|
||||
#define GPIO_AF__PC6_TIM8_CH1 GPIO_AF_4
|
||||
#define GPIO_AF__PC7_TIM8_CH2 GPIO_AF_4
|
||||
#define GPIO_AF__PC8_TIM8_CH3 GPIO_AF_4
|
||||
#define GPIO_AF__PC9_TIM8_CH4 GPIO_AF_4
|
||||
|
||||
|
||||
#define GPIO_AF__PC10_TIM8_CH1N GPIO_AF_4
|
||||
#define GPIO_AF__PC11_TIM8_CH2N GPIO_AF_4
|
||||
#define GPIO_AF__PC12_TIM8_CH3N GPIO_AF_4
|
||||
|
@ -252,11 +252,11 @@
|
|||
|
||||
#define DEF_TIM_DMA_STR_0__TIM2_CH1 DMA1_ST5
|
||||
#define DEF_TIM_DMA_STR_0__TIM2_CH2 DMA1_ST6
|
||||
#define DEF_TIM_DMA_STR_0__TIM2_CH3 DMA1_ST1
|
||||
#define DEF_TIM_DMA_STR_0__TIM2_CH3 DMA1_ST1
|
||||
#define DEF_TIM_DMA_STR_0__TIM2_CH4 DMA1_ST7
|
||||
#define DEF_TIM_DMA_STR_1__TIM2_CH4 DMA1_ST6
|
||||
|
||||
#define DEF_TIM_DMA_STR_0__TIM3_CH1 DMA1_ST4
|
||||
#define DEF_TIM_DMA_STR_0__TIM3_CH1 DMA1_ST4
|
||||
#define DEF_TIM_DMA_STR_0__TIM3_CH2 DMA1_ST5
|
||||
#define DEF_TIM_DMA_STR_0__TIM3_CH3 DMA1_ST7
|
||||
#define DEF_TIM_DMA_STR_0__TIM3_CH4 DMA1_ST2
|
||||
|
@ -306,11 +306,11 @@
|
|||
|
||||
#define DEF_TIM_DMA_CHN_0__TIM2_CH1 DMA_Channel_3
|
||||
#define DEF_TIM_DMA_CHN_0__TIM2_CH2 DMA_Channel_3
|
||||
#define DEF_TIM_DMA_CHN_0__TIM2_CH3 DMA_Channel_3
|
||||
#define DEF_TIM_DMA_CHN_0__TIM2_CH3 DMA_Channel_3
|
||||
#define DEF_TIM_DMA_CHN_0__TIM2_CH4 DMA_Channel_3
|
||||
#define DEF_TIM_DMA_CHN_1__TIM2_CH4 DMA_Channel_3
|
||||
|
||||
#define DEF_TIM_DMA_CHN_0__TIM3_CH1 DMA_Channel_5
|
||||
#define DEF_TIM_DMA_CHN_0__TIM3_CH1 DMA_Channel_5
|
||||
#define DEF_TIM_DMA_CHN_0__TIM3_CH2 DMA_Channel_5
|
||||
#define DEF_TIM_DMA_CHN_0__TIM3_CH3 DMA_Channel_5
|
||||
#define DEF_TIM_DMA_CHN_0__TIM3_CH4 DMA_Channel_5
|
||||
|
@ -371,7 +371,7 @@
|
|||
#define DMA_NONE_STREAM NULL
|
||||
|
||||
|
||||
#define DEF_TIM_CHAN(chan) DEF_CHAN_ ## chan
|
||||
#define DEF_TIM_CHAN(chan) DEF_CHAN_ ## chan
|
||||
#define DEF_TIM_OUTPUT(chan, out) ( DEF_CHAN_ ## chan ## _OUTPUT | out )
|
||||
|
||||
#define DMA_NONE_HANDLER 0
|
||||
|
@ -384,8 +384,8 @@
|
|||
#define DEF_CHAN_CH2N TIM_Channel_2
|
||||
#define DEF_CHAN_CH3N TIM_Channel_3
|
||||
#define DEF_CHAN_CH4N TIM_Channel_4
|
||||
|
||||
#define DEF_CHAN_CH1_OUTPUT TIMER_OUTPUT_NONE
|
||||
|
||||
#define DEF_CHAN_CH1_OUTPUT TIMER_OUTPUT_NONE
|
||||
#define DEF_CHAN_CH2_OUTPUT TIMER_OUTPUT_NONE
|
||||
#define DEF_CHAN_CH3_OUTPUT TIMER_OUTPUT_NONE
|
||||
#define DEF_CHAN_CH4_OUTPUT TIMER_OUTPUT_NONE
|
||||
|
|
|
@ -70,7 +70,7 @@ typedef struct {
|
|||
} timerInfo_t;
|
||||
timerInfo_t timerInfo[USED_TIMER_COUNT+1];
|
||||
|
||||
typedef struct
|
||||
typedef struct
|
||||
{
|
||||
TIM_HandleTypeDef Handle;
|
||||
} timerHandle_t;
|
||||
|
@ -237,7 +237,7 @@ TIM_HandleTypeDef* timerFindTimerHandle(TIM_TypeDef *tim)
|
|||
uint8_t timerIndex = lookupTimerIndex(tim);
|
||||
if (timerIndex >= USED_TIMER_COUNT)
|
||||
return NULL;
|
||||
|
||||
|
||||
return &timerHandle[timerIndex].Handle;
|
||||
}
|
||||
|
||||
|
@ -252,16 +252,16 @@ void configTimeBase(TIM_TypeDef *tim, uint16_t period, uint8_t mhz)
|
|||
// already configured
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
timerHandle[timerIndex].Handle.Instance = tim;
|
||||
|
||||
|
||||
timerHandle[timerIndex].Handle.Init.Period = (period - 1) & 0xffff; // AKA TIMx_ARR
|
||||
timerHandle[timerIndex].Handle.Init.Prescaler = (SystemCoreClock / timerClockDivisor(tim) / ((uint32_t)mhz * 1000000)) - 1;
|
||||
|
||||
timerHandle[timerIndex].Handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
timerHandle[timerIndex].Handle.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
timerHandle[timerIndex].Handle.Init.RepetitionCounter = 0x0000;
|
||||
|
||||
|
||||
HAL_TIM_Base_Init(&timerHandle[timerIndex].Handle);
|
||||
if(tim == TIM1 || tim == TIM2 || tim == TIM3 || tim == TIM4 || tim == TIM5 || tim == TIM8 || tim == TIM9)
|
||||
{
|
||||
|
@ -292,7 +292,7 @@ void timerConfigure(const timerHardware_t *timerHardwarePtr, uint16_t period, ui
|
|||
if (timerIndex >= USED_TIMER_COUNT) {
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
configTimeBase(timerHardwarePtr->tim, period, mhz);
|
||||
HAL_TIM_Base_Start(&timerHandle[timerIndex].Handle);
|
||||
|
||||
|
@ -357,7 +357,7 @@ static void timerChConfig_UpdateOverflow(timerConfig_t *cfg, TIM_TypeDef *tim) {
|
|||
if (timerIndex >= USED_TIMER_COUNT) {
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
timerOvrHandlerRec_t **chain = &cfg->overflowCallbackActive;
|
||||
ATOMIC_BLOCK(NVIC_PRIO_TIMER) {
|
||||
for(int i = 0; i < CC_CHANNELS_PER_TIMER; i++)
|
||||
|
@ -441,7 +441,7 @@ void timerChITConfigDualLo(const timerHardware_t *timHw, FunctionalState newStat
|
|||
if (timerIndex >= USED_TIMER_COUNT) {
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
if(newState)
|
||||
__HAL_TIM_ENABLE_IT(&timerHandle[timerIndex].Handle, TIM_IT_CCx(timHw->channel&~TIM_CHANNEL_2));
|
||||
else
|
||||
|
@ -460,7 +460,7 @@ void timerChITConfig(const timerHardware_t *timHw, FunctionalState newState)
|
|||
if (timerIndex >= USED_TIMER_COUNT) {
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
if(newState)
|
||||
__HAL_TIM_ENABLE_IT(&timerHandle[timerIndex].Handle, TIM_IT_CCx(timHw->channel));
|
||||
else
|
||||
|
@ -479,7 +479,7 @@ void timerChClearCCFlag(const timerHardware_t *timHw)
|
|||
if (timerIndex >= USED_TIMER_COUNT) {
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
__HAL_TIM_CLEAR_FLAG(&timerHandle[timerIndex].Handle, TIM_IT_CCx(timHw->channel));
|
||||
}
|
||||
|
||||
|
@ -744,8 +744,8 @@ _TIM_IRQ_HANDLER(TIM1_TRG_COM_TIM17_IRQHandler, 17);
|
|||
void timerInit(void)
|
||||
{
|
||||
memset(timerConfig, 0, sizeof (timerConfig));
|
||||
|
||||
|
||||
|
||||
|
||||
#if USED_TIMERS & TIM_N(1)
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
#endif
|
||||
|
@ -874,7 +874,7 @@ const timerHardware_t *timerGetByTag(ioTag_t tag, timerUsageFlag_e flag)
|
|||
if (timerHardware[i].tag == tag) {
|
||||
if (timerHardware[i].output & flag) {
|
||||
return &timerHardware[i];
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return NULL;
|
||||
|
|
|
@ -62,18 +62,18 @@ const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
|
|||
#endif
|
||||
};
|
||||
|
||||
/*
|
||||
/*
|
||||
need a mapping from dma and timers to pins, and the values should all be set here to the dmaMotors array.
|
||||
this mapping could be used for both these motors and for led strip.
|
||||
|
||||
only certain pins have OC output (already used in normal PWM et al) but then
|
||||
|
||||
only certain pins have OC output (already used in normal PWM et al) but then
|
||||
there are only certain DMA streams/channels available for certain timers and channels.
|
||||
*** (this may highlight some hardware limitations on some targets) ***
|
||||
|
||||
DMA1
|
||||
|
||||
|
||||
Channel Stream0 Stream1 Stream2 Stream3 Stream4 Stream5 Stream6 Stream7
|
||||
0
|
||||
0
|
||||
1
|
||||
2 TIM4_CH1 TIM4_CH2 TIM4_CH3
|
||||
3 TIM2_CH3 TIM2_CH1 TIM2_CH1 TIM2_CH4
|
||||
|
@ -81,10 +81,10 @@ const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
|
|||
4
|
||||
5 TIM3_CH4 TIM3_CH1 TIM3_CH2 TIM3_CH3
|
||||
6 TIM5_CH3 TIM5_CH4 TIM5_CH1 TIM5_CH4 TIM5_CH2
|
||||
7
|
||||
|
||||
7
|
||||
|
||||
DMA2
|
||||
|
||||
|
||||
Channel Stream0 Stream1 Stream2 Stream3 Stream4 Stream5 Stream6 Stream7
|
||||
0 TIM8_CH1 TIM1_CH1
|
||||
TIM8_CH2 TIM1_CH2
|
||||
|
@ -101,13 +101,13 @@ const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
|
|||
uint8_t timerClockDivisor(TIM_TypeDef *tim)
|
||||
{
|
||||
#if defined (STM32F40_41xxx)
|
||||
if (tim == TIM8) return 1;
|
||||
if (tim == TIM8) return 1;
|
||||
#endif
|
||||
if (tim == TIM1 || tim == TIM9 || tim == TIM10 || tim == TIM11) {
|
||||
return 1;
|
||||
} else {
|
||||
return 2;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void TIM_SelectOCxM_NoDisable(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode)
|
||||
|
|
|
@ -58,18 +58,18 @@ const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
|
|||
{ .TIMx = TIM14, .rcc = RCC_APB1(TIM14), .inputIrq = TIM8_TRG_COM_TIM14_IRQn},
|
||||
};
|
||||
|
||||
/*
|
||||
/*
|
||||
need a mapping from dma and timers to pins, and the values should all be set here to the dmaMotors array.
|
||||
this mapping could be used for both these motors and for led strip.
|
||||
|
||||
only certain pins have OC output (already used in normal PWM et al) but then
|
||||
|
||||
only certain pins have OC output (already used in normal PWM et al) but then
|
||||
there are only certain DMA streams/channels available for certain timers and channels.
|
||||
*** (this may highlight some hardware limitations on some targets) ***
|
||||
|
||||
DMA1
|
||||
|
||||
|
||||
Channel Stream0 Stream1 Stream2 Stream3 Stream4 Stream5 Stream6 Stream7
|
||||
0
|
||||
0
|
||||
1
|
||||
2 TIM4_CH1 TIM4_CH2 TIM4_CH3
|
||||
3 TIM2_CH3 TIM2_CH1 TIM2_CH1 TIM2_CH4
|
||||
|
@ -77,10 +77,10 @@ const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
|
|||
4
|
||||
5 TIM3_CH4 TIM3_CH1 TIM3_CH2 TIM3_CH3
|
||||
6 TIM5_CH3 TIM5_CH4 TIM5_CH1 TIM5_CH4 TIM5_CH2
|
||||
7
|
||||
|
||||
7
|
||||
|
||||
DMA2
|
||||
|
||||
|
||||
Channel Stream0 Stream1 Stream2 Stream3 Stream4 Stream5 Stream6 Stream7
|
||||
0 TIM8_CH1 TIM1_CH1
|
||||
TIM8_CH2 TIM1_CH2
|
||||
|
|
Loading…
Reference in New Issue