Removed unrequired RCC setting
This commit is contained in:
parent
19a701a944
commit
1a4795c398
|
@ -56,9 +56,6 @@
|
||||||
|
|
||||||
static void NRF24L01_InitGpio(void)
|
static void NRF24L01_InitGpio(void)
|
||||||
{
|
{
|
||||||
#if defined(STM32F10X)
|
|
||||||
RCC_AHBPeriphClockCmd(RX_CE_GPIO_CLK_PERIPHERAL, ENABLE);
|
|
||||||
#endif
|
|
||||||
// CE as OUTPUT
|
// CE as OUTPUT
|
||||||
const SPIDevice rxSPIDevice = spiDeviceByInstance(RX_SPI_INSTANCE);
|
const SPIDevice rxSPIDevice = spiDeviceByInstance(RX_SPI_INSTANCE);
|
||||||
IOInit(DEFIO_IO(RX_CE_PIN), OWNER_RX_SPI_CS, rxSPIDevice + 1);
|
IOInit(DEFIO_IO(RX_CE_PIN), OWNER_RX_SPI_CS, rxSPIDevice + 1);
|
||||||
|
|
|
@ -71,9 +71,6 @@ void rxSpiDeviceInit(rx_spi_type_e spiType)
|
||||||
IOInit(DEFIO_IO(RX_NSS_PIN), OWNER_SPI_CS, rxSPIDevice + 1);
|
IOInit(DEFIO_IO(RX_NSS_PIN), OWNER_SPI_CS, rxSPIDevice + 1);
|
||||||
#endif // USE_RX_SOFTSPI
|
#endif // USE_RX_SOFTSPI
|
||||||
|
|
||||||
#if defined(STM32F10X)
|
|
||||||
RCC_AHBPeriphClockCmd(RX_NSS_GPIO_CLK_PERIPHERAL, ENABLE);
|
|
||||||
#endif
|
|
||||||
DISABLE_RX();
|
DISABLE_RX();
|
||||||
|
|
||||||
#ifdef RX_SPI_INSTANCE
|
#ifdef RX_SPI_INSTANCE
|
||||||
|
|
|
@ -60,9 +60,6 @@
|
||||||
#define RX_SPI_INSTANCE SPI1
|
#define RX_SPI_INSTANCE SPI1
|
||||||
|
|
||||||
// Nordic Semiconductor uses 'CSN', STM uses 'NSS'
|
// Nordic Semiconductor uses 'CSN', STM uses 'NSS'
|
||||||
#define RX_CE_GPIO_CLK_PERIPHERAL RCC_APB2Periph_GPIOA
|
|
||||||
#define RX_NSS_GPIO_CLK_PERIPHERAL RCC_APB2Periph_GPIOA
|
|
||||||
#define RX_IRQ_GPIO_CLK_PERIPHERAL RCC_APB2Periph_GPIOA
|
|
||||||
#define RX_CE_PIN PA4
|
#define RX_CE_PIN PA4
|
||||||
#define RX_NSS_PIN PA11
|
#define RX_NSS_PIN PA11
|
||||||
#define RX_SCK_PIN PA5
|
#define RX_SCK_PIN PA5
|
||||||
|
|
Loading…
Reference in New Issue